blob: 4a1d25276e88992a35cc5aff8ea816b1d4ae6454 [file] [log] [blame]
Albin Tonnerre94539672009-08-24 18:03:26 +02001/*
2 * Copyright (C) 2009
3 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
4 *
5 * Configuation settings for the Calao SBC35-A9G20 board
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000029/* SoC type is defined in boards.cfg */
30#include <asm/hardware.h>
31#include <asm/sizes.h>
Jens Scharsig425de622010-02-03 22:45:42 +010032
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000033#if defined(CONFIG_SYS_USE_NANDFLASH)
Albin Tonnerre94539672009-08-24 18:03:26 +020034#define CONFIG_ENV_IS_IN_NAND
35#else
36#define CONFIG_ENV_IS_IN_EEPROM
37#endif
38
Anatolij Gustschin204ab932011-11-19 01:59:12 +000039#define MACH_TYPE_SBC35_A9G20 1848
40#define CONFIG_MACH_TYPE MACH_TYPE_SBC35_A9G20
41
Albin Tonnerre94539672009-08-24 18:03:26 +020042/* ARM asynchronous clock */
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000043#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
Achim Ehrlich7c966a82010-02-24 10:29:16 +010044#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000045#define CONFIG_SYS_HZ 1000
Albin Tonnerre94539672009-08-24 18:03:26 +020046
47#define CONFIG_ARCH_CPU_INIT
Albin Tonnerre94539672009-08-24 18:03:26 +020048
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000049#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
50#define CONFIG_SETUP_MEMORY_TAGS
51#define CONFIG_INITRD_TAG
Albin Tonnerre94539672009-08-24 18:03:26 +020052#define CONFIG_SKIP_LOWLEVEL_INIT
Albin Tonnerre94539672009-08-24 18:03:26 +020053
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000054/* GPIO */
55#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
56#define CONFIG_AT91_GPIO
57
58/* Serial */
Albin Tonnerre94539672009-08-24 18:03:26 +020059#define CONFIG_ATMEL_USART
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000060#define CONFIG_USART_BASE ATMEL_BASE_DBGU
61#define CONFIG_USART_ID ATMEL_ID_SYS
62#define CONFIG_BAUDRATE 115200
Albin Tonnerre94539672009-08-24 18:03:26 +020063
64#define CONFIG_BOOTDELAY 3
65
66/*
67 * BOOTP options
68 */
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000069#define CONFIG_BOOTP_BOOTFILESIZE
70#define CONFIG_BOOTP_BOOTPATH
71#define CONFIG_BOOTP_GATEWAY
72#define CONFIG_BOOTP_HOSTNAME
Albin Tonnerre94539672009-08-24 18:03:26 +020073
74/*
75 * Command line configuration.
76 */
77#include <config_cmd_default.h>
78#undef CONFIG_CMD_BDI
79#undef CONFIG_CMD_FPGA
80#undef CONFIG_CMD_IMI
81#undef CONFIG_CMD_IMLS
82#undef CONFIG_CMD_LOADS
83#undef CONFIG_CMD_SOURCE
84
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000085#define CONFIG_CMD_PING
86#define CONFIG_CMD_DHCP
87#define CONFIG_CMD_USB
Albin Tonnerre94539672009-08-24 18:03:26 +020088
89/* SDRAM */
90#define CONFIG_NR_DRAM_BANKS 1
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +000091#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
92#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
93#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
94 GENERATED_GBL_DATA_SIZE)
Albin Tonnerre94539672009-08-24 18:03:26 +020095
96/* SPI EEPROM */
97#define CONFIG_SPI
98#define CONFIG_CMD_SPI
99#define CONFIG_ATMEL_SPI
100#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
101
102#define CONFIG_CMD_EEPROM
103#define CONFIG_SPI_M95XXX
104#define CONFIG_SYS_EEPROM_SIZE 0x10000
105#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
106
107/* SPI RTC */
108#define CONFIG_CMD_DATE
109#define CONFIG_RTC_M41T94
110#define CONFIG_M41T94_SPI_BUS 0
111#define CONFIG_M41T94_SPI_CS 0
112
113/* NAND flash */
114#define CONFIG_CMD_NAND
115#define CONFIG_NAND_ATMEL
116#define CONFIG_SYS_MAX_NAND_DEVICE 1
117#define CONFIG_SYS_NAND_BASE 0x40000000
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +0000118#define CONFIG_SYS_NAND_DBW_8
Albin Tonnerre94539672009-08-24 18:03:26 +0200119/* our ALE is AD21 */
120#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
121/* our CLE is AD22 */
122#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
123#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
124#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
125
126/* NOR flash - no real flash on this board */
127#define CONFIG_SYS_NO_FLASH 1
128
129/* Ethernet */
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +0000130#define CONFIG_MACB
131#define CONFIG_RMII
Albin Tonnerre94539672009-08-24 18:03:26 +0200132#define CONFIG_NET_RETRY_COUNT 20
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +0000133#define CONFIG_RESET_PHY_R
134#define CONFIG_MACB_SEARCH_PHY
Albin Tonnerre94539672009-08-24 18:03:26 +0200135
136/* USB */
137#define CONFIG_USB_ATMEL
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +0000138#define CONFIG_USB_OHCI_NEW
139#define CONFIG_DOS_PARTITION
140#define CONFIG_SYS_USB_OHCI_CPU_INIT
Albin Tonnerre94539672009-08-24 18:03:26 +0200141#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
142#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
143#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +0000144#define CONFIG_USB_STORAGE
145#define CONFIG_CMD_FAT
Albin Tonnerre94539672009-08-24 18:03:26 +0200146
147#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
148
Thomas Petazzoni6785c7c2011-08-04 02:22:20 +0000149#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Albin Tonnerre94539672009-08-24 18:03:26 +0200150#define CONFIG_SYS_MEMTEST_END 0x23e00000
151
152/* Env in EEPROM, bootstrap + u-boot in NAND*/
153#ifdef CONFIG_ENV_IS_IN_EEPROM
154#define CONFIG_ENV_OFFSET 0x20
155#define CONFIG_ENV_SIZE 0x1000
156#endif
157
158/* Env, bootstrap and u-boot in NAND */
159#ifdef CONFIG_ENV_IS_IN_NAND
160#define CONFIG_ENV_OFFSET 0x60000
161#define CONFIG_ENV_OFFSET_REDUND 0x80000
162#define CONFIG_ENV_SIZE 0x20000
Albin Tonnerre94539672009-08-24 18:03:26 +0200163#endif
164
165#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
166#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
167 "root=/dev/mtdblock1 " \
168 "mtdparts=atmel_nand:16M(kernel)ro," \
169 "120M(rootfs),-(other) " \
170 "rw rootfstype=jffs2"
171
Albin Tonnerre94539672009-08-24 18:03:26 +0200172
173#define CONFIG_SYS_PROMPT "U-Boot> "
174#define CONFIG_SYS_CBSIZE 256
175#define CONFIG_SYS_MAXARGS 16
176#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
177#define CONFIG_SYS_LONGHELP 1
178#define CONFIG_CMDLINE_EDITING 1
179
180/*
181 * Size of malloc() pool
182 */
183#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
Albin Tonnerre94539672009-08-24 18:03:26 +0200184
185#endif