blob: eaa2a45fedc541b3734c0596d3a69f1b49b36276 [file] [log] [blame]
Ye Li25baafc2018-06-27 20:23:16 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 NXP
4 */
5
Peng Fanae076052019-08-01 06:02:49 +00006&{/aliases} {
Simon Glass8c103c32023-02-13 08:56:33 -07007 bootph-all;
Peng Fanae076052019-08-01 06:02:49 +00008 display0 = &lcdif;
9};
10
Marcel Ziswilerbf947d22022-10-22 23:59:32 +020011&soc {
Simon Glass8c103c32023-02-13 08:56:33 -070012 bootph-all;
Peng Fanae076052019-08-01 06:02:49 +000013};
14
15&aips2 {
Simon Glass8c103c32023-02-13 08:56:33 -070016 bootph-all;
Peng Fanae076052019-08-01 06:02:49 +000017};
18
19&iomuxc {
Simon Glass8c103c32023-02-13 08:56:33 -070020 bootph-all;
Peng Fanae076052019-08-01 06:02:49 +000021};
22
23&lcdif {
24 display = <&display0>;
Simon Glass8c103c32023-02-13 08:56:33 -070025 bootph-all;
Peng Fanae076052019-08-01 06:02:49 +000026
27 display0: display@0 {
Anatolij Gustschin823c4cd2020-02-05 17:49:59 +010028 bits-per-pixel = <24>;
Peng Fanae076052019-08-01 06:02:49 +000029 bus-width = <24>;
30
31 display-timings {
32 native-mode = <&timing0>;
33
34 timing0: timing0 {
35 clock-frequency = <9200000>;
36 hactive = <480>;
37 vactive = <272>;
38 hfront-porch = <8>;
39 hback-porch = <4>;
40 hsync-len = <41>;
41 vback-porch = <2>;
42 vfront-porch = <4>;
43 vsync-len = <10>;
44 hsync-active = <0>;
45 vsync-active = <0>;
46 de-active = <1>;
47 pixelclk-active = <0>;
48 };
49 };
50 };
51};