blob: eae0528871862852aa19670fb6f1ccde5e334f56 [file] [log] [blame]
Suman Anna1b2f4692022-05-25 13:38:46 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals
4 *
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8&cbass_wakeup {
9 wkup_conf: syscon@43000000 {
10 compatible = "syscon", "simple-mfd";
11 reg = <0x00 0x43000000 0x00 0x20000>;
12 #address-cells = <1>;
13 #size-cells = <1>;
14 ranges = <0x0 0x00 0x43000000 0x20000>;
15
16 chipid: chipid@14 {
17 compatible = "ti,am654-chipid";
18 reg = <0x14 0x4>;
19 };
20 };
21
22 wkup_uart0: serial@2b300000 {
23 compatible = "ti,am64-uart", "ti,am654-uart";
24 reg = <0x00 0x2b300000 0x00 0x100>;
25 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
26 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
27 clocks = <&k3_clks 114 0>;
28 clock-names = "fclk";
Nishanth Menon7937af12023-07-27 04:03:31 -050029 status = "disabled";
Suman Anna1b2f4692022-05-25 13:38:46 +053030 };
31
32 wkup_i2c0: i2c@2b200000 {
33 compatible = "ti,am64-i2c", "ti,omap4-i2c";
Nishanth Menon7937af12023-07-27 04:03:31 -050034 reg = <0x00 0x2b200000 0x00 0x100>;
Suman Anna1b2f4692022-05-25 13:38:46 +053035 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
36 #address-cells = <1>;
37 #size-cells = <0>;
38 power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
39 clocks = <&k3_clks 107 4>;
40 clock-names = "fck";
Nishanth Menon7937af12023-07-27 04:03:31 -050041 status = "disabled";
42 };
43
44 wkup_rtc0: rtc@2b1f0000 {
45 compatible = "ti,am62-rtc";
46 reg = <0x00 0x2b1f0000 0x00 0x100>;
47 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
48 clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
49 clock-names = "vbus", "osc32k";
50 power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
51 wakeup-source;
52 };
53
54 wkup_rti0: watchdog@2b000000 {
55 compatible = "ti,j7-rti-wdt";
56 reg = <0x00 0x2b000000 0x00 0x100>;
57 clocks = <&k3_clks 132 0>;
58 power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
59 assigned-clocks = <&k3_clks 132 0>;
60 assigned-clock-parents = <&k3_clks 132 2>;
61 /* Used by DM firmware */
62 status = "reserved";
63 };
64
65 wkup_vtm0: temperature-sensor@b00000 {
66 compatible = "ti,j7200-vtm";
67 reg = <0x00 0xb00000 0x00 0x400>,
68 <0x00 0xb01000 0x00 0x400>;
69 power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
70 #thermal-sensor-cells = <1>;
Suman Anna1b2f4692022-05-25 13:38:46 +053071 };
72};