blob: ad08be4c8c1b3b83622c7cd728f4b251800a46d4 [file] [log] [blame]
Stephen Warren89c1e2d2016-06-17 09:43:58 -06001# Copyright (c) 2016, NVIDIA CORPORATION.
2#
3# SPDX-License-Identifier: GPL-2.0
4
5obj-$(CONFIG_DM_RESET) += reset-uclass.o
Stephen Warren4581b712016-06-17 09:43:59 -06006obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
7obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
Patrice Chotard584861f2017-03-22 10:54:03 +01008obj-$(CONFIG_STI_RESET) += sti-reset.o
Patrice Chotard23a06412017-09-13 18:00:07 +02009obj-$(CONFIG_STM32_RESET) += stm32-reset.o
Stephen Warrenfe60f062016-09-13 10:45:58 -060010obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o
Stephen Warren4dd99d12016-08-08 11:28:25 -060011obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
Álvaro Fernández Rojas18393f72017-05-03 15:10:21 +020012obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
Masahiro Yamada4fb96c42016-10-08 13:25:31 +090013obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
maxims@google.com858d4972017-04-17 12:00:24 -070014obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
Elaine Zhang760188c2017-12-19 18:22:37 +080015obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
Neil Armstrong20367bb2018-03-29 14:55:25 +020016obj-$(CONFIG_RESET_MESON) += reset-meson.o
Dinh Nguyen2ac71882018-04-04 17:18:20 -050017obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o