blob: 2200bc7c3bb5b49f4e3fdf1b2f979ad34a4cc675 [file] [log] [blame]
Eric Nelsond67b0d92013-03-11 08:44:53 +00001/*
2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
4 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
Eric Nelsond67b0d92013-03-11 08:44:53 +00006 */
7
8#include <common.h>
9#include <asm/io.h>
10#include <asm/arch/clock.h>
11#include <asm/arch/imx-regs.h>
12#include <asm/arch/iomux.h>
13#include <asm/arch/sys_proto.h>
14#include <malloc.h>
15#include <asm/arch/mx6-pins.h>
16#include <asm/errno.h>
17#include <asm/gpio.h>
18#include <asm/imx-common/iomux-v3.h>
19#include <asm/imx-common/mxc_i2c.h>
Giuseppe Pagano164d9842013-11-28 12:32:48 +010020#include <asm/imx-common/sata.h>
Eric Nelsond67b0d92013-03-11 08:44:53 +000021#include <asm/imx-common/boot_mode.h>
Eric Benarda47e4492014-04-04 19:05:53 +020022#include <asm/imx-common/video.h>
Eric Nelsond67b0d92013-03-11 08:44:53 +000023#include <mmc.h>
24#include <fsl_esdhc.h>
25#include <micrel.h>
26#include <miiphy.h>
27#include <netdev.h>
Eric Nelsond67b0d92013-03-11 08:44:53 +000028#include <asm/arch/crm_regs.h>
29#include <asm/arch/mxc_hdmi.h>
30#include <i2c.h>
Eric Nelson9fc42522014-10-02 12:16:27 -070031#include <input.h>
32#include <netdev.h>
Eric Nelson84caf0b2014-10-02 12:16:30 -070033#include <usb/ehci-fsl.h>
Eric Nelsond67b0d92013-03-11 08:44:53 +000034
35DECLARE_GLOBAL_DATA_PTR;
Troy Kisky08ce0742013-09-25 18:41:17 -070036#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
Eric Nelsond67b0d92013-03-11 08:44:53 +000037
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000038#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
39 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
40 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
Eric Nelsond67b0d92013-03-11 08:44:53 +000041
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000042#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
43 PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
44 PAD_CTL_SRE_FAST | PAD_CTL_HYS)
Eric Nelsond67b0d92013-03-11 08:44:53 +000045
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000046#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
47 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
Eric Nelsond67b0d92013-03-11 08:44:53 +000048
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000049#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
Eric Nelsond67b0d92013-03-11 08:44:53 +000050 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
51
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000052#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
53 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
Eric Nelsond67b0d92013-03-11 08:44:53 +000054
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000055#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
56 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
Eric Nelsond67b0d92013-03-11 08:44:53 +000057 PAD_CTL_ODE | PAD_CTL_SRE_FAST)
58
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000059#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \
60 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
Eric Nelsond67b0d92013-03-11 08:44:53 +000061 PAD_CTL_SRE_SLOW)
62
Benoît Thébaudeau7e2173c2013-04-26 01:34:47 +000063#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \
64 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
65 PAD_CTL_HYS | PAD_CTL_SRE_SLOW)
Eric Nelsond67b0d92013-03-11 08:44:53 +000066
67#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
68
69int dram_init(void)
70{
fabio.estevam@freescale.com19a0f7f2013-03-14 02:32:55 +000071 gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024);
Eric Nelsond67b0d92013-03-11 08:44:53 +000072
73 return 0;
74}
75
Eric Nelson9fc42522014-10-02 12:16:27 -070076static iomux_v3_cfg_t const uart1_pads[] = {
Eric Nelson10fda482013-11-04 17:00:51 -070077 MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
78 MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +000079};
80
Eric Nelson9fc42522014-10-02 12:16:27 -070081static iomux_v3_cfg_t const uart2_pads[] = {
Eric Nelson10fda482013-11-04 17:00:51 -070082 MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
83 MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +000084};
85
86#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
87
88/* I2C1, SGTL5000 */
Eric Nelson9fc42522014-10-02 12:16:27 -070089static struct i2c_pads_info i2c_pad_info0 = {
Eric Nelsond67b0d92013-03-11 08:44:53 +000090 .scl = {
91 .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
Eric Nelson10fda482013-11-04 17:00:51 -070092 .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
Eric Nelsond67b0d92013-03-11 08:44:53 +000093 .gp = IMX_GPIO_NR(3, 21)
94 },
95 .sda = {
96 .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
Eric Nelson10fda482013-11-04 17:00:51 -070097 .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC,
Eric Nelsond67b0d92013-03-11 08:44:53 +000098 .gp = IMX_GPIO_NR(3, 28)
99 }
100};
101
102/* I2C2 Camera, MIPI */
Eric Nelson9fc42522014-10-02 12:16:27 -0700103static struct i2c_pads_info i2c_pad_info1 = {
Eric Nelsond67b0d92013-03-11 08:44:53 +0000104 .scl = {
105 .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
Eric Nelson10fda482013-11-04 17:00:51 -0700106 .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
Eric Nelsond67b0d92013-03-11 08:44:53 +0000107 .gp = IMX_GPIO_NR(4, 12)
108 },
109 .sda = {
110 .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
Eric Nelson10fda482013-11-04 17:00:51 -0700111 .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
Eric Nelsond67b0d92013-03-11 08:44:53 +0000112 .gp = IMX_GPIO_NR(4, 13)
113 }
114};
115
116/* I2C3, J15 - RGB connector */
Eric Nelson9fc42522014-10-02 12:16:27 -0700117static struct i2c_pads_info i2c_pad_info2 = {
Eric Nelsond67b0d92013-03-11 08:44:53 +0000118 .scl = {
119 .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC,
Eric Nelson10fda482013-11-04 17:00:51 -0700120 .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC,
Eric Nelsond67b0d92013-03-11 08:44:53 +0000121 .gp = IMX_GPIO_NR(1, 5)
122 },
123 .sda = {
124 .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC,
Eric Nelson10fda482013-11-04 17:00:51 -0700125 .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC,
Eric Nelsond67b0d92013-03-11 08:44:53 +0000126 .gp = IMX_GPIO_NR(7, 11)
127 }
128};
129
Eric Nelson41612472014-10-02 12:16:24 -0700130static iomux_v3_cfg_t const usdhc2_pads[] = {
131 MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
132 MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
133 MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
134 MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
135 MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
136 MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
137};
138
Eric Nelson9fc42522014-10-02 12:16:27 -0700139static iomux_v3_cfg_t const usdhc3_pads[] = {
Eric Nelson10fda482013-11-04 17:00:51 -0700140 MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
141 MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
142 MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
143 MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
144 MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
145 MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
146 MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
Eric Nelsond67b0d92013-03-11 08:44:53 +0000147};
148
Eric Nelson9fc42522014-10-02 12:16:27 -0700149static iomux_v3_cfg_t const usdhc4_pads[] = {
Eric Nelson10fda482013-11-04 17:00:51 -0700150 MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
151 MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
152 MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
153 MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
154 MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
155 MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
156 MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
Eric Nelsond67b0d92013-03-11 08:44:53 +0000157};
158
Eric Nelson9fc42522014-10-02 12:16:27 -0700159static iomux_v3_cfg_t const enet_pads1[] = {
Eric Nelsond67b0d92013-03-11 08:44:53 +0000160 MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
161 MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
Eric Nelson10fda482013-11-04 17:00:51 -0700162 MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
163 MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
164 MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
165 MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
166 MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000167 MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
168 MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
169 /* pin 35 - 1 (PHY_AD2) on reset */
Eric Nelson10fda482013-11-04 17:00:51 -0700170 MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000171 /* pin 32 - 1 - (MODE0) all */
Eric Nelson10fda482013-11-04 17:00:51 -0700172 MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000173 /* pin 31 - 1 - (MODE1) all */
Eric Nelson10fda482013-11-04 17:00:51 -0700174 MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000175 /* pin 28 - 1 - (MODE2) all */
Eric Nelson10fda482013-11-04 17:00:51 -0700176 MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000177 /* pin 27 - 1 - (MODE3) all */
Eric Nelson10fda482013-11-04 17:00:51 -0700178 MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000179 /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
Eric Nelson10fda482013-11-04 17:00:51 -0700180 MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000181 /* pin 42 PHY nRST */
Eric Nelson10fda482013-11-04 17:00:51 -0700182 MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL),
183 MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000184};
185
Eric Nelson9fc42522014-10-02 12:16:27 -0700186static iomux_v3_cfg_t const enet_pads2[] = {
Eric Nelson10fda482013-11-04 17:00:51 -0700187 MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
188 MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
189 MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
190 MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
191 MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000192 MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
193};
194
Troy Kisky08ce0742013-09-25 18:41:17 -0700195static iomux_v3_cfg_t const misc_pads[] = {
196 MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP),
Eric Nelson10fda482013-11-04 17:00:51 -0700197 MX6_PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(WEAK_PULLUP),
198 MX6_PAD_EIM_D30__USB_H1_OC | MUX_PAD_CTRL(WEAK_PULLUP),
Troy Kisky08ce0742013-09-25 18:41:17 -0700199 /* OTG Power enable */
Eric Nelson10fda482013-11-04 17:00:51 -0700200 MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(OUTPUT_40OHM),
Troy Kisky08ce0742013-09-25 18:41:17 -0700201};
202
Eric Nelsond67b0d92013-03-11 08:44:53 +0000203/* wl1271 pads on nitrogen6x */
Eric Nelson9fc42522014-10-02 12:16:27 -0700204static iomux_v3_cfg_t const wl12xx_pads[] = {
Eric Nelson10fda482013-11-04 17:00:51 -0700205 (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK)
Eric Nelsond67b0d92013-03-11 08:44:53 +0000206 | MUX_PAD_CTRL(WEAK_PULLDOWN),
Eric Nelson10fda482013-11-04 17:00:51 -0700207 (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK)
Eric Nelsond67b0d92013-03-11 08:44:53 +0000208 | MUX_PAD_CTRL(OUTPUT_40OHM),
Eric Nelson10fda482013-11-04 17:00:51 -0700209 (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK)
Eric Nelsond67b0d92013-03-11 08:44:53 +0000210 | MUX_PAD_CTRL(OUTPUT_40OHM),
211};
212#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14)
213#define WL12XX_WL_ENABLE_GP IMX_GPIO_NR(6, 15)
214#define WL12XX_BT_ENABLE_GP IMX_GPIO_NR(6, 16)
215
216/* Button assignments for J14 */
217static iomux_v3_cfg_t const button_pads[] = {
218 /* Menu */
Eric Nelson10fda482013-11-04 17:00:51 -0700219 MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000220 /* Back */
Eric Nelson10fda482013-11-04 17:00:51 -0700221 MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000222 /* Labelled Search (mapped to Power under Android) */
Eric Nelson10fda482013-11-04 17:00:51 -0700223 MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000224 /* Home */
Eric Nelson10fda482013-11-04 17:00:51 -0700225 MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000226 /* Volume Down */
Eric Nelson10fda482013-11-04 17:00:51 -0700227 MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000228 /* Volume Up */
Eric Nelson10fda482013-11-04 17:00:51 -0700229 MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000230};
231
232static void setup_iomux_enet(void)
233{
234 gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* SABRE Lite PHY rst */
235 gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* Nitrogen6X PHY rst */
236 gpio_direction_output(IMX_GPIO_NR(6, 30), 1);
237 gpio_direction_output(IMX_GPIO_NR(6, 25), 1);
238 gpio_direction_output(IMX_GPIO_NR(6, 27), 1);
239 gpio_direction_output(IMX_GPIO_NR(6, 28), 1);
240 gpio_direction_output(IMX_GPIO_NR(6, 29), 1);
241 imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1));
242 gpio_direction_output(IMX_GPIO_NR(6, 24), 1);
243
244 /* Need delay 10ms according to KSZ9021 spec */
245 udelay(1000 * 10);
246 gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* SABRE Lite PHY reset */
247 gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* Nitrogen6X PHY reset */
248
249 imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2));
Troy Kiskyadc4a2b2014-10-02 12:16:29 -0700250 udelay(100); /* Wait 100 us before using mii interface */
Eric Nelsond67b0d92013-03-11 08:44:53 +0000251}
252
Eric Nelson9fc42522014-10-02 12:16:27 -0700253static iomux_v3_cfg_t const usb_pads[] = {
Eric Nelson10fda482013-11-04 17:00:51 -0700254 MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000255};
256
257static void setup_iomux_uart(void)
258{
259 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
260 imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
261}
262
263#ifdef CONFIG_USB_EHCI_MX6
264int board_ehci_hcd_init(int port)
265{
266 imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads));
267
268 /* Reset USB hub */
269 gpio_direction_output(IMX_GPIO_NR(7, 12), 0);
270 mdelay(2);
271 gpio_set_value(IMX_GPIO_NR(7, 12), 1);
272
273 return 0;
274}
Troy Kisky08ce0742013-09-25 18:41:17 -0700275
276int board_ehci_power(int port, int on)
277{
278 if (port)
279 return 0;
280 gpio_set_value(GP_USB_OTG_PWR, on);
281 return 0;
282}
283
Eric Nelsond67b0d92013-03-11 08:44:53 +0000284#endif
285
286#ifdef CONFIG_FSL_ESDHC
Eric Nelson9fc42522014-10-02 12:16:27 -0700287static struct fsl_esdhc_cfg usdhc_cfg[2] = {
Eric Nelsond67b0d92013-03-11 08:44:53 +0000288 {USDHC3_BASE_ADDR},
289 {USDHC4_BASE_ADDR},
290};
291
292int board_mmc_getcd(struct mmc *mmc)
293{
294 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
Troy Kisky213e9e32014-10-02 12:16:23 -0700295 int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) :
296 IMX_GPIO_NR(2, 6);
Eric Nelsond67b0d92013-03-11 08:44:53 +0000297
Troy Kisky213e9e32014-10-02 12:16:23 -0700298 gpio_direction_input(gp_cd);
299 return !gpio_get_value(gp_cd);
Eric Nelsond67b0d92013-03-11 08:44:53 +0000300}
301
302int board_mmc_init(bd_t *bis)
303{
304 s32 status = 0;
305 u32 index = 0;
306
307 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
308 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
309
Abbas Razaaad46592013-03-25 09:13:34 +0000310 usdhc_cfg[0].max_bus_width = 4;
311 usdhc_cfg[1].max_bus_width = 4;
312
Eric Nelsond67b0d92013-03-11 08:44:53 +0000313 for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
314 switch (index) {
315 case 0:
316 imx_iomux_v3_setup_multiple_pads(
317 usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
318 break;
319 case 1:
320 imx_iomux_v3_setup_multiple_pads(
321 usdhc4_pads, ARRAY_SIZE(usdhc4_pads));
322 break;
323 default:
324 printf("Warning: you configured more USDHC controllers"
325 "(%d) then supported by the board (%d)\n",
326 index + 1, CONFIG_SYS_FSL_USDHC_NUM);
327 return status;
328 }
329
330 status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
331 }
332
333 return status;
334}
335#endif
336
Eric Nelsond67b0d92013-03-11 08:44:53 +0000337#ifdef CONFIG_MXC_SPI
Eric Nelson9fc42522014-10-02 12:16:27 -0700338static iomux_v3_cfg_t const ecspi1_pads[] = {
Eric Nelsond67b0d92013-03-11 08:44:53 +0000339 /* SS1 */
Fabio Estevam3b316052014-04-11 17:43:53 -0300340 MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000341 MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
342 MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
343 MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
344};
345
Eric Nelson9fc42522014-10-02 12:16:27 -0700346static void setup_spi(void)
Eric Nelsond67b0d92013-03-11 08:44:53 +0000347{
Eric Nelsond67b0d92013-03-11 08:44:53 +0000348 imx_iomux_v3_setup_multiple_pads(ecspi1_pads,
349 ARRAY_SIZE(ecspi1_pads));
350}
351#endif
352
353int board_phy_config(struct phy_device *phydev)
354{
355 /* min rx data delay */
356 ksz9021_phy_extended_write(phydev,
357 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0);
358 /* min tx data delay */
359 ksz9021_phy_extended_write(phydev,
360 MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0);
361 /* max rx/tx clock delay, min rx/tx control */
362 ksz9021_phy_extended_write(phydev,
363 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0);
364 if (phydev->drv->config)
365 phydev->drv->config(phydev);
366
367 return 0;
368}
369
370int board_eth_init(bd_t *bis)
371{
372 uint32_t base = IMX_FEC_BASE;
373 struct mii_dev *bus = NULL;
374 struct phy_device *phydev = NULL;
375 int ret;
376
377 setup_iomux_enet();
378
379#ifdef CONFIG_FEC_MXC
380 bus = fec_get_miibus(base, -1);
381 if (!bus)
382 return 0;
383 /* scan phy 4,5,6,7 */
384 phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII);
385 if (!phydev) {
386 free(bus);
387 return 0;
388 }
389 printf("using phy at %d\n", phydev->addr);
390 ret = fec_probe(bis, -1, base, bus, phydev);
391 if (ret) {
392 printf("FEC MXC: %s:failed\n", __func__);
393 free(phydev);
394 free(bus);
395 }
396#endif
Troy Kisky08ce0742013-09-25 18:41:17 -0700397
Marek Vasutf016f8c2014-02-06 02:43:45 +0100398#ifdef CONFIG_CI_UDC
Troy Kisky08ce0742013-09-25 18:41:17 -0700399 /* For otg ethernet*/
400 usb_eth_initialize(bis);
401#endif
Eric Nelsond67b0d92013-03-11 08:44:53 +0000402 return 0;
403}
404
405static void setup_buttons(void)
406{
407 imx_iomux_v3_setup_multiple_pads(button_pads,
408 ARRAY_SIZE(button_pads));
409}
410
Eric Nelsond67b0d92013-03-11 08:44:53 +0000411#if defined(CONFIG_VIDEO_IPUV3)
412
413static iomux_v3_cfg_t const backlight_pads[] = {
414 /* Backlight on RGB connector: J15 */
Eric Nelson10fda482013-11-04 17:00:51 -0700415 MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000416#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21)
417
418 /* Backlight on LVDS connector: J6 */
Eric Nelson10fda482013-11-04 17:00:51 -0700419 MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL),
Eric Nelsond67b0d92013-03-11 08:44:53 +0000420#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18)
421};
422
423static iomux_v3_cfg_t const rgb_pads[] = {
424 MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK,
425 MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15,
Eric Nelson10fda482013-11-04 17:00:51 -0700426 MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02,
427 MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03,
428 MX6_PAD_DI0_PIN4__GPIO4_IO20,
429 MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00,
430 MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01,
431 MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02,
432 MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03,
433 MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04,
434 MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05,
435 MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06,
436 MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07,
437 MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08,
438 MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09,
439 MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10,
440 MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11,
441 MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12,
442 MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13,
443 MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14,
444 MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15,
445 MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16,
446 MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17,
447 MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18,
448 MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19,
449 MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20,
450 MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21,
451 MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22,
452 MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23,
Eric Nelsond67b0d92013-03-11 08:44:53 +0000453};
454
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -0500455static void do_enable_hdmi(struct display_info_t const *dev)
Eric Nelsond67b0d92013-03-11 08:44:53 +0000456{
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -0500457 imx_enable_hdmi_phy();
Eric Nelsond67b0d92013-03-11 08:44:53 +0000458}
459
460static int detect_i2c(struct display_info_t const *dev)
461{
462 return ((0 == i2c_set_bus_num(dev->bus))
463 &&
464 (0 == i2c_probe(dev->addr)));
465}
466
467static void enable_lvds(struct display_info_t const *dev)
468{
469 struct iomuxc *iomux = (struct iomuxc *)
470 IOMUXC_BASE_ADDR;
471 u32 reg = readl(&iomux->gpr[2]);
472 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT;
473 writel(reg, &iomux->gpr[2]);
474 gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
475}
476
Robert Winkler4328fb02014-10-02 12:16:31 -0700477static void enable_lvds_jeida(struct display_info_t const *dev)
478{
479 struct iomuxc *iomux = (struct iomuxc *)
480 IOMUXC_BASE_ADDR;
481 u32 reg = readl(&iomux->gpr[2]);
482 reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT
483 |IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA;
484 writel(reg, &iomux->gpr[2]);
485 gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
486}
487
Eric Nelsond67b0d92013-03-11 08:44:53 +0000488static void enable_rgb(struct display_info_t const *dev)
489{
490 imx_iomux_v3_setup_multiple_pads(
491 rgb_pads,
492 ARRAY_SIZE(rgb_pads));
493 gpio_direction_output(RGB_BACKLIGHT_GP, 1);
494}
495
Eric Benarda47e4492014-04-04 19:05:53 +0200496struct display_info_t const displays[] = {{
Eric Nelsond67b0d92013-03-11 08:44:53 +0000497 .bus = -1,
498 .addr = 0,
499 .pixfmt = IPU_PIX_FMT_RGB24,
500 .detect = detect_hdmi,
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -0500501 .enable = do_enable_hdmi,
Eric Nelsond67b0d92013-03-11 08:44:53 +0000502 .mode = {
503 .name = "HDMI",
504 .refresh = 60,
505 .xres = 1024,
506 .yres = 768,
507 .pixclock = 15385,
508 .left_margin = 220,
509 .right_margin = 40,
510 .upper_margin = 21,
511 .lower_margin = 7,
512 .hsync_len = 60,
513 .vsync_len = 10,
514 .sync = FB_SYNC_EXT,
515 .vmode = FB_VMODE_NONINTERLACED
516} }, {
Robert Winkler4328fb02014-10-02 12:16:31 -0700517 .bus = 0,
518 .addr = 0,
519 .pixfmt = IPU_PIX_FMT_RGB24,
520 .detect = NULL,
521 .enable = enable_lvds_jeida,
522 .mode = {
523 .name = "LDB-WXGA",
524 .refresh = 60,
525 .xres = 1280,
526 .yres = 800,
527 .pixclock = 14065,
528 .left_margin = 40,
529 .right_margin = 40,
530 .upper_margin = 3,
531 .lower_margin = 80,
532 .hsync_len = 10,
533 .vsync_len = 10,
534 .sync = FB_SYNC_EXT,
535 .vmode = FB_VMODE_NONINTERLACED
536} }, {
Eric Nelsond67b0d92013-03-11 08:44:53 +0000537 .bus = 2,
538 .addr = 0x4,
539 .pixfmt = IPU_PIX_FMT_LVDS666,
540 .detect = detect_i2c,
541 .enable = enable_lvds,
542 .mode = {
543 .name = "Hannstar-XGA",
544 .refresh = 60,
545 .xres = 1024,
546 .yres = 768,
547 .pixclock = 15385,
548 .left_margin = 220,
549 .right_margin = 40,
550 .upper_margin = 21,
551 .lower_margin = 7,
552 .hsync_len = 60,
553 .vsync_len = 10,
554 .sync = FB_SYNC_EXT,
555 .vmode = FB_VMODE_NONINTERLACED
556} }, {
Eric Nelson4adc1122014-10-02 12:16:33 -0700557 .bus = 0,
558 .addr = 0,
559 .pixfmt = IPU_PIX_FMT_LVDS666,
560 .detect = NULL,
561 .enable = enable_lvds,
562 .mode = {
563 .name = "LG-9.7",
564 .refresh = 60,
565 .xres = 1024,
566 .yres = 768,
567 .pixclock = 15385, /* ~65MHz */
568 .left_margin = 480,
569 .right_margin = 260,
570 .upper_margin = 16,
571 .lower_margin = 6,
572 .hsync_len = 250,
573 .vsync_len = 10,
574 .sync = FB_SYNC_EXT,
575 .vmode = FB_VMODE_NONINTERLACED
576} }, {
Eric Nelsond67b0d92013-03-11 08:44:53 +0000577 .bus = 2,
578 .addr = 0x38,
579 .pixfmt = IPU_PIX_FMT_LVDS666,
580 .detect = detect_i2c,
581 .enable = enable_lvds,
582 .mode = {
583 .name = "wsvga-lvds",
584 .refresh = 60,
585 .xres = 1024,
586 .yres = 600,
587 .pixclock = 15385,
588 .left_margin = 220,
589 .right_margin = 40,
590 .upper_margin = 21,
591 .lower_margin = 7,
592 .hsync_len = 60,
593 .vsync_len = 10,
594 .sync = FB_SYNC_EXT,
595 .vmode = FB_VMODE_NONINTERLACED
596} }, {
597 .bus = 2,
598 .addr = 0x48,
599 .pixfmt = IPU_PIX_FMT_RGB666,
600 .detect = detect_i2c,
601 .enable = enable_rgb,
602 .mode = {
603 .name = "wvga-rgb",
604 .refresh = 57,
605 .xres = 800,
606 .yres = 480,
607 .pixclock = 37037,
608 .left_margin = 40,
609 .right_margin = 60,
610 .upper_margin = 10,
611 .lower_margin = 10,
612 .hsync_len = 20,
613 .vsync_len = 10,
614 .sync = 0,
615 .vmode = FB_VMODE_NONINTERLACED
Eric Nelson443d4d12014-10-02 12:16:32 -0700616} }, {
617 .bus = 0,
618 .addr = 0,
619 .pixfmt = IPU_PIX_FMT_RGB24,
620 .detect = NULL,
621 .enable = enable_rgb,
622 .mode = {
623 .name = "qvga",
624 .refresh = 60,
625 .xres = 320,
626 .yres = 240,
627 .pixclock = 37037,
628 .left_margin = 38,
629 .right_margin = 37,
630 .upper_margin = 16,
631 .lower_margin = 15,
632 .hsync_len = 30,
633 .vsync_len = 3,
634 .sync = 0,
635 .vmode = FB_VMODE_NONINTERLACED
Eric Nelsond67b0d92013-03-11 08:44:53 +0000636} } };
Eric Benarda47e4492014-04-04 19:05:53 +0200637size_t display_count = ARRAY_SIZE(displays);
Eric Nelsond67b0d92013-03-11 08:44:53 +0000638
Eric Nelsonc9c86bd2014-10-02 12:16:22 -0700639int board_cfb_skip(void)
640{
641 return NULL != getenv("novideo");
642}
643
Eric Nelsond67b0d92013-03-11 08:44:53 +0000644static void setup_display(void)
645{
646 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
Eric Nelsond67b0d92013-03-11 08:44:53 +0000647 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
Eric Nelsond67b0d92013-03-11 08:44:53 +0000648 int reg;
649
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -0500650 enable_ipu_clock();
651 imx_setup_hdmi();
Eric Nelsond67b0d92013-03-11 08:44:53 +0000652 /* Turn on LDB0,IPU,IPU DI0 clocks */
653 reg = __raw_readl(&mxc_ccm->CCGR3);
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -0500654 reg |= MXC_CCM_CCGR3_LDB_DI0_MASK;
Eric Nelsond67b0d92013-03-11 08:44:53 +0000655 writel(reg, &mxc_ccm->CCGR3);
656
Eric Nelsond67b0d92013-03-11 08:44:53 +0000657 /* set LDB0, LDB1 clk select to 011/011 */
658 reg = readl(&mxc_ccm->cs2cdr);
659 reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
660 |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
661 reg |= (3<<MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)
662 |(3<<MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
663 writel(reg, &mxc_ccm->cs2cdr);
664
665 reg = readl(&mxc_ccm->cscmr2);
666 reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV;
667 writel(reg, &mxc_ccm->cscmr2);
668
669 reg = readl(&mxc_ccm->chsccdr);
Eric Nelsond67b0d92013-03-11 08:44:53 +0000670 reg |= (CHSCCDR_CLK_SEL_LDB_DI0
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -0500671 <<MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
Eric Nelsond67b0d92013-03-11 08:44:53 +0000672 writel(reg, &mxc_ccm->chsccdr);
673
674 reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
675 |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH
676 |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
677 |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
678 |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
679 |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
680 |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
681 |IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED
682 |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0;
683 writel(reg, &iomux->gpr[2]);
684
685 reg = readl(&iomux->gpr[3]);
Eric Nelson8907c2c2013-08-20 11:44:43 -0700686 reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK
687 |IOMUXC_GPR3_HDMI_MUX_CTL_MASK))
Eric Nelsond67b0d92013-03-11 08:44:53 +0000688 | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
689 <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
690 writel(reg, &iomux->gpr[3]);
691
692 /* backlights off until needed */
693 imx_iomux_v3_setup_multiple_pads(backlight_pads,
694 ARRAY_SIZE(backlight_pads));
695 gpio_direction_input(LVDS_BACKLIGHT_GP);
696 gpio_direction_input(RGB_BACKLIGHT_GP);
697}
698#endif
699
Eric Nelsona3b527a2014-10-02 12:16:25 -0700700static iomux_v3_cfg_t const init_pads[] = {
Troy Kisky693cccf2014-10-02 12:16:26 -0700701 /* SGTL5000 sys_mclk */
702 NEW_PAD_CTRL(MX6_PAD_GPIO_0__CCM_CLKO1, OUTPUT_40OHM),
703
704 /* J5 - Camera MCLK */
705 NEW_PAD_CTRL(MX6_PAD_GPIO_3__CCM_CLKO2, OUTPUT_40OHM),
706
707 /* wl1271 pads on nitrogen6x */
Eric Nelsona3b527a2014-10-02 12:16:25 -0700708 /* WL12XX_WL_IRQ_GP */
709 NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN),
710 /* WL12XX_WL_ENABLE_GP */
711 NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM),
712 /* WL12XX_BT_ENABLE_GP */
713 NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM),
714 /* USB otg power */
715 NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, OUTPUT_40OHM),
716 NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, OUTPUT_40OHM),
717 NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM),
718 NEW_PAD_CTRL(MX6_PAD_GPIO_8__GPIO1_IO08, OUTPUT_40OHM),
719 NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06, OUTPUT_40OHM),
720};
721
722#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14)
723
724static unsigned gpios_out_low[] = {
725 /* Disable wl1271 */
726 IMX_GPIO_NR(6, 15), /* disable wireless */
727 IMX_GPIO_NR(6, 16), /* disable bluetooth */
728 IMX_GPIO_NR(3, 22), /* disable USB otg power */
729 IMX_GPIO_NR(2, 5), /* ov5640 mipi camera reset */
730 IMX_GPIO_NR(1, 8), /* ov5642 reset */
731};
732
733static unsigned gpios_out_high[] = {
734 IMX_GPIO_NR(1, 6), /* ov5642 powerdown */
735 IMX_GPIO_NR(6, 9), /* ov5640 mipi camera power down */
736};
737
738static void set_gpios(unsigned *p, int cnt, int val)
739{
740 int i;
741
742 for (i = 0; i < cnt; i++)
743 gpio_direction_output(*p++, val);
744}
745
Eric Nelsond67b0d92013-03-11 08:44:53 +0000746int board_early_init_f(void)
747{
748 setup_iomux_uart();
749
Eric Nelsona3b527a2014-10-02 12:16:25 -0700750 set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1);
751 set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0);
Eric Nelsond67b0d92013-03-11 08:44:53 +0000752 gpio_direction_input(WL12XX_WL_IRQ_GP);
Eric Nelsond67b0d92013-03-11 08:44:53 +0000753
754 imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads));
Eric Nelsona3b527a2014-10-02 12:16:25 -0700755 imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads));
Eric Nelsond67b0d92013-03-11 08:44:53 +0000756 setup_buttons();
757
758#if defined(CONFIG_VIDEO_IPUV3)
759 setup_display();
760#endif
761 return 0;
762}
763
764/*
765 * Do not overwrite the console
766 * Use always serial for U-Boot console
767 */
768int overwrite_console(void)
769{
770 return 1;
771}
772
773int board_init(void)
774{
Fabio Estevam0a11d6f2014-07-09 17:59:54 -0300775 struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
Troy Kisky71328692013-09-25 18:41:16 -0700776
777 clrsetbits_le32(&iomuxc_regs->gpr[1],
778 IOMUXC_GPR1_OTG_ID_MASK,
779 IOMUXC_GPR1_OTG_ID_GPIO1);
780
Troy Kisky08ce0742013-09-25 18:41:17 -0700781 imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads));
782
Eric Nelsond67b0d92013-03-11 08:44:53 +0000783 /* address of boot parameters */
784 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
785
786#ifdef CONFIG_MXC_SPI
787 setup_spi();
788#endif
Eric Nelson41612472014-10-02 12:16:24 -0700789 imx_iomux_v3_setup_multiple_pads(
790 usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
Eric Nelsond67b0d92013-03-11 08:44:53 +0000791 setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
792 setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
793 setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2);
794
795#ifdef CONFIG_CMD_SATA
796 setup_sata();
797#endif
798
799 return 0;
800}
801
802int checkboard(void)
803{
804 if (gpio_get_value(WL12XX_WL_IRQ_GP))
805 puts("Board: Nitrogen6X\n");
806 else
807 puts("Board: SABRE Lite\n");
808
809 return 0;
810}
811
812struct button_key {
813 char const *name;
814 unsigned gpnum;
815 char ident;
816};
817
818static struct button_key const buttons[] = {
819 {"back", IMX_GPIO_NR(2, 2), 'B'},
820 {"home", IMX_GPIO_NR(2, 4), 'H'},
821 {"menu", IMX_GPIO_NR(2, 1), 'M'},
822 {"search", IMX_GPIO_NR(2, 3), 'S'},
823 {"volup", IMX_GPIO_NR(7, 13), 'V'},
824 {"voldown", IMX_GPIO_NR(4, 5), 'v'},
825};
826
827/*
828 * generate a null-terminated string containing the buttons pressed
829 * returns number of keys pressed
830 */
831static int read_keys(char *buf)
832{
833 int i, numpressed = 0;
834 for (i = 0; i < ARRAY_SIZE(buttons); i++) {
835 if (!gpio_get_value(buttons[i].gpnum))
836 buf[numpressed++] = buttons[i].ident;
837 }
838 buf[numpressed] = '\0';
839 return numpressed;
840}
841
842static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
843{
844 char envvalue[ARRAY_SIZE(buttons)+1];
845 int numpressed = read_keys(envvalue);
846 setenv("keybd", envvalue);
847 return numpressed == 0;
848}
849
850U_BOOT_CMD(
851 kbd, 1, 1, do_kbd,
852 "Tests for keypresses, sets 'keybd' environment variable",
853 "Returns 0 (true) to shell if key is pressed."
854);
855
856#ifdef CONFIG_PREBOOT
857static char const kbd_magic_prefix[] = "key_magic";
858static char const kbd_command_prefix[] = "key_cmd";
859
860static void preboot_keys(void)
861{
862 int numpressed;
863 char keypress[ARRAY_SIZE(buttons)+1];
864 numpressed = read_keys(keypress);
865 if (numpressed) {
866 char *kbd_magic_keys = getenv("magic_keys");
867 char *suffix;
868 /*
869 * loop over all magic keys
870 */
871 for (suffix = kbd_magic_keys; *suffix; ++suffix) {
872 char *keys;
873 char magic[sizeof(kbd_magic_prefix) + 1];
874 sprintf(magic, "%s%c", kbd_magic_prefix, *suffix);
875 keys = getenv(magic);
876 if (keys) {
877 if (!strcmp(keys, keypress))
878 break;
879 }
880 }
881 if (*suffix) {
882 char cmd_name[sizeof(kbd_command_prefix) + 1];
883 char *cmd;
884 sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix);
885 cmd = getenv(cmd_name);
886 if (cmd) {
887 setenv("preboot", cmd);
888 return;
889 }
890 }
891 }
892}
893#endif
894
895#ifdef CONFIG_CMD_BMODE
896static const struct boot_mode board_boot_modes[] = {
897 /* 4 bit bus width */
898 {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
899 {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
900 {NULL, 0},
901};
902#endif
903
904int misc_init_r(void)
905{
906#ifdef CONFIG_PREBOOT
907 preboot_keys();
908#endif
909
910#ifdef CONFIG_CMD_BMODE
911 add_board_boot_modes(board_boot_modes);
912#endif
913 return 0;
914}