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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Robert Baldygadab067c2014-09-19 12:17:55 +02002/*
3 * Copyright (C) 2014 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Robert Baldyga <r.baldyga@samsung.com>
6 *
7 * based on arch/arm/cpu/armv7/omap3/cache.S
Robert Baldygadab067c2014-09-19 12:17:55 +02008 */
9
10#include <common.h>
Simon Glass9edefc22019-11-14 12:57:37 -070011#include <cpu_func.h>
Simon Glass90526e92020-05-10 11:39:56 -060012#include <asm/cache.h>
Robert Baldygadab067c2014-09-19 12:17:55 +020013
Trevor Woerner10015022019-05-03 09:41:00 -040014#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
Robert Baldygadab067c2014-09-19 12:17:55 +020015void enable_caches(void)
16{
17 dcache_enable();
18}
19
20void disable_caches(void)
21{
22 dcache_disable();
23}
24#endif
25
26#ifndef CONFIG_SYS_L2CACHE_OFF
27void v7_outer_cache_enable(void)
28{
29 __asm(
30 "push {r0, r1, r2, lr}\n\t"
31 "mrc 15, 0, r3, cr1, cr0, 1\n\t"
32 "orr r3, r3, #2\n\t"
33 "mcr 15, 0, r3, cr1, cr0, 1\n\t"
34 "pop {r1, r2, r3, pc}"
35 );
36}
37
38void v7_outer_cache_disable(void)
39{
40 __asm(
41 "push {r0, r1, r2, lr}\n\t"
42 "mrc 15, 0, r3, cr1, cr0, 1\n\t"
43 "bic r3, r3, #2\n\t"
44 "mcr 15, 0, r3, cr1, cr0, 1\n\t"
45 "pop {r1, r2, r3, pc}"
46 );
47}
48#endif