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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 4c216f556c4f909799e5608d937ed1c0f93c2bd9 / . / board / renesas / lager / qos.c
blob: 374275747dbd9e30ae0dec739df70ecdac62730e [file] [log] [blame]
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1/*
2 * board/renesas/lager/qos.c
3 *
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]4 * Copyright (C) 2013,2014 Renesas Electronics Corporation
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#include <common.h>
10#include <asm/processor.h>
11#include <asm/mach-types.h>
12#include <asm/io.h>
13#include <asm/arch/rmobile.h>
14
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]15/* QoS version 0.955 */
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]16
17enum {
18 DBSC3_R00, DBSC3_R01, DBSC3_R02, DBSC3_R03, DBSC3_R04,
19 DBSC3_R05, DBSC3_R06, DBSC3_R07, DBSC3_R08, DBSC3_R09,
20 DBSC3_R10, DBSC3_R11, DBSC3_R12, DBSC3_R13, DBSC3_R14,
21 DBSC3_R15,
22 DBSC3_W00, DBSC3_W01, DBSC3_W02, DBSC3_W03, DBSC3_W04,
23 DBSC3_W05, DBSC3_W06, DBSC3_W07, DBSC3_W08, DBSC3_W09,
24 DBSC3_W10, DBSC3_W11, DBSC3_W12, DBSC3_W13, DBSC3_W14,
25 DBSC3_W15,
26 DBSC3_NR,
27};
28
29static const u32 dbsc3_qos_addr[DBSC3_NR] = {
30 [DBSC3_R00] = DBSC3_0_QOS_R0_BASE,
31 [DBSC3_R01] = DBSC3_0_QOS_R1_BASE,
32 [DBSC3_R02] = DBSC3_0_QOS_R2_BASE,
33 [DBSC3_R03] = DBSC3_0_QOS_R3_BASE,
34 [DBSC3_R04] = DBSC3_0_QOS_R4_BASE,
35 [DBSC3_R05] = DBSC3_0_QOS_R5_BASE,
36 [DBSC3_R06] = DBSC3_0_QOS_R6_BASE,
37 [DBSC3_R07] = DBSC3_0_QOS_R7_BASE,
38 [DBSC3_R08] = DBSC3_0_QOS_R8_BASE,
39 [DBSC3_R09] = DBSC3_0_QOS_R9_BASE,
40 [DBSC3_R10] = DBSC3_0_QOS_R10_BASE,
41 [DBSC3_R11] = DBSC3_0_QOS_R11_BASE,
42 [DBSC3_R12] = DBSC3_0_QOS_R12_BASE,
43 [DBSC3_R13] = DBSC3_0_QOS_R13_BASE,
44 [DBSC3_R14] = DBSC3_0_QOS_R14_BASE,
45 [DBSC3_R15] = DBSC3_0_QOS_R15_BASE,
46 [DBSC3_W00] = DBSC3_0_QOS_W0_BASE,
47 [DBSC3_W01] = DBSC3_0_QOS_W1_BASE,
48 [DBSC3_W02] = DBSC3_0_QOS_W2_BASE,
49 [DBSC3_W03] = DBSC3_0_QOS_W3_BASE,
50 [DBSC3_W04] = DBSC3_0_QOS_W4_BASE,
51 [DBSC3_W05] = DBSC3_0_QOS_W5_BASE,
52 [DBSC3_W06] = DBSC3_0_QOS_W6_BASE,
53 [DBSC3_W07] = DBSC3_0_QOS_W7_BASE,
54 [DBSC3_W08] = DBSC3_0_QOS_W8_BASE,
55 [DBSC3_W09] = DBSC3_0_QOS_W9_BASE,
56 [DBSC3_W10] = DBSC3_0_QOS_W10_BASE,
57 [DBSC3_W11] = DBSC3_0_QOS_W11_BASE,
58 [DBSC3_W12] = DBSC3_0_QOS_W12_BASE,
59 [DBSC3_W13] = DBSC3_0_QOS_W13_BASE,
60 [DBSC3_W14] = DBSC3_0_QOS_W14_BASE,
61 [DBSC3_W15] = DBSC3_0_QOS_W15_BASE,
62};
63
64void qos_init(void)
65{
66 int i;
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]67 struct rcar_s3c *s3c;
68 struct rcar_s3c_qos *s3c_qos;
69 struct rcar_dbsc3_qos *qos_addr;
70 struct rcar_mxi *mxi;
71 struct rcar_mxi_qos *mxi_qos;
72 struct rcar_axi_qos *axi_qos;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]73
74 /* DBSC DBADJ2 */
75 writel(0x20042004, DBSC3_0_DBADJ2);
76
77 /* S3C -QoS */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]78 s3c = (struct rcar_s3c *)S3C_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]79 writel(0x80FF1C1E, &s3c->s3cadsplcr);
80 writel(0x1F060505, &s3c->s3crorr);
81 writel(0x1F020100, &s3c->s3cworr);
82
83 /* QoS Control Registers */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]84 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]85 writel(0x00800080, &s3c_qos->s3cqos0);
86 writel(0x22000010, &s3c_qos->s3cqos1);
87 writel(0x22002200, &s3c_qos->s3cqos2);
88 writel(0x2F002200, &s3c_qos->s3cqos3);
89 writel(0x2F002F00, &s3c_qos->s3cqos4);
90 writel(0x22000010, &s3c_qos->s3cqos5);
91 writel(0x22002200, &s3c_qos->s3cqos6);
92 writel(0x2F002200, &s3c_qos->s3cqos7);
93 writel(0x2F002F00, &s3c_qos->s3cqos8);
94
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]95 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]96 writel(0x00800080, &s3c_qos->s3cqos0);
97 writel(0x22000010, &s3c_qos->s3cqos1);
98 writel(0x22002200, &s3c_qos->s3cqos2);
99 writel(0x2F002200, &s3c_qos->s3cqos3);
100 writel(0x2F002F00, &s3c_qos->s3cqos4);
101 writel(0x22000010, &s3c_qos->s3cqos5);
102 writel(0x22002200, &s3c_qos->s3cqos6);
103 writel(0x2F002200, &s3c_qos->s3cqos7);
104 writel(0x2F002F00, &s3c_qos->s3cqos8);
105
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]106 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]107 writel(0x80918099, &s3c_qos->s3cqos0);
108 writel(0x20410010, &s3c_qos->s3cqos1);
109 writel(0x200A2023, &s3c_qos->s3cqos2);
110 writel(0x20502001, &s3c_qos->s3cqos3);
111 writel(0x00002032, &s3c_qos->s3cqos4);
112 writel(0x20410FFF, &s3c_qos->s3cqos5);
113 writel(0x200A2023, &s3c_qos->s3cqos6);
114 writel(0x20502001, &s3c_qos->s3cqos7);
115 writel(0x20142032, &s3c_qos->s3cqos8);
116
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]117 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]118
119 writel(0x00810089, &s3c_qos->s3cqos0);
120 writel(0x20410001, &s3c_qos->s3cqos1);
121 writel(0x200A2023, &s3c_qos->s3cqos2);
122 writel(0x20502001, &s3c_qos->s3cqos3);
123 writel(0x00002032, &s3c_qos->s3cqos4);
124 writel(0x20410FFF, &s3c_qos->s3cqos5);
125 writel(0x200A2023, &s3c_qos->s3cqos6);
126 writel(0x20502001, &s3c_qos->s3cqos7);
127 writel(0x20142032, &s3c_qos->s3cqos8);
128
129 writel(0x00200808, &s3c->s3carcr11);
130
131 /* DBSC -QoS */
132 /* DBSC0 - Read/Write */
133 for (i = DBSC3_R00; i < DBSC3_NR; i++) {
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]134 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_qos_addr[i];
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]135 writel(0x00000203, &qos_addr->dblgcnt);
136 writel(0x00002064, &qos_addr->dbtmval0);
137 writel(0x00002048, &qos_addr->dbtmval1);
138 writel(0x00002032, &qos_addr->dbtmval2);
139 writel(0x00002019, &qos_addr->dbtmval3);
140 writel(0x00000001, &qos_addr->dbrqctr);
141 writel(0x00002019, &qos_addr->dbthres0);
142 writel(0x00002019, &qos_addr->dbthres1);
143 writel(0x00002019, &qos_addr->dbthres2);
144 writel(0x00000000, &qos_addr->dblgqon);
145 }
146 /* CCI-400 -QoS */
147 writel(0x20001000, CCI_400_MAXOT_1);
148 writel(0x20001000, CCI_400_MAXOT_2);
149 writel(0x0000000C, CCI_400_QOSCNTL_1);
150 writel(0x0000000C, CCI_400_QOSCNTL_2);
151
152 /* MXI -QoS */
153 /* Transaction Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]154 mxi = (struct rcar_mxi *)MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]155 writel(0x00000013, &mxi->mxrtcr);
156 writel(0x00000013, &mxi->mxwtcr);
157 writel(0x00B800C0, &mxi->mxsaar0);
158 writel(0x02000800, &mxi->mxsaar1);
159 writel(0x00200000, &mxi->mxs3cracr);
160 writel(0x00200000, &mxi->mxs3cwacr);
161 writel(0x00200000, &mxi->mxaxiracr);
162 writel(0x00200000, &mxi->mxaxiwacr);
163
164 /* QoS Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]165 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]166 writel(0x0000000C, &mxi_qos->vspdu0);
167 writel(0x0000000C, &mxi_qos->vspdu1);
168 writel(0x0000000D, &mxi_qos->du0);
169 writel(0x0000000D, &mxi_qos->du1);
170
171 /* AXI -QoS */
172 /* Transaction Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]173 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]174 writel(0x00000002, &axi_qos->qosconf);
175 writel(0x0000200F, &axi_qos->qosctset0);
176 writel(0x00002009, &axi_qos->qosctset1);
177 writel(0x00002003, &axi_qos->qosctset2);
178 writel(0x00002003, &axi_qos->qosctset3);
179 writel(0x00000001, &axi_qos->qosreqctr);
180 writel(0x00002006, &axi_qos->qosthres0);
181 writel(0x00002001, &axi_qos->qosthres1);
182 writel(0x00000000, &axi_qos->qosthres2);
183 writel(0x00000001, &axi_qos->qosqon);
184
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]185 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]186 writel(0x00000000, &axi_qos->qosconf);
187 writel(0x0000200A, &axi_qos->qosctset0);
188 writel(0x00000001, &axi_qos->qosreqctr);
189 writel(0x00002006, &axi_qos->qosthres0);
190 writel(0x00002001, &axi_qos->qosthres1);
191 writel(0x00000000, &axi_qos->qosthres2);
192 writel(0x00000001, &axi_qos->qosqon);
193
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]194 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]195 writel(0x00000000, &axi_qos->qosconf);
196 writel(0x0000200A, &axi_qos->qosctset0);
197 writel(0x00000001, &axi_qos->qosreqctr);
198 writel(0x00002006, &axi_qos->qosthres0);
199 writel(0x00002001, &axi_qos->qosthres1);
200 writel(0x00000000, &axi_qos->qosthres2);
201 writel(0x00000001, &axi_qos->qosqon);
202
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]203 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]204 writel(0x00000000, &axi_qos->qosconf);
205 writel(0x00002002, &axi_qos->qosctset0);
206 writel(0x00000001, &axi_qos->qosreqctr);
207 writel(0x00002006, &axi_qos->qosthres0);
208 writel(0x00002001, &axi_qos->qosthres1);
209 writel(0x00000000, &axi_qos->qosthres2);
210 writel(0x00000001, &axi_qos->qosqon);
211
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]212 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]213 writel(0x00000000, &axi_qos->qosconf);
214 writel(0x00002004, &axi_qos->qosctset0);
215 writel(0x00000001, &axi_qos->qosreqctr);
216 writel(0x00002006, &axi_qos->qosthres0);
217 writel(0x00002001, &axi_qos->qosthres1);
218 writel(0x00000000, &axi_qos->qosthres2);
219 writel(0x00000001, &axi_qos->qosqon);
220
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]221 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]222 writel(0x00000002, &axi_qos->qosconf);
223 writel(0x0000200F, &axi_qos->qosctset0);
224 writel(0x00002009, &axi_qos->qosctset1);
225 writel(0x00002003, &axi_qos->qosctset2);
226 writel(0x00002003, &axi_qos->qosctset3);
227 writel(0x00000001, &axi_qos->qosreqctr);
228 writel(0x00002006, &axi_qos->qosthres0);
229 writel(0x00002001, &axi_qos->qosthres1);
230 writel(0x00000000, &axi_qos->qosthres2);
231 writel(0x00000001, &axi_qos->qosqon);
232
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]233 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]234 writel(0x00000002, &axi_qos->qosconf);
235 writel(0x0000200F, &axi_qos->qosctset0);
236 writel(0x00002009, &axi_qos->qosctset1);
237 writel(0x00002003, &axi_qos->qosctset2);
238 writel(0x00002003, &axi_qos->qosctset3);
239 writel(0x00000001, &axi_qos->qosreqctr);
240 writel(0x00002006, &axi_qos->qosthres0);
241 writel(0x00002001, &axi_qos->qosthres1);
242 writel(0x00000000, &axi_qos->qosthres2);
243 writel(0x00000001, &axi_qos->qosqon);
244
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]245 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]246 writel(0x00000002, &axi_qos->qosconf);
247 writel(0x0000200F, &axi_qos->qosctset0);
248 writel(0x00002009, &axi_qos->qosctset1);
249 writel(0x00002003, &axi_qos->qosctset2);
250 writel(0x00002003, &axi_qos->qosctset3);
251 writel(0x00000001, &axi_qos->qosreqctr);
252 writel(0x00002006, &axi_qos->qosthres0);
253 writel(0x00002001, &axi_qos->qosthres1);
254 writel(0x00000000, &axi_qos->qosthres2);
255 writel(0x00000001, &axi_qos->qosqon);
256
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]257 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]258 writel(0x00000000, &axi_qos->qosconf);
259 writel(0x00002014, &axi_qos->qosctset0);
260 writel(0x00000001, &axi_qos->qosreqctr);
261 writel(0x00002006, &axi_qos->qosthres0);
262 writel(0x00002001, &axi_qos->qosthres1);
263 writel(0x00000000, &axi_qos->qosthres2);
264 writel(0x00000001, &axi_qos->qosqon);
265
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]266 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]267 writel(0x00000001, &axi_qos->qosconf);
268 writel(0x00002001, &axi_qos->qosctset0);
269 writel(0x00002009, &axi_qos->qosctset1);
270 writel(0x00002003, &axi_qos->qosctset2);
271 writel(0x00002003, &axi_qos->qosctset3);
272 writel(0x00000001, &axi_qos->qosreqctr);
273 writel(0x00002006, &axi_qos->qosthres0);
274 writel(0x00002001, &axi_qos->qosthres1);
275 writel(0x00000000, &axi_qos->qosthres2);
276 writel(0x00000001, &axi_qos->qosqon);
277
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]278 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]279 writel(0x00000001, &axi_qos->qosconf);
280 writel(0x00002001, &axi_qos->qosctset0);
281 writel(0x00002009, &axi_qos->qosctset1);
282 writel(0x00002003, &axi_qos->qosctset2);
283 writel(0x00002003, &axi_qos->qosctset3);
284 writel(0x00000001, &axi_qos->qosreqctr);
285 writel(0x00002006, &axi_qos->qosthres0);
286 writel(0x00002001, &axi_qos->qosthres1);
287 writel(0x00000000, &axi_qos->qosthres2);
288 writel(0x00000001, &axi_qos->qosqon);
289
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]290 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]291 writel(0x00000001, &axi_qos->qosconf);
292 writel(0x00002001, &axi_qos->qosctset0);
293 writel(0x00002009, &axi_qos->qosctset1);
294 writel(0x00002003, &axi_qos->qosctset2);
295 writel(0x00002003, &axi_qos->qosctset3);
296 writel(0x00000001, &axi_qos->qosreqctr);
297 writel(0x00002006, &axi_qos->qosthres0);
298 writel(0x00002001, &axi_qos->qosthres1);
299 writel(0x00000000, &axi_qos->qosthres2);
300 writel(0x00000001, &axi_qos->qosqon);
301
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]302 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]303 writel(0x00000001, &axi_qos->qosconf);
304 writel(0x00002001, &axi_qos->qosctset0);
305 writel(0x00002009, &axi_qos->qosctset1);
306 writel(0x00002003, &axi_qos->qosctset2);
307 writel(0x00002003, &axi_qos->qosctset3);
308 writel(0x00000001, &axi_qos->qosreqctr);
309 writel(0x00002006, &axi_qos->qosthres0);
310 writel(0x00002001, &axi_qos->qosthres1);
311 writel(0x00000000, &axi_qos->qosthres2);
312 writel(0x00000001, &axi_qos->qosqon);
313
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]314 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]315 writel(0x00000001, &axi_qos->qosconf);
316 writel(0x00002001, &axi_qos->qosctset0);
317 writel(0x00002009, &axi_qos->qosctset1);
318 writel(0x00002003, &axi_qos->qosctset2);
319 writel(0x00002003, &axi_qos->qosctset3);
320 writel(0x00000001, &axi_qos->qosreqctr);
321 writel(0x00002006, &axi_qos->qosthres0);
322 writel(0x00002001, &axi_qos->qosthres1);
323 writel(0x00000000, &axi_qos->qosthres2);
324 writel(0x00000001, &axi_qos->qosqon);
325
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]326 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]327 writel(0x00000000, &axi_qos->qosconf);
328 writel(0x00002002, &axi_qos->qosctset0);
329 writel(0x00000001, &axi_qos->qosreqctr);
330 writel(0x00002006, &axi_qos->qosthres0);
331 writel(0x00002001, &axi_qos->qosthres1);
332 writel(0x00000000, &axi_qos->qosthres2);
333 writel(0x00000001, &axi_qos->qosqon);
334
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]335 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]336 writel(0x00000000, &axi_qos->qosconf);
337 writel(0x00002002, &axi_qos->qosctset0);
338 writel(0x00000001, &axi_qos->qosreqctr);
339 writel(0x00002006, &axi_qos->qosthres0);
340 writel(0x00002001, &axi_qos->qosthres1);
341 writel(0x00000000, &axi_qos->qosthres2);
342 writel(0x00000001, &axi_qos->qosqon);
343
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]344 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]345 writel(0x00000000, &axi_qos->qosconf);
346 writel(0x00002014, &axi_qos->qosctset0);
347 writel(0x00000001, &axi_qos->qosreqctr);
348 writel(0x00002006, &axi_qos->qosthres0);
349 writel(0x00002001, &axi_qos->qosthres1);
350 writel(0x00000000, &axi_qos->qosthres2);
351 writel(0x00000001, &axi_qos->qosqon);
352
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]353 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]354 writel(0x00000002, &axi_qos->qosconf);
355 writel(0x0000200F, &axi_qos->qosctset0);
356 writel(0x00002009, &axi_qos->qosctset1);
357 writel(0x00002003, &axi_qos->qosctset2);
358 writel(0x00002003, &axi_qos->qosctset3);
359 writel(0x00000001, &axi_qos->qosreqctr);
360 writel(0x00002006, &axi_qos->qosthres0);
361 writel(0x00002001, &axi_qos->qosthres1);
362 writel(0x00000000, &axi_qos->qosthres2);
363 writel(0x00000001, &axi_qos->qosqon);
364
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]365 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]366 writel(0x00000000, &axi_qos->qosconf);
367 writel(0x0000200A, &axi_qos->qosctset0);
368 writel(0x00000001, &axi_qos->qosreqctr);
369 writel(0x00002006, &axi_qos->qosthres0);
370 writel(0x00002001, &axi_qos->qosthres1);
371 writel(0x00000000, &axi_qos->qosthres2);
372 writel(0x00000001, &axi_qos->qosqon);
373
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]374 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]375 writel(0x00000000, &axi_qos->qosconf);
376 writel(0x0000200A, &axi_qos->qosctset0);
377 writel(0x00000001, &axi_qos->qosreqctr);
378 writel(0x00002006, &axi_qos->qosthres0);
379 writel(0x00002001, &axi_qos->qosthres1);
380 writel(0x00000000, &axi_qos->qosthres2);
381 writel(0x00000001, &axi_qos->qosqon);
382
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]383 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]384 writel(0x00000000, &axi_qos->qosconf);
385 writel(0x00002005, &axi_qos->qosctset0);
386 writel(0x00000001, &axi_qos->qosreqctr);
387 writel(0x00002006, &axi_qos->qosthres0);
388 writel(0x00002001, &axi_qos->qosthres1);
389 writel(0x00000000, &axi_qos->qosthres2);
390 writel(0x00000001, &axi_qos->qosqon);
391
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]392 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]393 writel(0x00000000, &axi_qos->qosconf);
394 writel(0x00002005, &axi_qos->qosctset0);
395 writel(0x00000001, &axi_qos->qosreqctr);
396 writel(0x00002006, &axi_qos->qosthres0);
397 writel(0x00002001, &axi_qos->qosthres1);
398 writel(0x00000000, &axi_qos->qosthres2);
399 writel(0x00000001, &axi_qos->qosqon);
400
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]401 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]402 writel(0x00000000, &axi_qos->qosconf);
403 writel(0x00002005, &axi_qos->qosctset0);
404 writel(0x00000001, &axi_qos->qosreqctr);
405 writel(0x00002006, &axi_qos->qosthres0);
406 writel(0x00002001, &axi_qos->qosthres1);
407 writel(0x00000000, &axi_qos->qosthres2);
408 writel(0x00000001, &axi_qos->qosqon);
409
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]410 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]411 writel(0x00000000, &axi_qos->qosconf);
412 writel(0x00002014, &axi_qos->qosctset0);
413 writel(0x00000001, &axi_qos->qosreqctr);
414 writel(0x00002006, &axi_qos->qosthres0);
415 writel(0x00002001, &axi_qos->qosthres1);
416 writel(0x00000000, &axi_qos->qosthres2);
417 writel(0x00000001, &axi_qos->qosqon);
418
419 /* QoS Register (RT-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]420 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]421 writel(0x00000000, &axi_qos->qosconf);
422 writel(0x00002005, &axi_qos->qosctset0);
423 writel(0x00002009, &axi_qos->qosctset1);
424 writel(0x00002003, &axi_qos->qosctset2);
425 writel(0x00002003, &axi_qos->qosctset3);
426 writel(0x00000001, &axi_qos->qosreqctr);
427 writel(0x00002006, &axi_qos->qosthres0);
428 writel(0x00002001, &axi_qos->qosthres1);
429 writel(0x00000000, &axi_qos->qosthres2);
430 writel(0x00000001, &axi_qos->qosqon);
431
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]432 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]433 writel(0x00000000, &axi_qos->qosconf);
434 writel(0x00002007, &axi_qos->qosctset0);
435 writel(0x00000001, &axi_qos->qosreqctr);
436 writel(0x00002006, &axi_qos->qosthres0);
437 writel(0x00002001, &axi_qos->qosthres1);
438 writel(0x00000000, &axi_qos->qosthres2);
439 writel(0x00000001, &axi_qos->qosqon);
440
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]441 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]442 writel(0x00000002, &axi_qos->qosconf);
443 writel(0x0000200F, &axi_qos->qosctset0);
444 writel(0x00002009, &axi_qos->qosctset1);
445 writel(0x00002003, &axi_qos->qosctset2);
446 writel(0x00002003, &axi_qos->qosctset3);
447 writel(0x00000001, &axi_qos->qosreqctr);
448 writel(0x00002006, &axi_qos->qosthres0);
449 writel(0x00002001, &axi_qos->qosthres1);
450 writel(0x00000000, &axi_qos->qosthres2);
451 writel(0x00000001, &axi_qos->qosqon);
452
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]453 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]454 writel(0x00000000, &axi_qos->qosconf);
455 writel(0x00002003, &axi_qos->qosctset0);
456 writel(0x00002009, &axi_qos->qosctset1);
457 writel(0x00002003, &axi_qos->qosctset2);
458 writel(0x00002003, &axi_qos->qosctset3);
459 writel(0x00000001, &axi_qos->qosreqctr);
460 writel(0x00002006, &axi_qos->qosthres0);
461 writel(0x00002001, &axi_qos->qosthres1);
462 writel(0x00000000, &axi_qos->qosthres2);
463 writel(0x00000001, &axi_qos->qosqon);
464
465 /* QoS Register (MP-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]466 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]467 writel(0x00000000, &axi_qos->qosconf);
468 writel(0x00002007, &axi_qos->qosctset0);
469 writel(0x00000001, &axi_qos->qosreqctr);
470 writel(0x00002006, &axi_qos->qosthres0);
471 writel(0x00002001, &axi_qos->qosthres1);
472 writel(0x00000000, &axi_qos->qosthres2);
473 writel(0x00000001, &axi_qos->qosqon);
474
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]475 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]476 writel(0x00000001, &axi_qos->qosconf);
477 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]478 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]479 writel(0x00002006, &axi_qos->qosthres0);
480 writel(0x00002001, &axi_qos->qosthres1);
481 writel(0x00000000, &axi_qos->qosthres2);
482 writel(0x00000001, &axi_qos->qosqon);
483
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]484 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]485 writel(0x00000001, &axi_qos->qosconf);
486 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]487 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]488 writel(0x00002006, &axi_qos->qosthres0);
489 writel(0x00002001, &axi_qos->qosthres1);
490 writel(0x00000000, &axi_qos->qosthres2);
491 writel(0x00000001, &axi_qos->qosqon);
492
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]493 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]494 writel(0x00000001, &axi_qos->qosconf);
495 writel(0x00001FF0, &axi_qos->qosctset0);
496 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]497 writel(0x00002006, &axi_qos->qosthres0);
498 writel(0x00002001, &axi_qos->qosthres1);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]499 writel(0x00002001, &axi_qos->qosthres2);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]500 writel(0x00000001, &axi_qos->qosqon);
501
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]502 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]503 writel(0x00000001, &axi_qos->qosconf);
504 writel(0x00002001, &axi_qos->qosctset0);
505 writel(0x00002009, &axi_qos->qosctset1);
506 writel(0x00002003, &axi_qos->qosctset2);
507 writel(0x00002003, &axi_qos->qosctset3);
508 writel(0x00000001, &axi_qos->qosreqctr);
509 writel(0x00002006, &axi_qos->qosthres0);
510 writel(0x00002001, &axi_qos->qosthres1);
511 writel(0x00000000, &axi_qos->qosthres2);
512 writel(0x00000001, &axi_qos->qosqon);
513
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]514 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]515 writel(0x00000000, &axi_qos->qosconf);
516 writel(0x00002018, &axi_qos->qosctset0);
517 writel(0x00000001, &axi_qos->qosreqctr);
518 writel(0x00002006, &axi_qos->qosthres0);
519 writel(0x00002001, &axi_qos->qosthres1);
520 writel(0x00000000, &axi_qos->qosthres2);
521 writel(0x00000001, &axi_qos->qosqon);
522
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]523 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]524 writel(0x00000000, &axi_qos->qosconf);
525 writel(0x0000200D, &axi_qos->qosctset0);
526 writel(0x00000001, &axi_qos->qosreqctr);
527 writel(0x00002006, &axi_qos->qosthres0);
528 writel(0x00002001, &axi_qos->qosthres1);
529 writel(0x00000000, &axi_qos->qosthres2);
530 writel(0x00000001, &axi_qos->qosqon);
531
532 /* QoS Register (SYS-AXI256) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]533 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]534 writel(0x00000002, &axi_qos->qosconf);
535 writel(0x0000200F, &axi_qos->qosctset0);
536 writel(0x00002009, &axi_qos->qosctset1);
537 writel(0x00002003, &axi_qos->qosctset2);
538 writel(0x00002003, &axi_qos->qosctset3);
539 writel(0x00000001, &axi_qos->qosreqctr);
540 writel(0x00002006, &axi_qos->qosthres0);
541 writel(0x00002001, &axi_qos->qosthres1);
542 writel(0x00000000, &axi_qos->qosthres2);
543 writel(0x00000001, &axi_qos->qosqon);
544
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]545 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]546 writel(0x00000002, &axi_qos->qosconf);
547 writel(0x0000200F, &axi_qos->qosctset0);
548 writel(0x00002009, &axi_qos->qosctset1);
549 writel(0x00002003, &axi_qos->qosctset2);
550 writel(0x00002003, &axi_qos->qosctset3);
551 writel(0x00000001, &axi_qos->qosreqctr);
552 writel(0x00002006, &axi_qos->qosthres0);
553 writel(0x00002001, &axi_qos->qosthres1);
554 writel(0x00000000, &axi_qos->qosthres2);
555 writel(0x00000001, &axi_qos->qosqon);
556
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]557 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]558 writel(0x00000002, &axi_qos->qosconf);
559 writel(0x0000200F, &axi_qos->qosctset0);
560 writel(0x00002009, &axi_qos->qosctset1);
561 writel(0x00002003, &axi_qos->qosctset2);
562 writel(0x00002003, &axi_qos->qosctset3);
563 writel(0x00000001, &axi_qos->qosreqctr);
564 writel(0x00002006, &axi_qos->qosthres0);
565 writel(0x00002001, &axi_qos->qosthres1);
566 writel(0x00000000, &axi_qos->qosthres2);
567 writel(0x00000001, &axi_qos->qosqon);
568
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]569 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]570 writel(0x00000002, &axi_qos->qosconf);
571 writel(0x0000200F, &axi_qos->qosctset0);
572 writel(0x00002009, &axi_qos->qosctset1);
573 writel(0x00002003, &axi_qos->qosctset2);
574 writel(0x00002003, &axi_qos->qosctset3);
575 writel(0x00000001, &axi_qos->qosreqctr);
576 writel(0x00002006, &axi_qos->qosthres0);
577 writel(0x00002001, &axi_qos->qosthres1);
578 writel(0x00000000, &axi_qos->qosthres2);
579 writel(0x00000001, &axi_qos->qosqon);
580
581 /* QoS Register (CCI-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]582 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]583 writel(0x00000001, &axi_qos->qosconf);
584 writel(0x00002001, &axi_qos->qosctset0);
585 writel(0x00002009, &axi_qos->qosctset1);
586 writel(0x00002003, &axi_qos->qosctset2);
587 writel(0x00002003, &axi_qos->qosctset3);
588 writel(0x00000001, &axi_qos->qosreqctr);
589 writel(0x00002006, &axi_qos->qosthres0);
590 writel(0x00002001, &axi_qos->qosthres1);
591 writel(0x00000000, &axi_qos->qosthres2);
592 writel(0x00000001, &axi_qos->qosqon);
593
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]594 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]595 writel(0x00000002, &axi_qos->qosconf);
596 writel(0x0000200F, &axi_qos->qosctset0);
597 writel(0x00002009, &axi_qos->qosctset1);
598 writel(0x00002003, &axi_qos->qosctset2);
599 writel(0x00002003, &axi_qos->qosctset3);
600 writel(0x00000001, &axi_qos->qosreqctr);
601 writel(0x00002006, &axi_qos->qosthres0);
602 writel(0x00002001, &axi_qos->qosthres1);
603 writel(0x00000000, &axi_qos->qosthres2);
604 writel(0x00000001, &axi_qos->qosqon);
605
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]606 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]607 writel(0x00000001, &axi_qos->qosconf);
608 writel(0x00002001, &axi_qos->qosctset0);
609 writel(0x00002009, &axi_qos->qosctset1);
610 writel(0x00002003, &axi_qos->qosctset2);
611 writel(0x00002003, &axi_qos->qosctset3);
612 writel(0x00000001, &axi_qos->qosreqctr);
613 writel(0x00002006, &axi_qos->qosthres0);
614 writel(0x00002001, &axi_qos->qosthres1);
615 writel(0x00000000, &axi_qos->qosthres2);
616 writel(0x00000001, &axi_qos->qosqon);
617
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]618 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]619 writel(0x00000001, &axi_qos->qosconf);
620 writel(0x00002001, &axi_qos->qosctset0);
621 writel(0x00002009, &axi_qos->qosctset1);
622 writel(0x00002003, &axi_qos->qosctset2);
623 writel(0x00002003, &axi_qos->qosctset3);
624 writel(0x00000001, &axi_qos->qosreqctr);
625 writel(0x00002006, &axi_qos->qosthres0);
626 writel(0x00002001, &axi_qos->qosthres1);
627 writel(0x00000000, &axi_qos->qosthres2);
628 writel(0x00000001, &axi_qos->qosqon);
629
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]630 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]631 writel(0x00000001, &axi_qos->qosconf);
632 writel(0x00002001, &axi_qos->qosctset0);
633 writel(0x00002009, &axi_qos->qosctset1);
634 writel(0x00002003, &axi_qos->qosctset2);
635 writel(0x00002003, &axi_qos->qosctset3);
636 writel(0x00000001, &axi_qos->qosreqctr);
637 writel(0x00002006, &axi_qos->qosthres0);
638 writel(0x00002001, &axi_qos->qosthres1);
639 writel(0x00000000, &axi_qos->qosthres2);
640 writel(0x00000001, &axi_qos->qosqon);
641
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]642 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]643 writel(0x00000002, &axi_qos->qosconf);
644 writel(0x0000200F, &axi_qos->qosctset0);
645 writel(0x00002009, &axi_qos->qosctset1);
646 writel(0x00002003, &axi_qos->qosctset2);
647 writel(0x00002003, &axi_qos->qosctset3);
648 writel(0x00000001, &axi_qos->qosreqctr);
649 writel(0x00002006, &axi_qos->qosthres0);
650 writel(0x00002001, &axi_qos->qosthres1);
651 writel(0x00000000, &axi_qos->qosthres2);
652 writel(0x00000001, &axi_qos->qosqon);
653
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]654 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]655 writel(0x00000001, &axi_qos->qosconf);
656 writel(0x00002001, &axi_qos->qosctset0);
657 writel(0x00002009, &axi_qos->qosctset1);
658 writel(0x00002003, &axi_qos->qosctset2);
659 writel(0x00002003, &axi_qos->qosctset3);
660 writel(0x00000001, &axi_qos->qosreqctr);
661 writel(0x00002006, &axi_qos->qosthres0);
662 writel(0x00002001, &axi_qos->qosthres1);
663 writel(0x00000000, &axi_qos->qosthres2);
664 writel(0x00000001, &axi_qos->qosqon);
665
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]666 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]667 writel(0x00000001, &axi_qos->qosconf);
668 writel(0x00002001, &axi_qos->qosctset0);
669 writel(0x00002009, &axi_qos->qosctset1);
670 writel(0x00002003, &axi_qos->qosctset2);
671 writel(0x00002003, &axi_qos->qosctset3);
672 writel(0x00000001, &axi_qos->qosreqctr);
673 writel(0x00002006, &axi_qos->qosthres0);
674 writel(0x00002001, &axi_qos->qosthres1);
675 writel(0x00000000, &axi_qos->qosthres2);
676 writel(0x00000001, &axi_qos->qosqon);
677
678 /* QoS Register (Media-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]679 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]680 writel(0x00000001, &axi_qos->qosconf);
681 writel(0x00002018, &axi_qos->qosctset0);
682 writel(0x00000020, &axi_qos->qosreqctr);
683 writel(0x00002006, &axi_qos->qosthres0);
684 writel(0x00002001, &axi_qos->qosthres1);
685 writel(0x00000001, &axi_qos->qosthres2);
686 writel(0x00000001, &axi_qos->qosqon);
687
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]688 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]689 writel(0x00000001, &axi_qos->qosconf);
690 writel(0x00002018, &axi_qos->qosctset0);
691 writel(0x00000020, &axi_qos->qosreqctr);
692 writel(0x00002006, &axi_qos->qosthres0);
693 writel(0x00002001, &axi_qos->qosthres1);
694 writel(0x00000001, &axi_qos->qosthres2);
695 writel(0x00000001, &axi_qos->qosqon);
696
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]697 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]698 writel(0x00000001, &axi_qos->qosconf);
699 writel(0x00002018, &axi_qos->qosctset0);
700 writel(0x00000020, &axi_qos->qosreqctr);
701 writel(0x00002006, &axi_qos->qosthres0);
702 writel(0x00002001, &axi_qos->qosthres1);
703 writel(0x00000001, &axi_qos->qosthres2);
704 writel(0x00000001, &axi_qos->qosqon);
705
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]706 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]707 writel(0x00000001, &axi_qos->qosconf);
708 writel(0x00002018, &axi_qos->qosctset0);
709 writel(0x00000020, &axi_qos->qosreqctr);
710 writel(0x00002006, &axi_qos->qosthres0);
711 writel(0x00002001, &axi_qos->qosthres1);
712 writel(0x00000001, &axi_qos->qosthres2);
713 writel(0x00000001, &axi_qos->qosqon);
714
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]715 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]716 writel(0x00000001, &axi_qos->qosconf);
717 writel(0x00002018, &axi_qos->qosctset0);
718 writel(0x00000020, &axi_qos->qosreqctr);
719 writel(0x00002006, &axi_qos->qosthres0);
720 writel(0x00002001, &axi_qos->qosthres1);
721 writel(0x00000001, &axi_qos->qosthres2);
722 writel(0x00000001, &axi_qos->qosqon);
723
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]724 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]725 writel(0x00000001, &axi_qos->qosconf);
726 writel(0x00002018, &axi_qos->qosctset0);
727 writel(0x00000020, &axi_qos->qosreqctr);
728 writel(0x00002006, &axi_qos->qosthres0);
729 writel(0x00002001, &axi_qos->qosthres1);
730 writel(0x00000001, &axi_qos->qosthres2);
731 writel(0x00000001, &axi_qos->qosqon);
732
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]733 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]734 writel(0x00000001, &axi_qos->qosconf);
735 writel(0x00002018, &axi_qos->qosctset0);
736 writel(0x00000020, &axi_qos->qosreqctr);
737 writel(0x00002006, &axi_qos->qosthres0);
738 writel(0x00002001, &axi_qos->qosthres1);
739 writel(0x00000001, &axi_qos->qosthres2);
740 writel(0x00000001, &axi_qos->qosqon);
741
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]742 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]743 writel(0x00000001, &axi_qos->qosconf);
744 writel(0x00002018, &axi_qos->qosctset0);
745 writel(0x00000020, &axi_qos->qosreqctr);
746 writel(0x00002006, &axi_qos->qosthres0);
747 writel(0x00002001, &axi_qos->qosthres1);
748 writel(0x00000001, &axi_qos->qosthres2);
749 writel(0x00000001, &axi_qos->qosqon);
750
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]751 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]752 writel(0x00000001, &axi_qos->qosconf);
753 writel(0x00002018, &axi_qos->qosctset0);
754 writel(0x00000020, &axi_qos->qosreqctr);
755 writel(0x00002006, &axi_qos->qosthres0);
756 writel(0x00002001, &axi_qos->qosthres1);
757 writel(0x00000001, &axi_qos->qosthres2);
758 writel(0x00000001, &axi_qos->qosqon);
759
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]760 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]761 writel(0x00000001, &axi_qos->qosconf);
762 writel(0x00002018, &axi_qos->qosctset0);
763 writel(0x00000020, &axi_qos->qosreqctr);
764 writel(0x00002006, &axi_qos->qosthres0);
765 writel(0x00002001, &axi_qos->qosthres1);
766 writel(0x00000001, &axi_qos->qosthres2);
767 writel(0x00000001, &axi_qos->qosqon);
768
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]769 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]770 writel(0x00000001, &axi_qos->qosconf);
771 writel(0x00002018, &axi_qos->qosctset0);
772 writel(0x00000020, &axi_qos->qosreqctr);
773 writel(0x00002006, &axi_qos->qosthres0);
774 writel(0x00002001, &axi_qos->qosthres1);
775 writel(0x00000001, &axi_qos->qosthres2);
776 writel(0x00000001, &axi_qos->qosqon);
777
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]778 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]779 writel(0x00000001, &axi_qos->qosconf);
780 writel(0x00002018, &axi_qos->qosctset0);
781 writel(0x00000020, &axi_qos->qosreqctr);
782 writel(0x00002006, &axi_qos->qosthres0);
783 writel(0x00002001, &axi_qos->qosthres1);
784 writel(0x00000001, &axi_qos->qosthres2);
785 writel(0x00000001, &axi_qos->qosqon);
786
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]787 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]788 writel(0x00000001, &axi_qos->qosconf);
789 writel(0x00002018, &axi_qos->qosctset0);
790 writel(0x00000020, &axi_qos->qosreqctr);
791 writel(0x00002006, &axi_qos->qosthres0);
792 writel(0x00002001, &axi_qos->qosthres1);
793 writel(0x00000001, &axi_qos->qosthres2);
794 writel(0x00000001, &axi_qos->qosqon);
795
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]796 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]797 writel(0x00000001, &axi_qos->qosconf);
798 writel(0x00002018, &axi_qos->qosctset0);
799 writel(0x00000020, &axi_qos->qosreqctr);
800 writel(0x00002006, &axi_qos->qosthres0);
801 writel(0x00002001, &axi_qos->qosthres1);
802 writel(0x00000001, &axi_qos->qosthres2);
803 writel(0x00000001, &axi_qos->qosqon);
804
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]805 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]806 writel(0x00000001, &axi_qos->qosconf);
807 writel(0x00002018, &axi_qos->qosctset0);
808 writel(0x00000020, &axi_qos->qosreqctr);
809 writel(0x00002006, &axi_qos->qosthres0);
810 writel(0x00002001, &axi_qos->qosthres1);
811 writel(0x00000001, &axi_qos->qosthres2);
812 writel(0x00000001, &axi_qos->qosqon);
813
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]814 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]815 writel(0x00000001, &axi_qos->qosconf);
816 writel(0x00002018, &axi_qos->qosctset0);
817 writel(0x00000020, &axi_qos->qosreqctr);
818 writel(0x00002006, &axi_qos->qosthres0);
819 writel(0x00002001, &axi_qos->qosthres1);
820 writel(0x00000001, &axi_qos->qosthres2);
821 writel(0x00000001, &axi_qos->qosqon);
822
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]823 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]824 writel(0x00000001, &axi_qos->qosconf);
825 writel(0x0000200C, &axi_qos->qosctset0);
826 writel(0x00000020, &axi_qos->qosreqctr);
827 writel(0x00002006, &axi_qos->qosthres0);
828 writel(0x00002001, &axi_qos->qosthres1);
829 writel(0x00000001, &axi_qos->qosthres2);
830 writel(0x00000001, &axi_qos->qosqon);
831
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]832 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]833 writel(0x00000001, &axi_qos->qosconf);
834 writel(0x0000200C, &axi_qos->qosctset0);
835 writel(0x00000020, &axi_qos->qosreqctr);
836 writel(0x00002006, &axi_qos->qosthres0);
837 writel(0x00002001, &axi_qos->qosthres1);
838 writel(0x00000001, &axi_qos->qosthres2);
839 writel(0x00000001, &axi_qos->qosqon);
840
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]841 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]842 writel(0x00000001, &axi_qos->qosconf);
843 writel(0x0000200C, &axi_qos->qosctset0);
844 writel(0x00000020, &axi_qos->qosreqctr);
845 writel(0x00002006, &axi_qos->qosthres0);
846 writel(0x00002001, &axi_qos->qosthres1);
847 writel(0x00000001, &axi_qos->qosthres2);
848 writel(0x00000001, &axi_qos->qosqon);
849
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]850 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]851 writel(0x00000001, &axi_qos->qosconf);
852 writel(0x0000200C, &axi_qos->qosctset0);
853 writel(0x00000020, &axi_qos->qosreqctr);
854 writel(0x00002006, &axi_qos->qosthres0);
855 writel(0x00002001, &axi_qos->qosthres1);
856 writel(0x00000001, &axi_qos->qosthres2);
857 writel(0x00000001, &axi_qos->qosqon);
858
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]859 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]860 writel(0x00000001, &axi_qos->qosconf);
861 writel(0x0000200C, &axi_qos->qosctset0);
862 writel(0x00000020, &axi_qos->qosreqctr);
863 writel(0x00002006, &axi_qos->qosthres0);
864 writel(0x00002001, &axi_qos->qosthres1);
865 writel(0x00000001, &axi_qos->qosthres2);
866 writel(0x00000001, &axi_qos->qosqon);
867
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]868 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]869 writel(0x00000001, &axi_qos->qosconf);
870 writel(0x0000200C, &axi_qos->qosctset0);
871 writel(0x00000020, &axi_qos->qosreqctr);
872 writel(0x00002006, &axi_qos->qosthres0);
873 writel(0x00002001, &axi_qos->qosthres1);
874 writel(0x00000001, &axi_qos->qosthres2);
875 writel(0x00000001, &axi_qos->qosqon);
876
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]877 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]878 writel(0x00000001, &axi_qos->qosconf);
879 writel(0x0000200C, &axi_qos->qosctset0);
880 writel(0x00000020, &axi_qos->qosreqctr);
881 writel(0x00002006, &axi_qos->qosthres0);
882 writel(0x00002001, &axi_qos->qosthres1);
883 writel(0x00000001, &axi_qos->qosthres2);
884 writel(0x00000001, &axi_qos->qosqon);
885
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]886 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]887 writel(0x00000001, &axi_qos->qosconf);
888 writel(0x0000200C, &axi_qos->qosctset0);
889 writel(0x00000020, &axi_qos->qosreqctr);
890 writel(0x00002006, &axi_qos->qosthres0);
891 writel(0x00002001, &axi_qos->qosthres1);
892 writel(0x00000001, &axi_qos->qosthres2);
893 writel(0x00000001, &axi_qos->qosqon);
894
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]895 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]896 writel(0x00000001, &axi_qos->qosconf);
897 writel(0x0000200C, &axi_qos->qosctset0);
898 writel(0x00000020, &axi_qos->qosreqctr);
899 writel(0x00002006, &axi_qos->qosthres0);
900 writel(0x00002001, &axi_qos->qosthres1);
901 writel(0x00000001, &axi_qos->qosthres2);
902 writel(0x00000001, &axi_qos->qosqon);
903
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]904 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]905 writel(0x00000001, &axi_qos->qosconf);
906 writel(0x0000200C, &axi_qos->qosctset0);
907 writel(0x00000020, &axi_qos->qosreqctr);
908 writel(0x00002006, &axi_qos->qosthres0);
909 writel(0x00002001, &axi_qos->qosthres1);
910 writel(0x00000001, &axi_qos->qosthres2);
911 writel(0x00000001, &axi_qos->qosqon);
912
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]913 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]914 writel(0x00000001, &axi_qos->qosconf);
915 writel(0x0000200C, &axi_qos->qosctset0);
916 writel(0x00000020, &axi_qos->qosreqctr);
917 writel(0x00002006, &axi_qos->qosthres0);
918 writel(0x00002001, &axi_qos->qosthres1);
919 writel(0x00000001, &axi_qos->qosthres2);
920 writel(0x00000001, &axi_qos->qosqon);
921
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]922 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]923 writel(0x00000001, &axi_qos->qosconf);
924 writel(0x0000200C, &axi_qos->qosctset0);
925 writel(0x00000020, &axi_qos->qosreqctr);
926 writel(0x00002006, &axi_qos->qosthres0);
927 writel(0x00002001, &axi_qos->qosthres1);
928 writel(0x00000001, &axi_qos->qosthres2);
929 writel(0x00000001, &axi_qos->qosqon);
930
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]931 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]932 writel(0x00000001, &axi_qos->qosconf);
933 writel(0x0000200C, &axi_qos->qosctset0);
934 writel(0x00000020, &axi_qos->qosreqctr);
935 writel(0x00002006, &axi_qos->qosthres0);
936 writel(0x00002001, &axi_qos->qosthres1);
937 writel(0x00000001, &axi_qos->qosthres2);
938 writel(0x00000001, &axi_qos->qosqon);
939
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]940 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]941 writel(0x00000001, &axi_qos->qosconf);
942 writel(0x0000200C, &axi_qos->qosctset0);
943 writel(0x00000020, &axi_qos->qosreqctr);
944 writel(0x00002006, &axi_qos->qosthres0);
945 writel(0x00002001, &axi_qos->qosthres1);
946 writel(0x00000001, &axi_qos->qosthres2);
947 writel(0x00000001, &axi_qos->qosqon);
948
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]949 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]950 writel(0x00000001, &axi_qos->qosconf);
951 writel(0x0000200C, &axi_qos->qosctset0);
952 writel(0x00000020, &axi_qos->qosreqctr);
953 writel(0x00002006, &axi_qos->qosthres0);
954 writel(0x00002001, &axi_qos->qosthres1);
955 writel(0x00000001, &axi_qos->qosthres2);
956 writel(0x00000001, &axi_qos->qosqon);
957
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]958 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]959 writel(0x00000000, &axi_qos->qosconf);
960 writel(0x0000200C, &axi_qos->qosctset0);
961 writel(0x00000001, &axi_qos->qosreqctr);
962 writel(0x00002006, &axi_qos->qosthres0);
963 writel(0x00002001, &axi_qos->qosthres1);
964 writel(0x00000001, &axi_qos->qosthres2);
965 writel(0x00000001, &axi_qos->qosqon);
966
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]967 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]968 writel(0x00000000, &axi_qos->qosconf);
969 writel(0x0000200C, &axi_qos->qosctset0);
970 writel(0x00000001, &axi_qos->qosreqctr);
971 writel(0x00002006, &axi_qos->qosthres0);
972 writel(0x00002001, &axi_qos->qosthres1);
973 writel(0x00000001, &axi_qos->qosthres2);
974 writel(0x00000001, &axi_qos->qosqon);
975
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]976 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]977 writel(0x00000000, &axi_qos->qosconf);
978 writel(0x0000200C, &axi_qos->qosctset0);
979 writel(0x00000001, &axi_qos->qosreqctr);
980 writel(0x00002006, &axi_qos->qosthres0);
981 writel(0x00002001, &axi_qos->qosthres1);
982 writel(0x00000001, &axi_qos->qosthres2);
983 writel(0x00000001, &axi_qos->qosqon);
984
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]985 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]986 writel(0x00000000, &axi_qos->qosconf);
987 writel(0x0000200C, &axi_qos->qosctset0);
988 writel(0x00000001, &axi_qos->qosreqctr);
989 writel(0x00002006, &axi_qos->qosthres0);
990 writel(0x00002001, &axi_qos->qosthres1);
991 writel(0x00000001, &axi_qos->qosthres2);
992 writel(0x00000001, &axi_qos->qosqon);
993
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]994 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]995 writel(0x00000000, &axi_qos->qosconf);
996 writel(0x0000200C, &axi_qos->qosctset0);
997 writel(0x00000001, &axi_qos->qosreqctr);
998 writel(0x00002006, &axi_qos->qosthres0);
999 writel(0x00002001, &axi_qos->qosthres1);
1000 writel(0x00000001, &axi_qos->qosthres2);
1001 writel(0x00000001, &axi_qos->qosqon);
1002
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1003 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1004 writel(0x00000000, &axi_qos->qosconf);
1005 writel(0x0000200C, &axi_qos->qosctset0);
1006 writel(0x00000001, &axi_qos->qosreqctr);
1007 writel(0x00002006, &axi_qos->qosthres0);
1008 writel(0x00002001, &axi_qos->qosthres1);
1009 writel(0x00000001, &axi_qos->qosthres2);
1010 writel(0x00000001, &axi_qos->qosqon);
1011
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1012 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1013 writel(0x00000000, &axi_qos->qosconf);
1014 writel(0x0000200C, &axi_qos->qosctset0);
1015 writel(0x00000001, &axi_qos->qosreqctr);
1016 writel(0x00002006, &axi_qos->qosthres0);
1017 writel(0x00002001, &axi_qos->qosthres1);
1018 writel(0x00000001, &axi_qos->qosthres2);
1019 writel(0x00000001, &axi_qos->qosqon);
1020
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1021 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1022 writel(0x00000000, &axi_qos->qosconf);
1023 writel(0x0000200C, &axi_qos->qosctset0);
1024 writel(0x00000001, &axi_qos->qosreqctr);
1025 writel(0x00002006, &axi_qos->qosthres0);
1026 writel(0x00002001, &axi_qos->qosthres1);
1027 writel(0x00000001, &axi_qos->qosthres2);
1028 writel(0x00000001, &axi_qos->qosqon);
1029
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1030 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1031 writel(0x00000001, &axi_qos->qosconf);
1032 writel(0x00002007, &axi_qos->qosctset0);
1033 writel(0x00000020, &axi_qos->qosreqctr);
1034 writel(0x00002006, &axi_qos->qosthres0);
1035 writel(0x00002001, &axi_qos->qosthres1);
1036 writel(0x00000001, &axi_qos->qosthres2);
1037 writel(0x00000001, &axi_qos->qosqon);
1038
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1039 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1040 writel(0x00000001, &axi_qos->qosconf);
1041 writel(0x00002007, &axi_qos->qosctset0);
1042 writel(0x00000020, &axi_qos->qosreqctr);
1043 writel(0x00002006, &axi_qos->qosthres0);
1044 writel(0x00002001, &axi_qos->qosthres1);
1045 writel(0x00000001, &axi_qos->qosthres2);
1046 writel(0x00000001, &axi_qos->qosqon);
1047
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1048 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1049 writel(0x00000001, &axi_qos->qosconf);
1050 writel(0x00002007, &axi_qos->qosctset0);
1051 writel(0x00000020, &axi_qos->qosreqctr);
1052 writel(0x00002006, &axi_qos->qosthres0);
1053 writel(0x00002001, &axi_qos->qosthres1);
1054 writel(0x00000001, &axi_qos->qosthres2);
1055 writel(0x00000001, &axi_qos->qosqon);
1056
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1057 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1058 writel(0x00000001, &axi_qos->qosconf);
1059 writel(0x00002007, &axi_qos->qosctset0);
1060 writel(0x00000020, &axi_qos->qosreqctr);
1061 writel(0x00002006, &axi_qos->qosthres0);
1062 writel(0x00002001, &axi_qos->qosthres1);
1063 writel(0x00000001, &axi_qos->qosthres2);
1064 writel(0x00000001, &axi_qos->qosqon);
1065
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1066 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1067 writel(0x00000001, &axi_qos->qosconf);
1068 writel(0x00002007, &axi_qos->qosctset0);
1069 writel(0x00000020, &axi_qos->qosreqctr);
1070 writel(0x00002006, &axi_qos->qosthres0);
1071 writel(0x00002001, &axi_qos->qosthres1);
1072 writel(0x00000001, &axi_qos->qosthres2);
1073 writel(0x00000001, &axi_qos->qosqon);
1074
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1075 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1076 writel(0x00000001, &axi_qos->qosconf);
1077 writel(0x00002007, &axi_qos->qosctset0);
1078 writel(0x00000020, &axi_qos->qosreqctr);
1079 writel(0x00002006, &axi_qos->qosthres0);
1080 writel(0x00002001, &axi_qos->qosthres1);
1081 writel(0x00000001, &axi_qos->qosthres2);
1082 writel(0x00000001, &axi_qos->qosqon);
1083
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1084 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1085 writel(0x00000001, &axi_qos->qosconf);
1086 writel(0x00002007, &axi_qos->qosctset0);
1087 writel(0x00000020, &axi_qos->qosreqctr);
1088 writel(0x00002006, &axi_qos->qosthres0);
1089 writel(0x00002001, &axi_qos->qosthres1);
1090 writel(0x00000001, &axi_qos->qosthres2);
1091 writel(0x00000001, &axi_qos->qosqon);
1092
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1093 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1094 writel(0x00000001, &axi_qos->qosconf);
1095 writel(0x00002007, &axi_qos->qosctset0);
1096 writel(0x00000020, &axi_qos->qosreqctr);
1097 writel(0x00002006, &axi_qos->qosthres0);
1098 writel(0x00002001, &axi_qos->qosthres1);
1099 writel(0x00000001, &axi_qos->qosthres2);
1100 writel(0x00000001, &axi_qos->qosqon);
1101
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1102 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1103 writel(0x00000001, &axi_qos->qosconf);
1104 writel(0x00002007, &axi_qos->qosctset0);
1105 writel(0x00000020, &axi_qos->qosreqctr);
1106 writel(0x00002006, &axi_qos->qosthres0);
1107 writel(0x00002001, &axi_qos->qosthres1);
1108 writel(0x00000001, &axi_qos->qosthres2);
1109 writel(0x00000001, &axi_qos->qosqon);
1110
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1111 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1112 writel(0x00000001, &axi_qos->qosconf);
1113 writel(0x00002007, &axi_qos->qosctset0);
1114 writel(0x00000020, &axi_qos->qosreqctr);
1115 writel(0x00002006, &axi_qos->qosthres0);
1116 writel(0x00002001, &axi_qos->qosthres1);
1117 writel(0x00000001, &axi_qos->qosthres2);
1118 writel(0x00000000, &axi_qos->qosqon);
1119}