blob: a7f5850a4a6016dfdefde810b15ad89df258adf0 [file] [log] [blame]
Chander Kashyape21185b2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
4 * Configuration settings for the SAMSUNG SMDKV310 (S5PC210) board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28/* High Level Configuration Options */
29#define CONFIG_ARMV7 1 /*This is an ARM V7 CPU core */
30#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
31#define CONFIG_S5P 1 /* S5P Family */
32#define CONFIG_S5PC210 1 /* which is in a S5PC210 SoC */
33#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
34
35#include <asm/arch/cpu.h> /* get chip and board defs */
36
37#define CONFIG_ARCH_CPU_INIT
38#define CONFIG_DISPLAY_CPUINFO
39#define CONFIG_DISPLAY_BOARDINFO
40
41/* Keep L2 Cache Disabled */
42#define CONFIG_L2_OFF 1
43
44#define CONFIG_SYS_SDRAM_BASE 0x40000000
45#define CONFIG_SYS_TEXT_BASE 0x43E00000
46
47/* input clock of PLL: SMDKV310 has 24MHz input clock */
48#define CONFIG_SYS_CLK_FREQ 24000000
49
50#define CONFIG_SETUP_MEMORY_TAGS
51#define CONFIG_CMDLINE_TAG
52#define CONFIG_INITRD_TAG
53#define CONFIG_CMDLINE_EDITING
54
55/* Handling Sleep Mode*/
56#define S5P_CHECK_SLEEP 0x00000BAD
57#define S5P_CHECK_DIDLE 0xBAD00000
58
59/* Size of malloc() pool */
60#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
61
62/* select serial console configuration */
63#define CONFIG_SERIAL_MULTI 1
64#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
65#define CONFIG_BAUDRATE 115200
66#define S5PC210_DEFAULT_UART_OFFSET 0x010000
67
68/* SD/MMC configuration */
69#define CONFIG_GENERIC_MMC 1
70#define CONFIG_MMC 1
71#define CONFIG_S5P_MMC 1
72
73/* PWM */
74#define CONFIG_PWM 1
75
76/* allow to overwrite serial and ethaddr */
77#define CONFIG_ENV_OVERWRITE
78
79/* Command definition*/
80#include <config_cmd_default.h>
81
82#define CONFIG_CMD_PING
83#define CONFIG_CMD_ELF
84#define CONFIG_CMD_DHCP
85#define CONFIG_CMD_MMC
86#define CONFIG_CMD_NET
87#define CONFIG_CMD_FAT
88
89#define CONFIG_BOOTDELAY 3
90#define CONFIG_ZERO_BOOTDELAY_CHECK
91#define CONFIG_MMC_U_BOOT
92
93#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
94
95/* Miscellaneous configurable options */
96#define CONFIG_SYS_LONGHELP /* undef to save memory */
97#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
98#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
99#define CONFIG_SYS_PROMPT "SMDKV310 # "
100#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
101#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
102#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
103#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
104/* Boot Argument Buffer Size */
105#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
106/* memtest works on */
107#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
108#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
109#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
110
111#define CONFIG_SYS_HZ 1000
112
113/* valid baudrates */
114#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
115
116/* Stack sizes */
117#define CONFIG_STACKSIZE (256 << 10) /* 256KB */
118
119/* SMDKV310 has 4 bank of DRAM */
120#define CONFIG_NR_DRAM_BANKS 4
121#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
122#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
123#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
124#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
125#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
126#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
127#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
128#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
129#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
130
131/* FLASH and environment organization */
132#define CONFIG_SYS_NO_FLASH 1
133#undef CONFIG_CMD_IMLS
134#define CONFIG_IDENT_STRING " for SMDKC210/V310"
135
136#ifdef CONFIG_USE_IRQ
137#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
138#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
139#endif
140
141#define CONFIG_CLK_1000_400_200
142
143/* MIU (Memory Interleaving Unit) */
144#define CONFIG_MIU_2BIT_INTERLEAVED
145
146#define CONFIG_ENV_IS_IN_MMC 1
147#define CONFIG_SYS_MMC_ENV_DEV 0
148#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
149#define RESERVE_BLOCK_SIZE (512)
150#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
151#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
152#define CONFIG_DOS_PARTITION 1
153
154#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
155
156/* U-boot copy size from boot Media to DRAM.*/
157#define COPY_BL2_SIZE 0x80000
158#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
159#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
160
161/* Ethernet Controllor Driver */
162#ifdef CONFIG_CMD_NET
163#define CONFIG_NET_MULTI
164#define CONFIG_SMC911X
165#define CONFIG_SMC911X_BASE 0x5000000
166#define CONFIG_SMC911X_16_BIT
167#define CONFIG_ENV_SROM_BANK 1
168#endif /*CONFIG_CMD_NET*/
169#endif /* __CONFIG_H */