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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Macpaul Linf8ea15f2011-01-05 17:12:23 +08002/*
3 * (C) Copyright 2009 Faraday Technology
4 * Po-Yu Chuang <ratbert@faraday-tech.com>
5 *
6 * Copyright (C) 2010 Andes Technology Corporation
7 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
8 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
Macpaul Linf8ea15f2011-01-05 17:12:23 +08009 */
10
11#include <common.h>
12#include <asm/io.h>
Po-Yu Chuangd6150db2011-02-17 19:34:07 +000013#include <faraday/ftpmu010.h>
Macpaul Linf8ea15f2011-01-05 17:12:23 +080014
Macpaul Lincaddb8e2011-03-20 23:44:06 +000015/* OSCC: OSC Control Register */
Macpaul Linf8ea15f2011-01-05 17:12:23 +080016void ftpmu010_32768osc_enable(void)
17{
Macpaul Lincaddb8e2011-03-20 23:44:06 +000018 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
Macpaul Linf8ea15f2011-01-05 17:12:23 +080019 unsigned int oscc;
20
21 /* enable the 32768Hz oscillator */
22 oscc = readl(&pmu->OSCC);
23 oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI);
24 writel(oscc, &pmu->OSCC);
25
26 /* wait until ready */
27 while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE))
28 ;
29
30 /* select 32768Hz oscillator */
31 oscc = readl(&pmu->OSCC);
32 oscc |= FTPMU010_OSCC_OSCL_RTCLSEL;
33 writel(oscc, &pmu->OSCC);
34}
35
Macpaul Lincaddb8e2011-03-20 23:44:06 +000036/* MFPSR: Multi-Function Port Setting Register */
37void ftpmu010_mfpsr_select_dev(unsigned int dev)
38{
39 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
40 unsigned int mfpsr;
41
42 mfpsr = readl(&pmu->MFPSR);
43 mfpsr |= dev;
44 writel(mfpsr, &pmu->MFPSR);
45}
46
47void ftpmu010_mfpsr_diselect_dev(unsigned int dev)
48{
49 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
50 unsigned int mfpsr;
51
52 mfpsr = readl(&pmu->MFPSR);
53 mfpsr &= ~dev;
54 writel(mfpsr, &pmu->MFPSR);
55}
56
57/* PDLLCR0: PLL/DLL Control Register 0 */
Macpaul Linf8ea15f2011-01-05 17:12:23 +080058void ftpmu010_dlldis_disable(void)
59{
Macpaul Lincaddb8e2011-03-20 23:44:06 +000060 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
Macpaul Linf8ea15f2011-01-05 17:12:23 +080061 unsigned int pdllcr0;
62
63 pdllcr0 = readl(&pmu->PDLLCR0);
64 pdllcr0 |= FTPMU010_PDLLCR0_DLLDIS;
65 writel(pdllcr0, &pmu->PDLLCR0);
66}
67
68void ftpmu010_sdram_clk_disable(unsigned int cr0)
69{
Macpaul Lincaddb8e2011-03-20 23:44:06 +000070 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
Macpaul Linf8ea15f2011-01-05 17:12:23 +080071 unsigned int pdllcr0;
72
73 pdllcr0 = readl(&pmu->PDLLCR0);
74 pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0);
75 writel(pdllcr0, &pmu->PDLLCR0);
76}
Macpaul Lincaddb8e2011-03-20 23:44:06 +000077
78/* SDRAMHTC: SDRAM Signal Hold Time Control */
79void ftpmu010_sdramhtc_set(unsigned int val)
80{
81 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
82 unsigned int sdramhtc;
83
84 sdramhtc = readl(&pmu->SDRAMHTC);
85 sdramhtc |= val;
86 writel(sdramhtc, &pmu->SDRAMHTC);
87}