| Jagan Teki | 82ee138 | 2019-07-15 23:58:46 +0530 | [diff] [blame] | 1 | config RAM_ROCKCHIP |
| 2 | bool "Ram drivers support for Rockchip SoCs" |
| 3 | depends on RAM && ARCH_ROCKCHIP |
| 4 | default y |
| 5 | help |
| 6 | This enables support for ram drivers Rockchip SoCs. |
| 7 | |
| Kever Yang | d6647b0 | 2019-11-15 11:04:37 +0800 | [diff] [blame] | 8 | config ROCKCHIP_SDRAM_COMMON |
| 9 | bool "Enable rockchip sdram common driver" |
| 10 | depends on TPL_RAM || SPL_RAM |
| 11 | help |
| 12 | This enable sdram common driver |
| 13 | |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 14 | if RAM_ROCKCHIP |
| 15 | |
| Jagan Teki | 0711267 | 2019-07-15 23:58:48 +0530 | [diff] [blame] | 16 | config RAM_ROCKCHIP_DEBUG |
| 17 | bool "Rockchip ram drivers debugging" |
| Kever Yang | fba7bd4 | 2019-11-15 11:04:39 +0800 | [diff] [blame] | 18 | default y |
| Jagan Teki | 0711267 | 2019-07-15 23:58:48 +0530 | [diff] [blame] | 19 | help |
| 20 | This enables debugging ram driver API's for the platforms |
| 21 | based on Rockchip SoCs. |
| 22 | |
| 23 | This is an option for developers to understand the ram drivers |
| 24 | initialization, configurations and etc. |
| 25 | |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 26 | config RAM_ROCKCHIP_DDR4 |
| 27 | bool "DDR4 support for Rockchip SoCs" |
| Heiko Stuebner | 2db36c6 | 2020-10-01 20:40:03 +0200 | [diff] [blame] | 28 | help |
| 29 | This enables DDR4 sdram support instead of the default DDR3 support |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 30 | on Rockchip SoCs. |
| Heiko Stuebner | 2db36c6 | 2020-10-01 20:40:03 +0200 | [diff] [blame] | 31 | |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 32 | config RAM_ROCKCHIP_LPDDR2 |
| 33 | bool "LPDDR2 support for Rockchip SoCs" |
| Heiko Stuebner | 2db36c6 | 2020-10-01 20:40:03 +0200 | [diff] [blame] | 34 | help |
| 35 | This enables LPDDR2 sdram support instead of the default DDR3 support |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 36 | on Rockchip SoCs. |
| Heiko Stuebner | 2db36c6 | 2020-10-01 20:40:03 +0200 | [diff] [blame] | 37 | |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 38 | config RAM_ROCKCHIP_LPDDR3 |
| 39 | bool "LPDDR3 support for Rockchip SoCs" |
| Heiko Stuebner | 2db36c6 | 2020-10-01 20:40:03 +0200 | [diff] [blame] | 40 | help |
| 41 | This enables LPDDR3 sdram support instead of the default DDR3 support |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 42 | on Rockchip SoCs. |
| Heiko Stuebner | 2db36c6 | 2020-10-01 20:40:03 +0200 | [diff] [blame] | 43 | |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 44 | config RAM_ROCKCHIP_LPDDR4 |
| 45 | bool "LPDDR4 support for Rockchip SoCs" |
| Jagan Teki | b6cf089 | 2019-07-16 17:27:08 +0530 | [diff] [blame] | 46 | help |
| 47 | This enables LPDDR4 sdram code support for the platforms based |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 48 | on Rockchip SoCs. |
| Jagan Teki | b6cf089 | 2019-07-16 17:27:08 +0530 | [diff] [blame] | 49 | |
| Jagan Teki | 26f92be | 2022-12-14 23:20:48 +0530 | [diff] [blame] | 50 | endif # RAM_ROCKCHIP |