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Jagan Teki2952f392020-01-09 14:22:15 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * (C) Copyright 2019 Amarula Solutions(India)
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7#include <common.h>
Jagan Tekiee6321f2020-01-09 14:22:18 +05308#include <asm/io.h>
9#include <asm/arch-rockchip/clock.h>
10#include <asm/arch-rockchip/cru.h>
11#include <asm/arch-rockchip/hardware.h>
12#include <linux/err.h>
13
14static char *get_reset_cause(void)
15{
16 struct rockchip_cru *cru = rockchip_get_cru();
17 char *cause = NULL;
18
19 if (IS_ERR(cru))
20 return cause;
21
22 switch (cru->glb_rst_st) {
23 case GLB_POR_RST:
24 cause = "POR";
25 break;
26 case FST_GLB_RST_ST:
27 case SND_GLB_RST_ST:
28 cause = "RST";
29 break;
30 case FST_GLB_TSADC_RST_ST:
31 case SND_GLB_TSADC_RST_ST:
32 cause = "THERMAL";
33 break;
34 case FST_GLB_WDT_RST_ST:
35 case SND_GLB_WDT_RST_ST:
36 cause = "WDOG";
37 break;
38 default:
39 cause = "unknown reset";
40 }
41
42 /**
43 * reset_reason env is used by rk3288, due to special use case
44 * to figure it the boot behavior. so keep this as it is.
45 */
46 env_set("reset_reason", cause);
47
48 /*
49 * Clear glb_rst_st, so we can determine the last reset cause
50 * for following resets.
51 */
52 rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK);
53
54 return cause;
55}
Jagan Teki2952f392020-01-09 14:22:15 +053056
57int print_cpuinfo(void)
58{
59 printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC);
Jagan Tekiee6321f2020-01-09 14:22:18 +053060 printf("Reset cause: %s\n", get_reset_cause());
Jagan Teki2952f392020-01-09 14:22:15 +053061
62 /* TODO print operating temparature and clock */
63
64 return 0;
65}