wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * This provides a bit-banged interface to the ethernet MII management |
| 10 | * channel. |
| 11 | */ |
| 12 | |
| 13 | #include <common.h> |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame] | 14 | #include <dm.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 15 | #include <miiphy.h> |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 16 | #include <phy.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 17 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 18 | #include <asm/types.h> |
| 19 | #include <linux/list.h> |
| 20 | #include <malloc.h> |
| 21 | #include <net.h> |
| 22 | |
| 23 | /* local debug macro */ |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 24 | #undef MII_DEBUG |
| 25 | |
| 26 | #undef debug |
| 27 | #ifdef MII_DEBUG |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 28 | #define debug(fmt, args...) printf(fmt, ##args) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 29 | #else |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 30 | #define debug(fmt, args...) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 31 | #endif /* MII_DEBUG */ |
| 32 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 33 | static struct list_head mii_devs; |
| 34 | static struct mii_dev *current_mii; |
| 35 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 36 | /* |
| 37 | * Lookup the mii_dev struct by the registered device name. |
| 38 | */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 39 | struct mii_dev *miiphy_get_dev_by_name(const char *devname) |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 40 | { |
| 41 | struct list_head *entry; |
| 42 | struct mii_dev *dev; |
| 43 | |
| 44 | if (!devname) { |
| 45 | printf("NULL device name!\n"); |
| 46 | return NULL; |
| 47 | } |
| 48 | |
| 49 | list_for_each(entry, &mii_devs) { |
| 50 | dev = list_entry(entry, struct mii_dev, link); |
| 51 | if (strcmp(dev->name, devname) == 0) |
| 52 | return dev; |
| 53 | } |
| 54 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 55 | return NULL; |
| 56 | } |
| 57 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 58 | /***************************************************************************** |
| 59 | * |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 60 | * Initialize global data. Need to be called before any other miiphy routine. |
| 61 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 62 | void miiphy_init(void) |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 63 | { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 64 | INIT_LIST_HEAD(&mii_devs); |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 65 | current_mii = NULL; |
Marian Balakowicz | d9785c1 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 66 | } |
| 67 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 68 | struct mii_dev *mdio_alloc(void) |
| 69 | { |
| 70 | struct mii_dev *bus; |
| 71 | |
| 72 | bus = malloc(sizeof(*bus)); |
| 73 | if (!bus) |
| 74 | return bus; |
| 75 | |
| 76 | memset(bus, 0, sizeof(*bus)); |
| 77 | |
| 78 | /* initalize mii_dev struct fields */ |
| 79 | INIT_LIST_HEAD(&bus->link); |
| 80 | |
| 81 | return bus; |
| 82 | } |
| 83 | |
Bin Meng | cb6baca | 2015-10-07 21:32:37 -0700 | [diff] [blame] | 84 | void mdio_free(struct mii_dev *bus) |
| 85 | { |
| 86 | free(bus); |
| 87 | } |
| 88 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 89 | int mdio_register(struct mii_dev *bus) |
| 90 | { |
Peng Fan | d39449b | 2015-11-24 17:03:47 +0800 | [diff] [blame] | 91 | if (!bus || !bus->read || !bus->write) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 92 | return -1; |
| 93 | |
| 94 | /* check if we have unique name */ |
| 95 | if (miiphy_get_dev_by_name(bus->name)) { |
| 96 | printf("mdio_register: non unique device name '%s'\n", |
| 97 | bus->name); |
| 98 | return -1; |
| 99 | } |
| 100 | |
| 101 | /* add it to the list */ |
| 102 | list_add_tail(&bus->link, &mii_devs); |
| 103 | |
| 104 | if (!current_mii) |
| 105 | current_mii = bus; |
| 106 | |
| 107 | return 0; |
| 108 | } |
| 109 | |
Bin Meng | cb6baca | 2015-10-07 21:32:37 -0700 | [diff] [blame] | 110 | int mdio_unregister(struct mii_dev *bus) |
| 111 | { |
| 112 | if (!bus) |
| 113 | return 0; |
| 114 | |
| 115 | /* delete it from the list */ |
| 116 | list_del(&bus->link); |
| 117 | |
| 118 | if (current_mii == bus) |
| 119 | current_mii = NULL; |
| 120 | |
| 121 | return 0; |
| 122 | } |
| 123 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 124 | void mdio_list_devices(void) |
| 125 | { |
| 126 | struct list_head *entry; |
| 127 | |
| 128 | list_for_each(entry, &mii_devs) { |
| 129 | int i; |
| 130 | struct mii_dev *bus = list_entry(entry, struct mii_dev, link); |
| 131 | |
| 132 | printf("%s:\n", bus->name); |
| 133 | |
| 134 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
| 135 | struct phy_device *phydev = bus->phymap[i]; |
| 136 | |
| 137 | if (phydev) { |
Michal Simek | 15a2acd | 2016-11-16 08:41:01 +0100 | [diff] [blame] | 138 | printf("%x - %s", i, phydev->drv->name); |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 139 | |
| 140 | if (phydev->dev) |
| 141 | printf(" <--> %s\n", phydev->dev->name); |
| 142 | else |
| 143 | printf("\n"); |
| 144 | } |
| 145 | } |
| 146 | } |
| 147 | } |
| 148 | |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 149 | int miiphy_set_current_dev(const char *devname) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 150 | { |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 151 | struct mii_dev *dev; |
| 152 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 153 | dev = miiphy_get_dev_by_name(devname); |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 154 | if (dev) { |
| 155 | current_mii = dev; |
| 156 | return 0; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 157 | } |
| 158 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 159 | printf("No such device: %s\n", devname); |
| 160 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 161 | return 1; |
| 162 | } |
| 163 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 164 | struct mii_dev *mdio_get_current_dev(void) |
| 165 | { |
| 166 | return current_mii; |
| 167 | } |
| 168 | |
| 169 | struct phy_device *mdio_phydev_for_ethname(const char *ethname) |
| 170 | { |
| 171 | struct list_head *entry; |
| 172 | struct mii_dev *bus; |
| 173 | |
| 174 | list_for_each(entry, &mii_devs) { |
| 175 | int i; |
| 176 | bus = list_entry(entry, struct mii_dev, link); |
| 177 | |
| 178 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
| 179 | if (!bus->phymap[i] || !bus->phymap[i]->dev) |
| 180 | continue; |
| 181 | |
| 182 | if (strcmp(bus->phymap[i]->dev->name, ethname) == 0) |
| 183 | return bus->phymap[i]; |
| 184 | } |
| 185 | } |
| 186 | |
| 187 | printf("%s is not a known ethernet\n", ethname); |
| 188 | return NULL; |
| 189 | } |
| 190 | |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 191 | const char *miiphy_get_current_dev(void) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 192 | { |
| 193 | if (current_mii) |
| 194 | return current_mii->name; |
| 195 | |
| 196 | return NULL; |
| 197 | } |
| 198 | |
Mike Frysinger | ede16ea | 2010-07-27 18:35:10 -0400 | [diff] [blame] | 199 | static struct mii_dev *miiphy_get_active_dev(const char *devname) |
| 200 | { |
| 201 | /* If the current mii is the one we want, return it */ |
| 202 | if (current_mii) |
| 203 | if (strcmp(current_mii->name, devname) == 0) |
| 204 | return current_mii; |
| 205 | |
| 206 | /* Otherwise, set the active one to the one we want */ |
| 207 | if (miiphy_set_current_dev(devname)) |
| 208 | return NULL; |
| 209 | else |
| 210 | return current_mii; |
| 211 | } |
| 212 | |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 213 | /***************************************************************************** |
| 214 | * |
| 215 | * Read to variable <value> from the PHY attached to device <devname>, |
| 216 | * use PHY address <addr> and register <reg>. |
| 217 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 218 | * This API is deprecated. Use phy_read on a phy_device found via phy_connect |
| 219 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 220 | * Returns: |
| 221 | * 0 on success |
| 222 | */ |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 223 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 224 | unsigned short *value) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 225 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 226 | struct mii_dev *bus; |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 227 | int ret; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 228 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 229 | bus = miiphy_get_active_dev(devname); |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 230 | if (!bus) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 231 | return 1; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 232 | |
Anatolij Gustschin | d67d5d5 | 2011-04-30 02:17:44 +0000 | [diff] [blame] | 233 | ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg); |
| 234 | if (ret < 0) |
| 235 | return 1; |
| 236 | |
| 237 | *value = (unsigned short)ret; |
| 238 | return 0; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 239 | } |
| 240 | |
| 241 | /***************************************************************************** |
| 242 | * |
| 243 | * Write <value> to the PHY attached to device <devname>, |
| 244 | * use PHY address <addr> and register <reg>. |
| 245 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 246 | * This API is deprecated. Use phy_write on a phy_device found by phy_connect |
| 247 | * |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 248 | * Returns: |
| 249 | * 0 on success |
| 250 | */ |
Wolfgang Denk | f915c93 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 251 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 252 | unsigned short value) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 253 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 254 | struct mii_dev *bus; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 255 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 256 | bus = miiphy_get_active_dev(devname); |
| 257 | if (bus) |
| 258 | return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 259 | |
Mike Frysinger | 0daac97 | 2010-07-27 18:35:09 -0400 | [diff] [blame] | 260 | return 1; |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 261 | } |
| 262 | |
| 263 | /***************************************************************************** |
| 264 | * |
| 265 | * Print out list of registered MII capable devices. |
| 266 | */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 267 | void miiphy_listdev(void) |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 268 | { |
| 269 | struct list_head *entry; |
| 270 | struct mii_dev *dev; |
| 271 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 272 | puts("MII devices: "); |
| 273 | list_for_each(entry, &mii_devs) { |
| 274 | dev = list_entry(entry, struct mii_dev, link); |
| 275 | printf("'%s' ", dev->name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 276 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 277 | puts("\n"); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 278 | |
| 279 | if (current_mii) |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 280 | printf("Current device: '%s'\n", current_mii->name); |
Marian Balakowicz | 63ff004 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 281 | } |
| 282 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 283 | /***************************************************************************** |
| 284 | * |
| 285 | * Read the OUI, manufacture's model number, and revision number. |
| 286 | * |
| 287 | * OUI: 22 bits (unsigned int) |
| 288 | * Model: 6 bits (unsigned char) |
| 289 | * Revision: 4 bits (unsigned char) |
| 290 | * |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 291 | * This API is deprecated. |
| 292 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 293 | * Returns: |
| 294 | * 0 on success |
| 295 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 296 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 297 | unsigned char *model, unsigned char *rev) |
| 298 | { |
| 299 | unsigned int reg = 0; |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 300 | unsigned short tmp; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 301 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 302 | if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) { |
| 303 | debug("PHY ID register 2 read failed\n"); |
| 304 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 305 | } |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 306 | reg = tmp; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 307 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 308 | debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg); |
Shinya Kuribayashi | 26c7bab | 2008-01-19 10:25:59 +0900 | [diff] [blame] | 309 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 310 | if (reg == 0xFFFF) { |
| 311 | /* No physical device present at this address */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 312 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 313 | } |
| 314 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 315 | if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) { |
| 316 | debug("PHY ID register 1 read failed\n"); |
| 317 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 318 | } |
wdenk | 8bf3b00 | 2003-12-06 23:20:41 +0000 | [diff] [blame] | 319 | reg |= tmp << 16; |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 320 | debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); |
Shinya Kuribayashi | 26c7bab | 2008-01-19 10:25:59 +0900 | [diff] [blame] | 321 | |
Larry Johnson | 298035d | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 322 | *oui = (reg >> 10); |
| 323 | *model = (unsigned char)((reg >> 4) & 0x0000003F); |
| 324 | *rev = (unsigned char)(reg & 0x0000000F); |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 325 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 326 | } |
| 327 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 328 | #ifndef CONFIG_PHYLIB |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 329 | /***************************************************************************** |
| 330 | * |
| 331 | * Reset the PHY. |
Andy Fleming | 1cdabc4 | 2011-10-31 09:46:13 -0500 | [diff] [blame] | 332 | * |
| 333 | * This API is deprecated. Use PHYLIB. |
| 334 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 335 | * Returns: |
| 336 | * 0 on success |
| 337 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 338 | int miiphy_reset(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 339 | { |
| 340 | unsigned short reg; |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 341 | int timeout = 500; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 342 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 343 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
| 344 | debug("PHY status read failed\n"); |
| 345 | return -1; |
Wolfgang Denk | f89920c | 2005-08-12 23:15:53 +0200 | [diff] [blame] | 346 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 347 | if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { |
| 348 | debug("PHY reset failed\n"); |
| 349 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 350 | } |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 351 | #ifdef CONFIG_PHY_RESET_DELAY |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 352 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ |
wdenk | 5653fc3 | 2004-02-08 22:55:38 +0000 | [diff] [blame] | 353 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 354 | /* |
| 355 | * Poll the control register for the reset bit to go to 0 (it is |
| 356 | * auto-clearing). This should happen within 0.5 seconds per the |
| 357 | * IEEE spec. |
| 358 | */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 359 | reg = 0x8000; |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 360 | while (((reg & 0x8000) != 0) && timeout--) { |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 361 | if (miiphy_read(devname, addr, MII_BMCR, ®) != 0) { |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 362 | debug("PHY status read failed\n"); |
| 363 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 364 | } |
Stefan Roese | ab5a0dc | 2010-02-02 13:43:48 +0100 | [diff] [blame] | 365 | udelay(1000); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 366 | } |
| 367 | if ((reg & 0x8000) == 0) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 368 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 369 | } else { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 370 | puts("PHY reset timed out\n"); |
| 371 | return -1; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 372 | } |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 373 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 374 | } |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 375 | #endif /* !PHYLIB */ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 376 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 377 | /***************************************************************************** |
| 378 | * |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 379 | * Determine the ethernet speed (10/100/1000). Return 10 on error. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 380 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 381 | int miiphy_speed(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 382 | { |
Dongpo Li | 8c83c03 | 2016-08-22 21:03:29 +0800 | [diff] [blame] | 383 | u16 bmcr, anlpar, adv; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 384 | |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 385 | #if defined(CONFIG_PHY_GIGE) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 386 | u16 btsr; |
| 387 | |
| 388 | /* |
| 389 | * Check for 1000BASE-X. If it is supported, then assume that the speed |
| 390 | * is 1000. |
| 391 | */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 392 | if (miiphy_is_1000base_x(devname, addr)) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 393 | return _1000BASET; |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 394 | |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 395 | /* |
| 396 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
| 397 | */ |
| 398 | /* Check for 1000BASE-T. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 399 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
| 400 | printf("PHY 1000BT status"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 401 | goto miiphy_read_failed; |
| 402 | } |
| 403 | if (btsr != 0xFFFF && |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 404 | (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 405 | return _1000BASET; |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 406 | #endif /* CONFIG_PHY_GIGE */ |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 407 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 408 | /* Check Basic Management Control Register first. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 409 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
| 410 | printf("PHY speed"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 411 | goto miiphy_read_failed; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 412 | } |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 413 | /* Check if auto-negotiation is on. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 414 | if (bmcr & BMCR_ANENABLE) { |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 415 | /* Get auto-negotiation results. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 416 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 417 | printf("PHY AN speed"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 418 | goto miiphy_read_failed; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 419 | } |
Dongpo Li | 8c83c03 | 2016-08-22 21:03:29 +0800 | [diff] [blame] | 420 | |
| 421 | if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) { |
| 422 | puts("PHY AN adv speed"); |
| 423 | goto miiphy_read_failed; |
| 424 | } |
| 425 | return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 426 | } |
| 427 | /* Get speed from basic control settings. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 428 | return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 429 | |
Michael Zaidman | 5f84195 | 2010-02-28 16:28:25 +0200 | [diff] [blame] | 430 | miiphy_read_failed: |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 431 | printf(" read failed, assuming 10BASE-T\n"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 432 | return _10BASET; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 433 | } |
| 434 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 435 | /***************************************************************************** |
| 436 | * |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 437 | * Determine full/half duplex. Return half on error. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 438 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 439 | int miiphy_duplex(const char *devname, unsigned char addr) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 440 | { |
Dongpo Li | 8c83c03 | 2016-08-22 21:03:29 +0800 | [diff] [blame] | 441 | u16 bmcr, anlpar, adv; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 442 | |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 443 | #if defined(CONFIG_PHY_GIGE) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 444 | u16 btsr; |
| 445 | |
| 446 | /* Check for 1000BASE-X. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 447 | if (miiphy_is_1000base_x(devname, addr)) { |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 448 | /* 1000BASE-X */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 449 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 450 | printf("1000BASE-X PHY AN duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 451 | goto miiphy_read_failed; |
| 452 | } |
| 453 | } |
| 454 | /* |
| 455 | * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. |
| 456 | */ |
| 457 | /* Check for 1000BASE-T. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 458 | if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) { |
| 459 | printf("PHY 1000BT status"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 460 | goto miiphy_read_failed; |
| 461 | } |
| 462 | if (btsr != 0xFFFF) { |
| 463 | if (btsr & PHY_1000BTSR_1000FD) { |
| 464 | return FULL; |
| 465 | } else if (btsr & PHY_1000BTSR_1000HD) { |
| 466 | return HALF; |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 467 | } |
| 468 | } |
wdenk | 6fb6af6 | 2004-03-23 23:20:24 +0000 | [diff] [blame] | 469 | #endif /* CONFIG_PHY_GIGE */ |
wdenk | 855a496 | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 470 | |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 471 | /* Check Basic Management Control Register first. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 472 | if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) { |
| 473 | puts("PHY duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 474 | goto miiphy_read_failed; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 475 | } |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 476 | /* Check if auto-negotiation is on. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 477 | if (bmcr & BMCR_ANENABLE) { |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 478 | /* Get auto-negotiation results. */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 479 | if (miiphy_read(devname, addr, MII_LPA, &anlpar)) { |
| 480 | puts("PHY AN duplex"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 481 | goto miiphy_read_failed; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 482 | } |
Dongpo Li | 8c83c03 | 2016-08-22 21:03:29 +0800 | [diff] [blame] | 483 | |
| 484 | if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) { |
| 485 | puts("PHY AN adv duplex"); |
| 486 | goto miiphy_read_failed; |
| 487 | } |
| 488 | return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ? |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 489 | FULL : HALF; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 490 | } |
| 491 | /* Get speed from basic control settings. */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 492 | return (bmcr & BMCR_FULLDPLX) ? FULL : HALF; |
wdenk | a56bd92 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 493 | |
Michael Zaidman | 5f84195 | 2010-02-28 16:28:25 +0200 | [diff] [blame] | 494 | miiphy_read_failed: |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 495 | printf(" read failed, assuming half duplex\n"); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 496 | return HALF; |
| 497 | } |
| 498 | |
| 499 | /***************************************************************************** |
| 500 | * |
| 501 | * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ |
| 502 | * 1000BASE-T, or on error. |
| 503 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 504 | int miiphy_is_1000base_x(const char *devname, unsigned char addr) |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 505 | { |
| 506 | #if defined(CONFIG_PHY_GIGE) |
| 507 | u16 exsr; |
| 508 | |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 509 | if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) { |
| 510 | printf("PHY extended status read failed, assuming no " |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 511 | "1000BASE-X\n"); |
| 512 | return 0; |
| 513 | } |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 514 | return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH)); |
Larry Johnson | 71bc6e6 | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 515 | #else |
| 516 | return 0; |
| 517 | #endif |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 518 | } |
| 519 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 520 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 521 | /***************************************************************************** |
| 522 | * |
| 523 | * Determine link status |
| 524 | */ |
Mike Frysinger | 5700bb6 | 2010-07-27 18:35:08 -0400 | [diff] [blame] | 525 | int miiphy_link(const char *devname, unsigned char addr) |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 526 | { |
| 527 | unsigned short reg; |
| 528 | |
wdenk | a3d991b | 2004-04-15 21:48:45 +0000 | [diff] [blame] | 529 | /* dummy read; needed to latch some phys */ |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 530 | (void)miiphy_read(devname, addr, MII_BMSR, ®); |
| 531 | if (miiphy_read(devname, addr, MII_BMSR, ®)) { |
| 532 | puts("MII_BMSR read failed, assuming no link\n"); |
| 533 | return 0; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 534 | } |
| 535 | |
| 536 | /* Determine if a link is active */ |
Mike Frysinger | 8ef583a | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 537 | if ((reg & BMSR_LSTATUS) != 0) { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 538 | return 1; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 539 | } else { |
Andy Fleming | 16a5323 | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 540 | return 0; |
wdenk | fc3e216 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 541 | } |
| 542 | } |
| 543 | #endif |