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Priyanka Jain58c3e622018-11-28 13:04:27 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lu34f39ce2021-06-03 10:51:19 +08003 * Copyright 2018-2021 NXP
Priyanka Jain58c3e622018-11-28 13:04:27 +00004 */
5
6#ifndef __LX2_COMMON_H
7#define __LX2_COMMON_H
8
9#include <asm/arch/stream_id_lsch3.h>
10#include <asm/arch/config.h>
11#include <asm/arch/soc.h>
12
Priyanka Jain58c3e622018-11-28 13:04:27 +000013#define CONFIG_FSL_MEMAC
14
15#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
16#define CONFIG_SYS_FLASH_BASE 0x20000000
17
Priyanka Jain58c3e622018-11-28 13:04:27 +000018/* DDR */
Priyanka Jain58c3e622018-11-28 13:04:27 +000019#define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */
20#define CONFIG_VERY_BIG_RAM
21#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
22#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
23#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
24#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
25#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
Priyanka Jain58c3e622018-11-28 13:04:27 +000026#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
27#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
28#define SPD_EEPROM_ADDRESS1 0x51
29#define SPD_EEPROM_ADDRESS2 0x52
30#define SPD_EEPROM_ADDRESS3 0x53
31#define SPD_EEPROM_ADDRESS4 0x54
32#define SPD_EEPROM_ADDRESS5 0x55
33#define SPD_EEPROM_ADDRESS6 0x56
34#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1
35#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */
Priyanka Jain58c3e622018-11-28 13:04:27 +000036#define CONFIG_SYS_MONITOR_LEN (936 * 1024)
37
38/* Miscellaneous configurable options */
Priyanka Jain58c3e622018-11-28 13:04:27 +000039
40/* SMP Definitinos */
Michael Walle3d3fe8b2020-06-01 21:53:26 +020041#define CPU_RELEASE_ADDR secondary_boot_addr
Priyanka Jain58c3e622018-11-28 13:04:27 +000042
43/* Generic Timer Definitions */
44/*
45 * This is not an accurate number. It is used in start.S. The frequency
46 * will be udpated later when get_bus_freq(0) is available.
47 */
48
Priyanka Jain58c3e622018-11-28 13:04:27 +000049
Priyanka Jain58c3e622018-11-28 13:04:27 +000050/* Serial Port */
Priyanka Jain58c3e622018-11-28 13:04:27 +000051#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)
52#define CONFIG_SYS_SERIAL0 0x21c0000
53#define CONFIG_SYS_SERIAL1 0x21d0000
54#define CONFIG_SYS_SERIAL2 0x21e0000
55#define CONFIG_SYS_SERIAL3 0x21f0000
56/*below might needs to be removed*/
57#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \
58 (void *)CONFIG_SYS_SERIAL1, \
59 (void *)CONFIG_SYS_SERIAL2, \
60 (void *)CONFIG_SYS_SERIAL3 }
Priyanka Jain58c3e622018-11-28 13:04:27 +000061
62/* MC firmware */
63#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000
64#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000
65#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000
66#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000
67#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
68
Priyanka Jain58c3e622018-11-28 13:04:27 +000069/*
70 * Carve out a DDR region which will not be used by u-boot/Linux
71 *
72 * It will be used by MC and Debug Server. The MC region must be
73 * 512MB aligned, so the min size to hide is 512MB.
74 */
75#ifdef CONFIG_FSL_MC_ENET
Meenakshi Aggarwal43ad41e2019-02-27 14:41:02 +053076#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
Priyanka Jain58c3e622018-11-28 13:04:27 +000077#endif
78
79/* I2C bus multiplexer */
80#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
81#define I2C_MUX_CH_DEFAULT 0x8
82
83/* RTC */
84#define RTC
85#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
86
87/* EEPROM */
Priyanka Jain58c3e622018-11-28 13:04:27 +000088#define CONFIG_SYS_I2C_EEPROM_NXID
89#define CONFIG_SYS_EEPROM_BUS_NUM 0
Priyanka Jain58c3e622018-11-28 13:04:27 +000090
91/* Qixis */
Priyanka Jain58c3e622018-11-28 13:04:27 +000092#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
93
94/* PCI */
95#ifdef CONFIG_PCI
Priyanka Jain58c3e622018-11-28 13:04:27 +000096#define CONFIG_PCI_SCAN_SHOW
97#endif
98
Priyanka Jain58c3e622018-11-28 13:04:27 +000099/* SATA */
100
101#ifdef CONFIG_SCSI
Priyanka Jain58c3e622018-11-28 13:04:27 +0000102#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
103#define CONFIG_SYS_SATA2 AHCI_BASE_ADDR2
Priyanka Jain58c3e622018-11-28 13:04:27 +0000104#endif
105
106/* USB */
Tom Rinie8d3eaa2021-07-09 10:11:55 -0400107#ifdef CONFIG_USB_HOST
Meenakshi Aggarwal9ed303d2020-12-04 20:17:28 +0530108#ifndef CONFIG_TARGET_LX2162AQDS
Priyanka Jain58c3e622018-11-28 13:04:27 +0000109#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
110#endif
Meenakshi Aggarwal9ed303d2020-12-04 20:17:28 +0530111#endif
Priyanka Jain58c3e622018-11-28 13:04:27 +0000112
Tom Rini2f8a6db2021-12-14 13:36:40 -0500113#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
Priyanka Jain58c3e622018-11-28 13:04:27 +0000114
115#define CONFIG_HWCONFIG
116#define HWCONFIG_BUFFER_SIZE 128
117
Priyanka Jain58c3e622018-11-28 13:04:27 +0000118/* Monitor Command Prompt */
119#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
120#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
121 sizeof(CONFIG_SYS_PROMPT) + 16)
122#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
Priyanka Jain58c3e622018-11-28 13:04:27 +0000123#define CONFIG_SYS_MAXARGS 64 /* max command args */
124
125#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
126
127/* Initial environment variables */
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530128#define XSPI_MC_INIT_CMD \
129 "sf probe 0:0 && " \
130 "sf read 0x80640000 0x640000 0x80000 && " \
Priyanka Jain760ca922021-08-18 12:37:03 +0530131 "sf read $fdt_addr_r 0xf00000 0x100000 && " \
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530132 "env exists secureboot && " \
133 "esbc_validate 0x80640000 && " \
134 "esbc_validate 0x80680000; " \
135 "sf read 0x80a00000 0xa00000 0x300000 && " \
136 "sf read 0x80e00000 0xe00000 0x100000; " \
137 "fsl_mc start mc 0x80a00000 0x80e00000\0"
Priyanka Jain58c3e622018-11-28 13:04:27 +0000138
139#define SD_MC_INIT_CMD \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000140 "mmc read 0x80a00000 0x5000 0x1200;" \
141 "mmc read 0x80e00000 0x7000 0x800;" \
Priyanka Jain760ca922021-08-18 12:37:03 +0530142 "mmc read $fdt_addr_r 0x7800 0x800;" \
Udit Agarwal19e97e42018-12-14 04:43:32 +0000143 "env exists secureboot && " \
Priyanka Singh20858a22020-01-22 10:31:22 +0000144 "mmc read 0x80640000 0x3200 0x20 && " \
145 "mmc read 0x80680000 0x3400 0x20 && " \
146 "esbc_validate 0x80640000 && " \
147 "esbc_validate 0x80680000 ;" \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000148 "fsl_mc start mc 0x80a00000 0x80e00000\0"
Priyanka Jain58c3e622018-11-28 13:04:27 +0000149
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530150#define SD2_MC_INIT_CMD \
151 "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \
152 "mmc read 0x80e00000 0x7000 0x800;" \
Priyanka Jain760ca922021-08-18 12:37:03 +0530153 "mmc read $fdt_addr_r 0x7800 0x800;" \
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530154 "env exists secureboot && " \
155 "mmc read 0x80640000 0x3200 0x20 && " \
156 "mmc read 0x80680000 0x3400 0x20 && " \
157 "esbc_validate 0x80640000 && " \
158 "esbc_validate 0x80680000 ;" \
159 "fsl_mc start mc 0x80a00000 0x80e00000\0"
160
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000161#define EXTRA_ENV_SETTINGS \
162 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
163 "ramdisk_addr=0x800000\0" \
164 "ramdisk_size=0x2000000\0" \
165 "fdt_high=0xa0000000\0" \
166 "initrd_high=0xffffffffffffffff\0" \
167 "fdt_addr=0x64f00000\0" \
168 "kernel_start=0x1000000\0" \
Priyanka Singh20858a22020-01-22 10:31:22 +0000169 "kernelheader_start=0x600000\0" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000170 "scriptaddr=0x80000000\0" \
171 "scripthdraddr=0x80080000\0" \
172 "fdtheader_addr_r=0x80100000\0" \
173 "kernelheader_addr_r=0x80200000\0" \
174 "kernel_addr_r=0x81000000\0" \
175 "kernelheader_size=0x40000\0" \
176 "fdt_addr_r=0x90000000\0" \
177 "load_addr=0xa0000000\0" \
178 "kernel_size=0x2800000\0" \
179 "kernel_addr_sd=0x8000\0" \
Priyanka Singh20858a22020-01-22 10:31:22 +0000180 "kernelhdr_addr_sd=0x3000\0" \
Manish Tomar4ed00652020-11-05 14:08:56 +0530181 "kernel_size_sd=0x14000\0" \
Udit Agarwald749bf92019-11-20 08:49:06 +0000182 "kernelhdr_size_sd=0x20\0" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000183 "console=ttyAMA0,38400n8\0" \
184 BOOTENV \
185 "mcmemsize=0x70000000\0" \
186 XSPI_MC_INIT_CMD \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000187 "scan_dev_for_boot_part=" \
188 "part list ${devtype} ${devnum} devplist; " \
189 "env exists devplist || setenv devplist 1; " \
190 "for distro_bootpart in ${devplist}; do " \
191 "if fstype ${devtype} " \
192 "${devnum}:${distro_bootpart} " \
193 "bootfstype; then " \
194 "run scan_dev_for_boot; " \
195 "fi; " \
196 "done\0" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000197 "boot_a_script=" \
198 "load ${devtype} ${devnum}:${distro_bootpart} " \
199 "${scriptaddr} ${prefix}${script}; " \
200 "env exists secureboot && load ${devtype} " \
201 "${devnum}:${distro_bootpart} " \
202 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
203 "&& esbc_validate ${scripthdraddr};" \
204 "source ${scriptaddr}\0"
205
206#define XSPI_NOR_BOOTCOMMAND \
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530207 "sf probe 0:0; " \
208 "sf read 0x806c0000 0x6c0000 0x40000; " \
209 "env exists mcinitcmd && env exists secureboot" \
210 " && esbc_validate 0x806c0000; " \
211 "sf read 0x80d00000 0xd00000 0x100000; " \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000212 "env exists mcinitcmd && " \
Kuldeep Singhb9804c32020-03-12 15:13:00 +0530213 "fsl_mc lazyapply dpl 0x80d00000; " \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000214 "run distro_bootcmd;run xspi_bootcmd; " \
215 "env exists secureboot && esbc_halt;"
216
217#define SD_BOOTCOMMAND \
218 "env exists mcinitcmd && mmcinfo; " \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000219 "mmc read 0x80d00000 0x6800 0x800; " \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000220 "env exists mcinitcmd && env exists secureboot " \
Priyanka Singh20858a22020-01-22 10:31:22 +0000221 " && mmc read 0x806C0000 0x3600 0x20 " \
222 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
Pankaj Bansalf002b3f2019-07-17 10:33:54 +0000223 "&& fsl_mc lazyapply dpl 0x80d00000;" \
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000224 "run distro_bootcmd;run sd_bootcmd;" \
225 "env exists secureboot && esbc_halt;"
226
Meenakshi Aggarwalb7e7a462020-02-19 23:30:45 +0530227#define SD2_BOOTCOMMAND \
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530228 "mmc dev 1; env exists mcinitcmd && mmcinfo; " \
Meenakshi Aggarwalb7e7a462020-02-19 23:30:45 +0530229 "mmc read 0x80d00000 0x6800 0x800; " \
230 "env exists mcinitcmd && env exists secureboot " \
Meenakshi Aggarwal3a67cbf2020-04-27 19:56:40 +0530231 " && mmc read 0x806C0000 0x3600 0x20 " \
232 "&& esbc_validate 0x806C0000;env exists mcinitcmd " \
Meenakshi Aggarwalb7e7a462020-02-19 23:30:45 +0530233 "&& fsl_mc lazyapply dpl 0x80d00000;" \
234 "run distro_bootcmd;run sd2_bootcmd;" \
235 "env exists secureboot && esbc_halt;"
236
Daniel Klauer453db602022-02-09 15:53:41 +0100237#ifdef CONFIG_CMD_USB
238#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
239#else
240#define BOOT_TARGET_DEVICES_USB(func)
241#endif
242
243#ifdef CONFIG_MMC
244#define BOOT_TARGET_DEVICES_MMC(func, instance) func(MMC, mmc, instance)
245#else
246#define BOOT_TARGET_DEVICES_MMC(func)
247#endif
248
249#ifdef CONFIG_SCSI
250#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
251#else
252#define BOOT_TARGET_DEVICES_SCSI(func)
253#endif
254
255#ifdef CONFIG_CMD_DHCP
256#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
257#else
258#define BOOT_TARGET_DEVICES_DHCP(func)
259#endif
260
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000261#define BOOT_TARGET_DEVICES(func) \
Daniel Klauer453db602022-02-09 15:53:41 +0100262 BOOT_TARGET_DEVICES_USB(func) \
263 BOOT_TARGET_DEVICES_MMC(func, 0) \
264 BOOT_TARGET_DEVICES_MMC(func, 1) \
265 BOOT_TARGET_DEVICES_SCSI(func) \
266 BOOT_TARGET_DEVICES_DHCP(func)
Priyanka Jain3e1a9b52019-01-24 05:22:18 +0000267#include <config_distro_bootcmd.h>
268
Priyanka Jain58c3e622018-11-28 13:04:27 +0000269#endif /* __LX2_COMMON_H */