blob: 2dc2bf8547517f4c1c5523c98601ff4154772c37 [file] [log] [blame]
Masahiro Yamadad5cf3292016-03-18 16:41:52 +09001/*
2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <config.h>
8#include <linux/kernel.h>
9#include <linux/io.h>
10
11#include "../sc64-regs.h"
12#include "../sg-regs.h"
13#include "debug-uart.h"
14
15#define UNIPHIER_LD20_UART_CLK 58820000
16
17unsigned int uniphier_ld20_debug_uart_init(void)
18{
19 u32 tmp;
20
21 sg_set_iectrl(54); /* TXD0 */
22 sg_set_iectrl(58); /* TXD1 */
23 sg_set_iectrl(90); /* TXD2 */
24 sg_set_iectrl(94); /* TXD3 */
25 sg_set_pinsel(54, 0, 8, 4); /* TXD0 -> TXD0 */
26 sg_set_pinsel(58, 1, 8, 4); /* SPITXD1 -> TXD1 */
27 sg_set_pinsel(90, 1, 8, 4); /* PC0WE -> TXD2 */
28 sg_set_pinsel(94, 1, 8, 4); /* PCD00 -> TXD3 */
29
30 tmp = readl(SC_CLKCTRL4);
31 tmp |= SC_CLKCTRL4_PERI;
32 writel(tmp, SC_CLKCTRL4);
33
34 return DIV_ROUND_CLOSEST(UNIPHIER_LD20_UART_CLK, 16 * CONFIG_BAUDRATE);
35}