blob: 77ea1327f9a4e26e773f90c61bb6181caa3d39e4 [file] [log] [blame]
Michael Walle4ceb5c62020-10-15 23:08:57 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2
3#ifndef __SL28_H
4#define __SL28_H
5
6#include <asm/arch/stream_id_lsch3.h>
7#include <asm/arch/config.h>
8#include <asm/arch/soc.h>
9
10/* we don't use hwconfig but this has to be defined.. */
11#define HWCONFIG_BUFFER_SIZE 256
12
13/* we don't have secure memory unless we have a BL31 */
14#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
15#undef CONFIG_SYS_MEM_RESERVE_SECURE
16#endif
17
18/* DDR */
Michael Walle4ceb5c62020-10-15 23:08:57 +020019#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
20
21#define CONFIG_VERY_BIG_RAM
Michael Walle4ceb5c62020-10-15 23:08:57 +020022#define CONFIG_DIMM_SLOTS_PER_CTLR 1
23#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
24#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
25#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
26#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
27#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
28
29/* early stack pointer */
30#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
31
Michael Walle4ceb5c62020-10-15 23:08:57 +020032/* SMP */
33#define CPU_RELEASE_ADDR secondary_boot_addr
34
35/* generic timer */
36#define COUNTER_FREQUENCY 25000000
37
Michael Walle4ceb5c62020-10-15 23:08:57 +020038/* early heap for SPL DM */
39#define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE
40
41/* serial port */
Michael Walle4ceb5c62020-10-15 23:08:57 +020042#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
Michael Walle4ceb5c62020-10-15 23:08:57 +020043
Tom Rini2f8a6db2021-12-14 13:36:40 -050044#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
Michael Walle4ceb5c62020-10-15 23:08:57 +020045
Michael Walle4ceb5c62020-10-15 23:08:57 +020046/* SPL */
47#define CONFIG_SPL_BSS_START_ADDR 0x80100000
48#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
49#define CONFIG_SPL_MAX_SIZE 0x20000
50#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
51
52#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
53#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
54#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
55
56/* environment */
57/* see include/configs/ti_armv7_common.h */
Michael Walle4ceb5c62020-10-15 23:08:57 +020058#define ENV_MEM_LAYOUT_SETTINGS \
59 "loadaddr=0x82000000\0" \
60 "kernel_addr_r=0x82000000\0" \
61 "fdt_addr_r=0x88000000\0" \
62 "bootm_size=0x10000000\0" \
63 "pxefile_addr_r=0x80100000\0" \
64 "scriptaddr=0x80000000\0" \
65 "ramdisk_addr_r=0x88080000\0"
66
67#define BOOT_TARGET_DEVICES(func) \
Michael Walle4ceb5c62020-10-15 23:08:57 +020068 func(MMC, mmc, 0) \
Michael Wallee668bec2020-12-20 22:35:13 +010069 func(MMC, mmc, 1) \
Michael Walle4ceb5c62020-10-15 23:08:57 +020070 func(NVME, nvme, 0) \
71 func(USB, usb, 0) \
Michael Walle805b2422021-01-08 00:08:59 +010072 func(SCSI, scsi, 0) \
Michael Walle4ceb5c62020-10-15 23:08:57 +020073 func(DHCP, dhcp, 0) \
74 func(PXE, pxe, 0)
75#include <config_distro_bootcmd.h>
76
77#define CONFIG_EXTRA_ENV_SETTINGS \
78 "env_addr=0x203e0004\0" \
79 "envload=env import -d -b ${env_addr}\0" \
80 "install_rcw=source 20200000\0" \
81 "fdtfile=freescale/fsl-ls1028a-kontron-sl28.dtb\0" \
Michael Walleed302542021-11-09 14:48:51 +053082 "dfu_alt_info=sf 0:0=u-boot-bin raw 0x210000 0x1d0000;" \
83 "u-boot-env raw 0x3e0000 0x20000\0" \
Michael Walle4ceb5c62020-10-15 23:08:57 +020084 ENV_MEM_LAYOUT_SETTINGS \
85 BOOTENV
86
87#endif /* __SL28_H */