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Stefan Roeseb0f80b92015-01-19 11:33:42 +01001/*
Stefan Roesea5f88872016-01-07 14:09:09 +01002 * Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
Stefan Roeseb0f80b92015-01-19 11:33:42 +01003 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
Stefan Roese64512232015-11-25 07:37:00 +01008#include <dm.h>
9#include <debug_uart.h>
10#include <fdtdec.h>
Stefan Roeseb0f80b92015-01-19 11:33:42 +010011#include <spl.h>
12#include <asm/io.h>
13#include <asm/arch/cpu.h>
14#include <asm/arch/soc.h>
15
Stefan Roesea5f88872016-01-07 14:09:09 +010016static u32 get_boot_device(void)
17{
18 u32 val;
19 u32 boot_device;
20
Stefan Roesef4db6c92016-01-07 14:12:04 +010021 /*
22 * First check, if UART boot-mode is active. This can only
23 * be done, via the bootrom error register. Here the
24 * MSB marks if the UART mode is active.
25 */
26 val = readl(CONFIG_BOOTROM_ERR_REG);
27 boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
28 debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
Sean Nyekjaere83e2b32017-11-24 14:01:28 +010029#if defined(CONFIG_ARMADA_38X)
30 /*
31 * If the bootrom error register contains any else than zeros
32 * in the first 8 bits it's an error condition. And in that case
33 * try to boot from UART.
34 */
35 if (boot_device)
36#else
Stefan Roesef4db6c92016-01-07 14:12:04 +010037 if (boot_device == BOOTROM_ERR_MODE_UART)
Sean Nyekjaere83e2b32017-11-24 14:01:28 +010038#endif
Stefan Roesef4db6c92016-01-07 14:12:04 +010039 return BOOT_DEVICE_UART;
40
41 /*
42 * Now check the SAR register for the strapped boot-device
43 */
Stefan Roesea5f88872016-01-07 14:09:09 +010044 val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */
45 boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
Stefan Roesef4db6c92016-01-07 14:12:04 +010046 debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
Stefan Roesea5f88872016-01-07 14:09:09 +010047 switch (boot_device) {
Sean Nyekjaer926c8b22017-11-24 14:01:47 +010048#if defined(CONFIG_ARMADA_38X)
49 case BOOT_FROM_NAND:
50 return BOOT_DEVICE_NAND;
51#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010052#ifdef CONFIG_SPL_MMC_SUPPORT
53 case BOOT_FROM_MMC:
54 case BOOT_FROM_MMC_ALT:
55 return BOOT_DEVICE_MMC1;
56#endif
57 case BOOT_FROM_UART:
Baruch Siachf3a88e22017-09-24 15:50:17 +030058#ifdef BOOT_FROM_UART_ALT
59 case BOOT_FROM_UART_ALT:
60#endif
Stefan Roesea5f88872016-01-07 14:09:09 +010061 return BOOT_DEVICE_UART;
62 case BOOT_FROM_SPI:
63 default:
64 return BOOT_DEVICE_SPI;
65 };
66}
67
Stefan Roeseb0f80b92015-01-19 11:33:42 +010068u32 spl_boot_device(void)
69{
Stefan Roesea5f88872016-01-07 14:09:09 +010070 return get_boot_device();
Stefan Roeseb0f80b92015-01-19 11:33:42 +010071}
72
Stefan Roese8ed43b92015-07-20 11:20:36 +020073#ifdef CONFIG_SPL_MMC_SUPPORT
Marek Vasut2b1cdaf2016-05-14 23:42:07 +020074u32 spl_boot_mode(const u32 boot_device)
Stefan Roese8ed43b92015-07-20 11:20:36 +020075{
76 return MMCSD_MODE_RAW;
77}
78#endif
79
Stefan Roeseb0f80b92015-01-19 11:33:42 +010080void board_init_f(ulong dummy)
81{
Stefan Roese64512232015-11-25 07:37:00 +010082 int ret;
83
Stefan Roesee3cccf92015-04-17 18:13:06 +020084 /*
85 * Pin muxing needs to be done before UART output, since
86 * on A38x the UART pins need some re-muxing for output
87 * to work.
88 */
89 board_early_init_f();
90
Stefan Roese64512232015-11-25 07:37:00 +010091 /* Example code showing how to enable the debug UART on MVEBU */
92#ifdef EARLY_UART
93 /*
94 * Debug UART can be used from here if required:
95 *
96 * debug_uart_init();
97 * printch('a');
98 * printhex8(0x1234);
99 * printascii("string");
100 */
101#endif
102
103 ret = spl_init();
104 if (ret) {
105 debug("spl_init() failed: %d\n", ret);
106 hang();
107 }
108
109 /* Use special translation offset for SPL */
110 dm_set_translation_offset(0xd0000000 - 0xf1000000);
111
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100112 preloader_console_init();
113
Stefan Roeseade741b2015-07-15 15:36:52 +0200114 timer_init();
115
Stefan Roese09e89ab2016-02-10 07:23:00 +0100116 /* Armada 375 does not support SerDes and DDR3 init yet */
117#if !defined(CONFIG_ARMADA_375)
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100118 /* First init the serdes PHY's */
119 serdes_phy_config();
120
121 /* Setup DDR */
122 ddr3_init();
Stefan Roese09e89ab2016-02-10 07:23:00 +0100123#endif
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100124
Stefan Roese944c7a32015-08-25 13:49:41 +0200125 /*
126 * Return to the BootROM to continue the Marvell xmodem
127 * UART boot protocol. As initiated by the kwboot tool.
128 *
129 * This can only be done by the BootROM and not by the
130 * U-Boot SPL infrastructure, since the beginning of the
131 * image is already read and interpreted by the BootROM.
132 * SPL has no chance to receive this information. So we
133 * need to return to the BootROM to enable this xmodem
134 * UART download.
Sean Nyekjaer926c8b22017-11-24 14:01:47 +0100135 *
136 * If booting from NAND lets let the BootROM load the
137 * rest of the bootloader.
Stefan Roese944c7a32015-08-25 13:49:41 +0200138 */
Sean Nyekjaer926c8b22017-11-24 14:01:47 +0100139 switch (get_boot_device()) {
140 case BOOT_DEVICE_UART:
141#if defined(CONFIG_ARMADA_38X)
142 case BOOT_DEVICE_NAND:
143#endif
144 return_to_bootrom();
145 }
Stefan Roeseb0f80b92015-01-19 11:33:42 +0100146}