Wolfgang Denk | aa72d8b | 2010-11-21 17:04:17 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2007-2009 Freescale Semiconductor, Inc. |
| 3 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Wolfgang Denk | aa72d8b | 2010-11-21 17:04:17 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include "config.h" /* CONFIG_BOARDDIR */ |
| 8 | |
| 9 | #ifndef RESET_VECTOR_ADDRESS |
| 10 | #define RESET_VECTOR_ADDRESS 0xfffffffc |
| 11 | #endif |
| 12 | |
| 13 | OUTPUT_ARCH(powerpc) |
| 14 | |
| 15 | PHDRS |
| 16 | { |
| 17 | text PT_LOAD; |
| 18 | bss PT_LOAD; |
| 19 | } |
| 20 | |
| 21 | SECTIONS |
| 22 | { |
| 23 | /* Read-only sections, merged into text segment: */ |
| 24 | . = + SIZEOF_HEADERS; |
| 25 | .text : |
| 26 | { |
| 27 | *(.text*) |
| 28 | } :text |
| 29 | _etext = .; |
| 30 | PROVIDE (etext = .); |
| 31 | .rodata : |
| 32 | { |
| 33 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
| 34 | } :text |
| 35 | |
| 36 | /* Read-write section, merged into data segment: */ |
| 37 | . = (. + 0x00FF) & 0xFFFFFF00; |
| 38 | _erotext = .; |
| 39 | PROVIDE (erotext = .); |
| 40 | .reloc : |
| 41 | { |
Wolfgang Denk | aa72d8b | 2010-11-21 17:04:17 +0100 | [diff] [blame] | 42 | _GOT2_TABLE_ = .; |
| 43 | KEEP(*(.got2)) |
Joakim Tjernlund | 9d8fbd1 | 2011-04-20 14:22:59 +0200 | [diff] [blame] | 44 | KEEP(*(.got)) |
| 45 | PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); |
Wolfgang Denk | aa72d8b | 2010-11-21 17:04:17 +0100 | [diff] [blame] | 46 | _FIXUP_TABLE_ = .; |
| 47 | KEEP(*(.fixup)) |
| 48 | } |
| 49 | __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; |
| 50 | __fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
| 51 | |
| 52 | .data : |
| 53 | { |
| 54 | *(.data*) |
| 55 | *(.sdata*) |
| 56 | } |
| 57 | _edata = .; |
| 58 | PROVIDE (edata = .); |
| 59 | |
| 60 | . = .; |
Wolfgang Denk | aa72d8b | 2010-11-21 17:04:17 +0100 | [diff] [blame] | 61 | |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 62 | . = ALIGN(4); |
| 63 | .u_boot_list : { |
Albert ARIBAUD | ef123c5 | 2013-02-25 00:59:00 +0000 | [diff] [blame] | 64 | KEEP(*(SORT(.u_boot_list*))); |
Marek Vasut | 5567514 | 2012-10-12 10:27:03 +0000 | [diff] [blame] | 65 | } |
| 66 | |
Wolfgang Denk | aa72d8b | 2010-11-21 17:04:17 +0100 | [diff] [blame] | 67 | . = .; |
| 68 | __start___ex_table = .; |
| 69 | __ex_table : { *(__ex_table) } |
| 70 | __stop___ex_table = .; |
| 71 | |
| 72 | . = ALIGN(256); |
| 73 | __init_begin = .; |
| 74 | .text.init : { *(.text.init) } |
| 75 | .data.init : { *(.data.init) } |
| 76 | . = ALIGN(256); |
| 77 | __init_end = .; |
| 78 | |
| 79 | ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and CONFIG_SYS_TEXT_BASE may need to be modified."); |
| 80 | . = 0xFFFF8000; |
| 81 | .ppcenv : |
| 82 | { |
| 83 | common/env_embedded.o(.ppcenv); |
| 84 | } |
| 85 | |
| 86 | .resetvec RESET_VECTOR_ADDRESS : |
| 87 | { |
| 88 | KEEP(*(.resetvec)) |
| 89 | } :text = 0xffff |
| 90 | |
| 91 | . = RESET_VECTOR_ADDRESS + 0x4; |
| 92 | |
| 93 | /* |
| 94 | * Make sure that the bss segment isn't linked at 0x0, otherwise its |
| 95 | * address won't be updated during relocation fixups. Note that |
| 96 | * this is a temporary fix. Code to dynamically the fixup the bss |
| 97 | * location will be added in the future. When the bss relocation |
| 98 | * fixup code is present this workaround should be removed. |
| 99 | */ |
| 100 | #if (RESET_VECTOR_ADDRESS == 0xfffffffc) |
| 101 | . |= 0x10; |
| 102 | #endif |
| 103 | |
| 104 | __bss_start = .; |
| 105 | .bss (NOLOAD) : |
| 106 | { |
| 107 | *(.bss*) |
| 108 | *(.sbss*) |
| 109 | *(COMMON) |
| 110 | } :bss |
| 111 | |
| 112 | . = ALIGN(4); |
Simon Glass | 3929fb0 | 2013-03-14 06:54:53 +0000 | [diff] [blame] | 113 | __bss_end = . ; |
Wolfgang Denk | aa72d8b | 2010-11-21 17:04:17 +0100 | [diff] [blame] | 114 | PROVIDE (end = .); |
| 115 | } |