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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ilya Ledvich69632042017-09-24 09:00:25 +03002/*
3 * Copyright (C) 2015 CompuLab, Ltd.
4 *
5 * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
Ilya Ledvich69632042017-09-24 09:00:25 +03006 */
7
8#ifndef __CL_SOM_IMX7_CONFIG_H
9#define __CL_SOM_IMX7_CONFIG_H
10
11#include "mx7_common.h"
12
Ilya Ledvich69632042017-09-24 09:00:25 +030013#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
14
15/* Size of malloc() pool */
16#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
17
18#define CONFIG_BOARD_LATE_INIT
19
20/* Uncomment to enable secure boot support */
21/* #define CONFIG_SECURE_BOOT */
22#define CONFIG_CSF_SIZE 0x4000
23
24/* Network */
25#define CONFIG_FEC_MXC
Ilya Ledvich69632042017-09-24 09:00:25 +030026#define CONFIG_FEC_XCV_TYPE RGMII
27#define CONFIG_ETHPRIME "FEC"
28#define CONFIG_FEC_MXC_PHYADDR 0
29
30#define CONFIG_PHYLIB
31#define CONFIG_PHY_ATHEROS
32/* ENET1 */
33#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
34
35/* PMIC */
36#define CONFIG_POWER
37#define CONFIG_POWER_I2C
38#define CONFIG_POWER_PFUZE3000
39#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
40
Ilya Ledvich69632042017-09-24 09:00:25 +030041/* I2C configs */
42#define CONFIG_SYS_I2C
43#define CONFIG_SYS_I2C_MXC
44#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
45#define CONFIG_SYS_I2C_SPEED 100000
46#define SYS_I2C_BUS_SOM 0
47
48#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
49#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
50#define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM
51
52#define CONFIG_PCA953X
53#define CONFIG_CMD_PCA953X
54#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
55#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
56
57#undef CONFIG_SYS_AUTOLOAD
58#undef CONFIG_EXTRA_ENV_SETTINGS
59#undef CONFIG_BOOTCOMMAND
Ilya Ledvich69632042017-09-24 09:00:25 +030060
Ilya Ledvich69632042017-09-24 09:00:25 +030061#define CONFIG_SYS_AUTOLOAD "no"
62
63#define CONFIG_EXTRA_ENV_SETTINGS \
64 "autoload=off\0" \
65 "script=boot.scr\0" \
66 "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
67 "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
68 "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
69 "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
70 "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
71 "kernel=zImage\0" \
72 "console=ttymxc0\0" \
73 "fdt_high=0xffffffff\0" \
74 "initrd_high=0xffffffff\0" \
75 "fdtfile=imx7d-sbc-imx7.dtb\0" \
76 "fdtaddr=0x83000000\0" \
77 "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
78 "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
79 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
80 "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
81 "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
82 "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
83 "mmcargs=setenv bootargs console=${console},${baudrate} " \
84 "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
85 "mmcbootscript=" \
86 "if run mmc_config; then " \
87 "setenv storagetype mmc;" \
88 "setenv storagedev ${mmcdev}:${mmcpart};" \
89 "if run loadscript; then " \
90 "run bootscript; " \
91 "fi; " \
92 "fi;\0" \
93 "mmcboot=" \
94 "if run mmc_config; then " \
95 "setenv storagetype mmc;" \
96 "setenv storagedev ${mmcdev}:${mmcpart};" \
97 "if run loadkernel; then " \
98 "if run loadfdt; then " \
99 "run storagebootcmd;" \
100 "fi; " \
101 "fi; " \
102 "fi;\0" \
103 "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
104 "run mmcbootscript\0" \
105 "usbbootscript=setenv usbdev ${usbdev_def}; " \
106 "setenv storagetype usb;" \
107 "setenv storagedev ${usbdev}:${usbpart};" \
108 "if run loadscript; then " \
109 "run bootscript; " \
110 "fi; " \
111 "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
112 "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
113 "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
114
115#define CONFIG_BOOTCOMMAND \
116 "echo SD boot attempt ...; run sdbootscript; run sdboot; " \
117 "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
118 "echo USB boot attempt ...; run usbbootscript; "
119
120#define CONFIG_SYS_MEMTEST_START 0x80000000
121#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
122
123#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
124#define CONFIG_SYS_HZ 1000
125
126/* Physical Memory Map */
Ilya Ledvich69632042017-09-24 09:00:25 +0300127#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
128
129#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
130#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
131#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
132
133#define CONFIG_SYS_INIT_SP_OFFSET \
134 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
135#define CONFIG_SYS_INIT_SP_ADDR \
136 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
137
138/* SPI Flash support */
Ilya Ledvich69632042017-09-24 09:00:25 +0300139
140/* FLASH and environment organization */
141#define CONFIG_ENV_SIZE SZ_8K
142#define CONFIG_ENV_OFFSET (768 * 1024)
143#define CONFIG_ENV_SECT_SIZE (64 * 1024)
Ilya Ledvich69632042017-09-24 09:00:25 +0300144
145/* MMC Config*/
Ilya Ledvich69632042017-09-24 09:00:25 +0300146#ifdef CONFIG_FSL_USDHC
147#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
148
149#define CONFIG_SYS_FSL_USDHC_NUM 2
150#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
Ilya Ledvich69632042017-09-24 09:00:25 +0300151#endif
152
153/* USB Configs */
154#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
155#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
156#define CONFIG_MXC_USB_FLAGS 0
157#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
158
159/* Uncomment to enable iMX thermal driver support */
160/*#define CONFIG_IMX_THERMAL*/
161
162/* SPL */
163#include "imx7_spl.h"
Ilya Ledvich69632042017-09-24 09:00:25 +0300164
165#endif /* __CONFIG_H */