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Minkyu Kangdd2c9e62009-10-01 17:20:28 +09001/*
2 * (C) Copyright 2009 SAMSUNG Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Heungjun Kim <riverful.kim@samsung.com>
5 *
6 * based on drivers/serial/s3c64xx.c
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kangdd2c9e62009-10-01 17:20:28 +09009 */
10
11#include <common.h>
Simon Glass73e256c2014-09-14 16:36:17 -060012#include <dm.h>
13#include <errno.h>
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +053014#include <fdtdec.h>
Mike Frysinger6c768ca2011-04-29 18:03:29 +000015#include <linux/compiler.h>
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090016#include <asm/io.h>
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090017#include <asm/arch/clk.h>
Simon Glass89ca9352015-07-02 18:15:53 -060018#include <asm/arch/uart.h>
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090019#include <serial.h>
20
John Rigby29565322010-12-20 18:27:51 -070021DECLARE_GLOBAL_DATA_PTR;
22
Simon Glass73e256c2014-09-14 16:36:17 -060023#define RX_FIFO_COUNT_SHIFT 0
24#define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
25#define RX_FIFO_FULL (1 << 8)
26#define TX_FIFO_COUNT_SHIFT 16
27#define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
28#define TX_FIFO_FULL (1 << 24)
Akshay Saraswatffbff1d2013-03-21 20:33:04 +000029
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +053030/* Information about a serial port */
Simon Glass73e256c2014-09-14 16:36:17 -060031struct s5p_serial_platdata {
32 struct s5p_uart *reg; /* address of registers in physical memory */
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +053033 u8 port_id; /* uart port number */
Simon Glass73e256c2014-09-14 16:36:17 -060034};
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090035
36/*
Minkyu Kang46a3b5c2010-03-24 16:59:30 +090037 * The coefficient, used to calculate the baudrate on S5P UARTs is
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090038 * calculated as
39 * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
40 * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
41 * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
42 */
43static const int udivslot[] = {
44 0,
45 0x0080,
46 0x0808,
47 0x0888,
48 0x2222,
49 0x4924,
50 0x4a52,
51 0x54aa,
52 0x5555,
53 0xd555,
54 0xd5d5,
55 0xddd5,
56 0xdddd,
57 0xdfdd,
58 0xdfdf,
59 0xffdf,
60};
61
Simon Glass89ca9352015-07-02 18:15:53 -060062static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090063{
Simon Glass89ca9352015-07-02 18:15:53 -060064 /* enable FIFOs, auto clear Rx FIFO */
65 writel(0x3, &uart->ufcon);
66 writel(0, &uart->umcon);
67 /* 8N1 */
68 writel(0x3, &uart->ulcon);
69 /* No interrupts, no DMA, pure polling */
70 writel(0x245, &uart->ucon);
71}
72
73static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
74 int baudrate)
75{
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090076 u32 val;
77
Minkyu Kangf70409a2010-08-24 15:51:55 +090078 val = uclk / baudrate;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090079
80 writel(val / 16 - 1, &uart->ubrdiv);
Minkyu Kang1628cfc2010-09-28 14:35:02 +090081
Minkyu Kange0617c62011-01-24 14:43:25 +090082 if (s5p_uart_divslot())
Minkyu Kang1628cfc2010-09-28 14:35:02 +090083 writew(udivslot[val % 16], &uart->rest.slot);
84 else
85 writeb(val % 16, &uart->rest.value);
Simon Glass89ca9352015-07-02 18:15:53 -060086}
87
Simon Glass7fb57392015-07-02 18:15:55 -060088#ifndef CONFIG_SPL_BUILD
Simon Glass89ca9352015-07-02 18:15:53 -060089int s5p_serial_setbrg(struct udevice *dev, int baudrate)
90{
91 struct s5p_serial_platdata *plat = dev->platdata;
92 struct s5p_uart *const uart = plat->reg;
93 u32 uclk = get_uart_clk(plat->port_id);
94
95 s5p_serial_baud(uart, uclk, baudrate);
Simon Glass73e256c2014-09-14 16:36:17 -060096
97 return 0;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +090098}
99
Simon Glass73e256c2014-09-14 16:36:17 -0600100static int s5p_serial_probe(struct udevice *dev)
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900101{
Simon Glass73e256c2014-09-14 16:36:17 -0600102 struct s5p_serial_platdata *plat = dev->platdata;
103 struct s5p_uart *const uart = plat->reg;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900104
Simon Glass89ca9352015-07-02 18:15:53 -0600105 s5p_serial_init(uart);
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900106
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900107 return 0;
108}
109
Simon Glass73e256c2014-09-14 16:36:17 -0600110static int serial_err_check(const struct s5p_uart *const uart, int op)
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900111{
Minkyu Kang94003222009-11-10 20:23:50 +0900112 unsigned int mask;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900113
Minkyu Kang94003222009-11-10 20:23:50 +0900114 /*
115 * UERSTAT
116 * Break Detect [3]
117 * Frame Err [2] : receive operation
118 * Parity Err [1] : receive operation
119 * Overrun Err [0] : receive operation
120 */
121 if (op)
122 mask = 0x8;
123 else
124 mask = 0xf;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900125
Minkyu Kang94003222009-11-10 20:23:50 +0900126 return readl(&uart->uerstat) & mask;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900127}
128
Simon Glass73e256c2014-09-14 16:36:17 -0600129static int s5p_serial_getc(struct udevice *dev)
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900130{
Simon Glass73e256c2014-09-14 16:36:17 -0600131 struct s5p_serial_platdata *plat = dev->platdata;
132 struct s5p_uart *const uart = plat->reg;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900133
Simon Glass73e256c2014-09-14 16:36:17 -0600134 if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
135 return -EAGAIN;
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +0530136
Simon Glass73e256c2014-09-14 16:36:17 -0600137 serial_err_check(uart, 0);
Minkyu Kang1a4106d2010-07-06 20:08:29 +0900138 return (int)(readb(&uart->urxh) & 0xff);
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900139}
140
Simon Glass73e256c2014-09-14 16:36:17 -0600141static int s5p_serial_putc(struct udevice *dev, const char ch)
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900142{
Simon Glass73e256c2014-09-14 16:36:17 -0600143 struct s5p_serial_platdata *plat = dev->platdata;
144 struct s5p_uart *const uart = plat->reg;
Minkyu Kangdd2c9e62009-10-01 17:20:28 +0900145
Simon Glass73e256c2014-09-14 16:36:17 -0600146 if (readl(&uart->ufstat) & TX_FIFO_FULL)
147 return -EAGAIN;
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +0530148
Simon Glass73e256c2014-09-14 16:36:17 -0600149 writeb(ch, &uart->utxh);
150 serial_err_check(uart, 1);
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +0530151
152 return 0;
153}
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +0530154
Simon Glass73e256c2014-09-14 16:36:17 -0600155static int s5p_serial_pending(struct udevice *dev, bool input)
Mike Frysinger6c768ca2011-04-29 18:03:29 +0000156{
Simon Glass73e256c2014-09-14 16:36:17 -0600157 struct s5p_serial_platdata *plat = dev->platdata;
158 struct s5p_uart *const uart = plat->reg;
159 uint32_t ufstat = readl(&uart->ufstat);
Rajeshwari Shinded4ec8f02013-06-24 16:47:22 +0530160
Simon Glass73e256c2014-09-14 16:36:17 -0600161 if (input)
162 return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
163 else
164 return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
Mike Frysinger6c768ca2011-04-29 18:03:29 +0000165}
Marek Vasutb4980512012-09-12 19:39:57 +0200166
Simon Glass73e256c2014-09-14 16:36:17 -0600167static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
Marek Vasutb4980512012-09-12 19:39:57 +0200168{
Simon Glass73e256c2014-09-14 16:36:17 -0600169 struct s5p_serial_platdata *plat = dev->platdata;
170 fdt_addr_t addr;
171
Simon Glass4e9838c2015-08-11 08:33:29 -0600172 addr = dev_get_addr(dev);
Simon Glass73e256c2014-09-14 16:36:17 -0600173 if (addr == FDT_ADDR_T_NONE)
174 return -EINVAL;
175
176 plat->reg = (struct s5p_uart *)addr;
177 plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1);
178
179 return 0;
Marek Vasutb4980512012-09-12 19:39:57 +0200180}
Simon Glass73e256c2014-09-14 16:36:17 -0600181
182static const struct dm_serial_ops s5p_serial_ops = {
183 .putc = s5p_serial_putc,
184 .pending = s5p_serial_pending,
185 .getc = s5p_serial_getc,
186 .setbrg = s5p_serial_setbrg,
187};
188
189static const struct udevice_id s5p_serial_ids[] = {
190 { .compatible = "samsung,exynos4210-uart" },
191 { }
192};
193
194U_BOOT_DRIVER(serial_s5p) = {
195 .name = "serial_s5p",
196 .id = UCLASS_SERIAL,
197 .of_match = s5p_serial_ids,
198 .ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
199 .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
200 .probe = s5p_serial_probe,
201 .ops = &s5p_serial_ops,
202 .flags = DM_FLAG_PRE_RELOC,
203};
Simon Glass7fb57392015-07-02 18:15:55 -0600204#endif
Simon Glassbf6e7022015-07-02 18:15:54 -0600205
206#ifdef CONFIG_DEBUG_UART_S5P
207
208#include <debug_uart.h>
209
210void debug_uart_init(void)
211{
212 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
213
214 s5p_serial_init(uart);
215 s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
216}
217
218static inline void _debug_uart_putc(int ch)
219{
220 struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
221
222 while (readl(&uart->ufstat) & TX_FIFO_FULL);
223
224 writeb(ch, &uart->utxh);
225}
226
227DEBUG_UART_FUNCS
228
229#endif