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Simon Glassa2f5d092014-11-14 18:18:27 -07001/*
2 * From coreboot file of the same name
3 *
4 * Copyright (C) 2010 coresystems GmbH
5 *
6 * SPDX-License-Identifier: GPL-2.0
7 */
8
9#ifndef __ASM_IOAPIC_H
10#define __ASM_IOAPIC_H
11
12#define IO_APIC_ADDR 0xfec00000
Bin Mengba9091f2015-06-23 12:18:48 +080013
14/* Direct addressed register */
15#define IO_APIC_INDEX (IO_APIC_ADDR + 0x00)
Simon Glassa2f5d092014-11-14 18:18:27 -070016#define IO_APIC_DATA (IO_APIC_ADDR + 0x10)
Simon Glassa2f5d092014-11-14 18:18:27 -070017
Bin Meng3d232872015-06-23 12:18:49 +080018/* Indirect addressed register offset */
19#define IO_APIC_ID 0x00
20#define IO_APIC_VER 0x01
21
22/**
23 * io_apic_read() - Read I/O APIC register
24 *
25 * This routine reads I/O APIC indirect addressed register.
26 *
27 * @reg: address of indirect addressed register
28 * @return: register value to read
29 */
30u32 io_apic_read(u32 reg);
31
32/**
33 * io_apic_write() - Write I/O APIC register
34 *
35 * This routine writes I/O APIC indirect addressed register.
36 *
37 * @reg: address of indirect addressed register
38 * @val: register value to write
39 */
40void io_apic_write(u32 reg, u32 val);
41
Simon Glassa2f5d092014-11-14 18:18:27 -070042#endif