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Prafulla Wadaskare5f495d2010-12-07 15:23:39 +05301/*
2 * (C) Copyright 2010
3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>,
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 */
24
25#include <common.h>
26#include <asm/io.h>
27#include <mvmfp.h>
28#include <asm/arch/mfp.h>
29#ifdef CONFIG_ARMADA100
30#include <asm/arch/armada100.h>
Lei Wena03774e2011-02-09 18:06:58 +053031#elif defined(CONFIG_PANTHEON)
32#include <asm/arch/pantheon.h>
Prafulla Wadaskare5f495d2010-12-07 15:23:39 +053033#else
34#error Unsupported SoC...
35#endif
36
37/*
38 * mfp_config
39 *
40 * On most of Marvell SoCs (ex. ARMADA100) there is Multi-Funtion-Pin
41 * configuration registers to configure each GPIO/Function pin on the
42 * SoC.
43 *
44 * This function reads the array of values for
45 * MFPR_X registers and programms them into respective
46 * Multi-Function Pin registers.
47 * It supports - Alternate Function Selection programming.
48 *
49 * Whereas,
50 * The Configureation value is constructed using MFP()
51 * array consists of 32bit values as defined in MFP(xx,xx..) macro
52 */
53void mfp_config(u32 *mfp_cfgs)
54{
55 u32 *p_mfpr = NULL;
56 u32 cfg_val, val;
57
58 do {
59 cfg_val = *mfp_cfgs++;
60 /* exit if End of configuration table detected */
61 if (cfg_val == MFP_EOC)
62 break;
63
64 p_mfpr = (u32 *)(MV_MFPR_BASE
65 + MFP_REG_GET_OFFSET(cfg_val));
66
67 /* Write a mfg register as per configuration */
68 val = 0;
69 if (cfg_val & MFP_AF_FLAG)
70 /* Abstract and program Afternate-Func Selection */
71 val |= cfg_val & MFP_AF_MASK;
72 if (cfg_val & MFP_EDGE_FLAG)
73 /* Abstract and program Edge configuration */
74 val |= cfg_val & MFP_LPM_EDGE_MASK;
75 if (cfg_val & MFP_DRIVE_FLAG)
76 /* Abstract and program Drive configuration */
77 val |= cfg_val & MFP_DRIVE_MASK;
78 if (cfg_val & MFP_PULL_FLAG)
79 /* Abstract and program Pullup/down configuration */
80 val |= cfg_val & MFP_PULL_MASK;
81
82 writel(val, p_mfpr);
83 } while (1);
84 /*
85 * perform a read-back of any MFPR register to make sure the
86 * previous writings are finished
87 */
88 readl(p_mfpr);
89}