blob: f3f022c375b7578d94ab7535b55247218aa5e124 [file] [log] [blame]
Sjoerd Simons45123802019-02-25 15:33:00 +00001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * Copyright (C) 2018 Robert Bosch Power Tools GmbH
5 */
6/dts-v1/;
7
8#include "am33xx.dtsi"
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13 model = "Bosch AM335x Guardian";
14 compatible = "bosch,am335x-guardian", "ti,am33xx";
15
16 chosen {
17 stdout-path = &uart0;
18 tick-timer = &timer2;
19 };
20
21 cpus {
22 cpu@0 {
23 cpu0-supply = <&dcdc2_reg>;
24 };
25 };
26
27 memory@80000000 {
28 device_type = "memory";
29 reg = <0x80000000 0x10000000>; /* 256 MB */
30 };
31
32 gpio_keys {
33 compatible = "gpio-keys";
34 pinctrl-names = "default";
35 pinctrl-0 = <&gpio_keys_pins>;
36
37 button21 {
38 label = "guardian-power-button";
39 linux,code = <KEY_POWER>;
40 gpios = <&gpio2 21 0>;
41 wakeup-source;
42 };
43 };
44
45 leds {
46 compatible = "gpio-leds";
47 pinctrl-names = "default";
48 pinctrl-0 = <&leds_pins>;
49
50 led1 {
51 label = "green:heartbeat";
52 gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
53 linux,default-trigger = "heartbeat";
54 default-state = "off";
55 };
56
57 led2 {
58 label = "green:mmc0";
59 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
60 linux,default-trigger = "mmc0";
61 default-state = "off";
62 };
63 };
64
65 panel {
66 compatible = "ti,tilcdc,panel";
67 pinctrl-names = "default", "sleep";
68 pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
69 pinctrl-1 = <&lcd_pins_sleep>;
70
71 display-timings {
72 320x240 {
73 hactive = <320>;
74 vactive = <240>;
75 hback-porch = <68>;
76 hfront-porch = <20>;
77 hsync-len = <1>;
78 vback-porch = <18>;
79 vfront-porch = <4>;
80 vsync-len = <1>;
81 clock-frequency = <9000000>;
82 hsync-active = <0>;
83 vsync-active = <0>;
84 };
85 };
86 panel-info {
87 ac-bias = <255>;
88 ac-bias-intrpt = <0>;
89 dma-burst-sz = <16>;
90 bpp = <24>;
91 bus-width = <16>;
92 fdd = <0x80>;
93 sync-edge = <0>;
94 sync-ctrl = <1>;
95 raster-order = <0>;
96 fifo-th = <0>;
97 };
98
99 };
100
101 pwm7: dmtimer-pwm {
102 compatible = "ti,omap-dmtimer-pwm";
103 ti,timers = <&timer7>;
104 pinctrl-names = "default";
105 pinctrl-0 = <&dmtimer7_pins>;
106 };
107
108 vmmcsd_fixed: regulator-3v3 {
109 compatible = "regulator-fixed";
110 regulator-name = "vmmcsd_fixed";
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
113 };
114};
115
116&cppi41dma {
117 status = "okay";
118};
119
120&elm {
121 status = "okay";
122};
123
124&gpmc {
125 pinctrl-names = "default";
126 pinctrl-0 = <&nandflash_pins>;
127 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
128 status = "okay";
129
130 nand@0,0 {
131 compatible = "ti,omap2-nand";
132 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
133 interrupt-parent = <&gpmc>;
134 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
135 <1 IRQ_TYPE_NONE>; /* termcount */
136 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
137 ti,nand-ecc-opt = "bch16";
138 ti,elm-id = <&elm>;
139 nand-bus-width = <8>;
140 gpmc,device-width = <1>;
141 gpmc,sync-clk-ps = <0>;
142 gpmc,cs-on-ns = <0>;
143 gpmc,cs-rd-off-ns = <44>;
144 gpmc,cs-wr-off-ns = <44>;
145 gpmc,adv-on-ns = <6>;
146 gpmc,adv-rd-off-ns = <34>;
147 gpmc,adv-wr-off-ns = <44>;
148 gpmc,we-on-ns = <0>;
149 gpmc,we-off-ns = <40>;
150 gpmc,oe-on-ns = <0>;
151 gpmc,oe-off-ns = <54>;
152 gpmc,access-ns = <64>;
153 gpmc,rd-cycle-ns = <82>;
154 gpmc,wr-cycle-ns = <82>;
155 gpmc,bus-turnaround-ns = <0>;
156 gpmc,cycle2cycle-delay-ns = <0>;
157 gpmc,clk-activation-ns = <0>;
158 gpmc,wr-access-ns = <40>;
159 gpmc,wr-data-mux-bus-ns = <0>;
160
161 /*
162 * MTD partition table
163 *
164 * All SPL-* partitions are sized to minimal length which can
165 * be independently programmable. For NAND flash this is equal
166 * to size of erase-block.
167 */
168 #address-cells = <1>;
169 #size-cells = <1>;
170
171 partition@0 {
172 label = "SPL";
173 reg = <0x0 0x40000>;
174 };
175
176 partition@1 {
177 label = "SPL.backup1";
178 reg = <0x40000 0x40000>;
179 };
180
181 partition@2 {
182 label = "SPL.backup2";
183 reg = <0x80000 0x40000>;
184 };
185
186 partition@3 {
187 label = "SPL.backup3";
188 reg = <0xc0000 0x40000>;
189 };
190
191 partition@4 {
192 label = "u-boot";
193 reg = <0x100000 0x100000>;
194 };
195
196 partition@5 {
197 label = "u-boot.backup1";
198 reg = <0x200000 0x100000>;
199 };
200
201 partition@6 {
202 label = "u-boot-env";
203 reg = <0x300000 0x40000>;
204 };
205
206 partition@7 {
207 label = "u-boot-env.backup1";
208 reg = <0x340000 0x40000>;
209 };
210
211 partition@8 {
212 label = "UBI";
213 reg = <0x380000 0x1fc80000>;
214 };
215 };
216};
217
218&i2c0 {
219 pinctrl-names = "default";
220 pinctrl-0 = <&i2c0_pins>;
221 clock-frequency = <400000>;
222 status = "okay";
223
224 tps: tps@24 {
225 reg = <0x24>;
226 };
227};
228
229&lcdc {
230 blue-and-red-wiring = "crossed";
231 status = "okay";
232};
233
234&mmc1 {
235 bus-width = <0x4>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&mmc1_pins>;
238 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
239 vmmc-supply = <&vmmcsd_fixed>;
240 status = "okay";
241};
242
243&rtc {
244 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
245 clock-names = "ext-clk", "int-clk";
246 system-power-controller;
247};
248
249&spi0 {
250 ti,pindir-d0-out-d1-in;
251 pinctrl-names = "default";
252 pinctrl-0 = <&spi0_pins>;
253 status = "okay";
254};
255
256/include/ "tps65217.dtsi"
257
258&tps {
259 ti,pmic-shutdown-controller;
260 interrupt-parent = <&intc>;
261 interrupts = <7>; /* NMI */
262
263 backlight {
264 isel = <1>; /* 1 - ISET1, 2 ISET2 */
265 fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
266 default-brightness = <100>;
267 };
268
269 regulators {
270 dcdc1_reg: regulator@0 {
271 regulator-name = "vdds_dpr";
272 regulator-always-on;
273 };
274
275 dcdc2_reg: regulator@1 {
276 regulator-name = "vdd_mpu";
277 regulator-min-microvolt = <925000>;
278 regulator-max-microvolt = <1351500>;
279 regulator-boot-on;
280 regulator-always-on;
281 };
282
283 dcdc3_reg: regulator@2 {
284 regulator-name = "vdd_core";
285 regulator-min-microvolt = <925000>;
286 regulator-max-microvolt = <1150000>;
287 regulator-boot-on;
288 regulator-always-on;
289 };
290
291 ldo1_reg: regulator@3 {
292 regulator-name = "vio,vrtc,vdds";
293 regulator-always-on;
294 };
295
296 ldo2_reg: regulator@4 {
297 regulator-name = "vdd_3v3aux";
298 regulator-always-on;
299 };
300
301 ldo3_reg: regulator@5 {
302 regulator-name = "vdd_1v8";
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <1800000>;
305 regulator-always-on;
306 };
307
308 ldo4_reg: regulator@6 {
309 regulator-name = "vdd_3v3a";
310 regulator-always-on;
311 };
312 };
313};
314
315&tscadc {
316 status = "okay";
317
318 adc {
319 ti,adc-channels = <0 1 2 3 4 5 6>;
320 };
321};
322
323&uart0 {
324 pinctrl-names = "default";
325 pinctrl-0 = <&uart0_pins>;
326 status = "okay";
327};
328
329&usb {
330 status = "okay";
331};
332
333&usb_ctrl_mod {
334 status = "okay";
335};
336
337&usb0 {
338 dr_mode = "peripheral";
339 status = "okay";
340};
341
342&usb0_phy {
343 status = "okay";
344};
345
346&usb1 {
347 dr_mode = "host";
348 status = "okay";
349};
350
351&usb1_phy {
352 status = "okay";
353};
354
355&am33xx_pinmux {
356 pinctrl-names = "default";
357 pinctrl-0 = <&clkout2_pin &gpio_pins>;
358
359 clkout2_pin: pinmux_clkout2_pin {
360 pinctrl-single,pins = <
361 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
362 >;
363 };
364
365 dmtimer7_pins: pinmux_dmtimer7_pins {
366 pinctrl-single,pins = <
367 AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
368 >;
369 };
370
371 gpio_keys_pins: pinmux_gpio_keys_pins {
372 pinctrl-single,pins = <
373 AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
374 >;
375 };
376
377 gpio_pins: pinmux_gpio_pins {
378 pinctrl-single,pins = <
379 AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
380 AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
381 >;
382 };
383
384 i2c0_pins: pinmux_i2c0_pins {
385 pinctrl-single,pins = <
386 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
387 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
388 >;
389 };
390
391 lcd_disen_pins: pinmux_lcd_disen_pins {
392 pinctrl-single,pins = <
393 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
394 >;
395 };
396
397 lcd_pins_default: pinmux_lcd_pins_default {
398 pinctrl-single,pins = <
399 AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
400 AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
401 AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
402 AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
403 AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
404 AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
405 AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
406 AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
407 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
408 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
409 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
410 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
411 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
412 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
413 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
414 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
415 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
416 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
417 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
418 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
419 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
420 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
421 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
422 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
423 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
424 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
425 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
426 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
427 >;
428 };
429
430 lcd_pins_sleep: pinmux_lcd_pins_sleep {
431 pinctrl-single,pins = <
432 AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
433 AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
434 AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
435 AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
436 AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
437 AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
438 AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
439 AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
440 AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
441 AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
442 AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
443 AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
444 AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
445 AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
446 AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
447 AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
448 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
449 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
450 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
451 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
452 >;
453 };
454
455 leds_pins: pinmux_leds_pins {
456 pinctrl-single,pins = <
457 AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
458 AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7)
459 >;
460 };
461
462 mmc1_pins: pinmux_mmc1_pins {
463 pinctrl-single,pins = <
464 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
465 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
466 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
467 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
468 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
469 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
470 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
471 >;
472 };
473
474 spi0_pins: pinmux_spi0_pins {
475 pinctrl-single,pins = <
476 AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
477 AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
478 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
479 AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
480 >;
481 };
482
483 uart0_pins: pinmux_uart0_pins {
484 pinctrl-single,pins = <
485 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
486 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
487 >;
488 };
489
490 nandflash_pins: pinmux_nandflash_pins {
491 pinctrl-single,pins = <
492 AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
493 AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
494 AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
495 AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
496 AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
497 AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
498 AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
499 AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
500 AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
501 AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
502 AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
503 AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
504 AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
505 AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
506 AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
507 >;
508 };
509};