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Stefan Roeseae691e52009-01-21 17:24:49 +01001/*
2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Stefan Roeseae691e52009-01-21 17:24:49 +01005 */
6
7/*
8 * This file contains the configuration parameters for the VCT board
9 * family:
10 *
11 * vct_premium
12 * vct_premium_small
13 * vct_premium_onenand
14 * vct_premium_onenand_small
15 * vct_platinum
16 * vct_platinum_small
17 * vct_platinum_onenand
18 * vct_platinum_onenand_small
19 * vct_platinumavc
20 * vct_platinumavc_small
21 * vct_platinumavc_onenand
22 * vct_platinumavc_onenand_small
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
Daniel Schwierzeckd146e362014-11-15 23:30:01 +010028#define CONFIG_DISPLAY_BOARDINFO
29
Stefan Roeseae691e52009-01-21 17:24:49 +010030#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
31#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
Stefan Roeseae691e52009-01-21 17:24:49 +010032
33#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
34
Wolfgang Denk14d0a022010-10-07 21:51:12 +020035#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Stefan Roeseae691e52009-01-21 17:24:49 +010036#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Stefan Roeseae691e52009-01-21 17:24:49 +010037#define CONFIG_SYS_MALLOC_LEN (1 << 20)
38#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
39#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
40
41#if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
42#define CONFIG_VCT_NOR
43#else
44#define CONFIG_SYS_NO_FLASH
45#endif
46
47/*
48 * UART
49 */
Detlev Zundel294f10c2009-04-23 13:14:20 +020050#ifdef CONFIG_VCT_PLATINUMAVC
51#define UART_1_BASE 0xBDC30000
52#else
53#define UART_1_BASE 0xBF89C000
54#endif
55
56#define CONFIG_SYS_NS16550_SERIAL
57#define CONFIG_SYS_NS16550
58#define CONFIG_SYS_NS16550_REG_SIZE -4
59#define CONFIG_SYS_NS16550_COM1 UART_1_BASE
60#define CONFIG_CONS_INDEX 1
61#define CONFIG_SYS_NS16550_CLK 921600
Stefan Roeseae691e52009-01-21 17:24:49 +010062#define CONFIG_BAUDRATE 115200
Stefan Roeseae691e52009-01-21 17:24:49 +010063
64/*
65 * SDRAM
66 */
67#define CONFIG_SYS_SDRAM_BASE 0x80000000
68#define CONFIG_SYS_MBYTES_SDRAM 128
69#define CONFIG_SYS_MEMTEST_START 0x80200000
70#define CONFIG_SYS_MEMTEST_END 0x80400000
71#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
72
73#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
74/*
75 * SMSC91C11x Network Card
76 */
Ben Warren736fead2009-07-20 22:01:11 -070077#define CONFIG_SMC911X
78#define CONFIG_SMC911X_BASE 0x00000000
79#define CONFIG_SMC911X_32_BIT
Stefan Roeseae691e52009-01-21 17:24:49 +010080#define CONFIG_NET_RETRY_COUNT 20
81#endif
82
83/*
84 * Commands
85 */
Stefan Roeseae691e52009-01-21 17:24:49 +010086#define CONFIG_CMD_DHCP
Stefan Roeseae691e52009-01-21 17:24:49 +010087#define CONFIG_CMD_EEPROM
88#define CONFIG_CMD_I2C
89
90/*
91 * Only Premium/Platinum have ethernet support right now
92 */
Daniel Schwierzeck383015b2011-02-03 14:17:08 +010093#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
94 !defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roeseae691e52009-01-21 17:24:49 +010095#define CONFIG_CMD_PING
96#define CONFIG_CMD_SNTP
Stefan Roeseae691e52009-01-21 17:24:49 +010097#endif
98
99/*
100 * Only Premium/Platinum have USB-EHCI support right now
101 */
Daniel Schwierzeck383015b2011-02-03 14:17:08 +0100102#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
103 !defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roeseae691e52009-01-21 17:24:49 +0100104#define CONFIG_CMD_USB
105#define CONFIG_CMD_FAT
106#endif
107
108#if defined(CONFIG_CMD_USB)
109#define CONFIG_USB_STORAGE
110#define CONFIG_DOS_PARTITION
111#define CONFIG_ISO_PARTITION
112
113#define CONFIG_SUPPORT_VFAT
114
115/*
116 * USB/EHCI
117 */
118#define CONFIG_USB_EHCI /* Enable EHCI USB support */
119#define CONFIG_USB_EHCI_VCT /* on VCT platform */
Stefan Roeseae691e52009-01-21 17:24:49 +0100120#define CONFIG_EHCI_MMIO_BIG_ENDIAN
121#define CONFIG_EHCI_DESC_BIG_ENDIAN
122#define CONFIG_EHCI_IS_TDI
123#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
124#endif /* CONFIG_CMD_USB */
125
Stefan Roeseae691e52009-01-21 17:24:49 +0100126#if defined(CONFIG_VCT_NAND)
127#define CONFIG_CMD_NAND
128#endif
129
130#if defined(CONFIG_VCT_ONENAND)
131#define CONFIG_CMD_ONENAND
132#endif
133
134/*
135 * BOOTP options
136 */
137#define CONFIG_BOOTP_BOOTFILESIZE
138#define CONFIG_BOOTP_BOOTPATH
139#define CONFIG_BOOTP_GATEWAY
140#define CONFIG_BOOTP_HOSTNAME
141#define CONFIG_BOOTP_SUBNETMASK
142
143/*
144 * Miscellaneous configurable options
145 */
146#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefan Roeseae691e52009-01-21 17:24:49 +0100147#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
148#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
149 sizeof(CONFIG_SYS_PROMPT) + 16)
150#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
151#define CONFIG_TIMESTAMP /* Print image info with timestamp */
152#define CONFIG_CMDLINE_EDITING /* add command line history */
153#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
154
155/*
156 * FLASH and environment organization
157 */
158#if defined(CONFIG_VCT_NOR)
159#define CONFIG_ENV_IS_IN_FLASH
160#define CONFIG_FLASH_NOT_MEM_MAPPED
161
162/*
163 * We need special accessor functions for the CFI FLASH driver. This
164 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
165 */
166#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
167
168/*
169 * For the non-memory-mapped NOR FLASH, we need to define the
170 * NOR FLASH area. This can't be detected via the addr2info()
171 * function, since we check for flash access in the very early
172 * U-Boot code, before the NOR FLASH is detected.
173 */
174#define CONFIG_FLASH_BASE 0xb0000000
175#define CONFIG_FLASH_END 0xbfffffff
176
177/*
178 * CFI driver settings
179 */
180#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
181#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
182#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
183#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
184
185#define CONFIG_SYS_FLASH_BASE 0xb0000000
186#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
187#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
188#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
189
190#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
191#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
192
193#ifdef CONFIG_ENV_IS_IN_FLASH
194#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
195#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
196#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
197
198/* Address and size of Redundant Environment Sector */
199#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
200#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
201#endif /* CONFIG_ENV_IS_IN_FLASH */
202#endif /* CONFIG_VCT_NOR */
203
204#if defined(CONFIG_VCT_ONENAND)
205#define CONFIG_USE_ONENAND_BOARD_INIT
206#define CONFIG_ENV_IS_IN_ONENAND
207#define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
208#define CONFIG_SYS_FLASH_BASE 0x00000000
209#define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
210#define CONFIG_ENV_SIZE (128 << 10) /* erase size */
211#endif /* CONFIG_VCT_ONENAND */
212
213/*
214 * Cache Configuration
215 */
216#define CONFIG_SYS_DCACHE_SIZE 16384
217#define CONFIG_SYS_ICACHE_SIZE 16384
218#define CONFIG_SYS_CACHELINE_SIZE 32
219
220/*
221 * I2C/EEPROM
222 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100223#define CONFIG_SYS_I2C
224#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
225#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
226#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
Stefan Roeseae691e52009-01-21 17:24:49 +0100227
228/*
229 * Software (bit-bang) I2C driver configuration
230 */
231#define CONFIG_SYS_GPIO_I2C_SCL 11
232#define CONFIG_SYS_GPIO_I2C_SDA 10
233
234#ifndef __ASSEMBLY__
235int vct_gpio_dir(int pin, int dir);
236void vct_gpio_set(int pin, int val);
237int vct_gpio_get(int pin);
238#endif
239
240#define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
241#define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
242#define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
243#define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
244#define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
245#define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
246#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
247
248#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
249/* CAT24WC32 */
250#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
251#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
252 /* 32 byte page write mode using*/
253 /* last 5 bits of the address */
254#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
255
256#define CONFIG_BOOTCOMMAND "run test3"
257#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
258
259/*
Stefan Roeseae691e52009-01-21 17:24:49 +0100260 * UBI configuration
261 */
262#if defined(CONFIG_VCT_ONENAND)
263#define CONFIG_SYS_USE_UBI
264#define CONFIG_CMD_JFFS2
265#define CONFIG_CMD_UBI
266#define CONFIG_RBTREE
Stefan Roese942556a2009-05-12 14:32:58 +0200267#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Stefan Roeseae691e52009-01-21 17:24:49 +0100268#define CONFIG_MTD_PARTITIONS
Stefan Roese68d7d652009-03-19 13:30:36 +0100269#define CONFIG_CMD_MTDPARTS
Stefan Roeseae691e52009-01-21 17:24:49 +0100270
271#define MTDIDS_DEFAULT "onenand0=onenand"
272#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
273 "128k(env)," \
274 "20m(kernel)," \
275 "-(rootfs)"
276#endif
277
278/*
279 * We need a small, stripped down image to fit into the first 128k OneNAND
280 * erase block (gzipped). This image only needs basic commands for FLASH
281 * (NOR/OneNAND) usage and Linux kernel booting.
282 */
283#if defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roeseae691e52009-01-21 17:24:49 +0100284#undef CONFIG_CMD_ASKENV
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200285#undef CONFIG_CMD_BEDBUG
286#undef CONFIG_CMD_CACHE
Stefan Roeseae691e52009-01-21 17:24:49 +0100287#undef CONFIG_CMD_DHCP
288#undef CONFIG_CMD_EEPROM
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200289#undef CONFIG_CMD_EEPROM
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200290#undef CONFIG_CMD_FAT
Stefan Roeseae691e52009-01-21 17:24:49 +0100291#undef CONFIG_CMD_I2C
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200292#undef CONFIG_CMD_I2C
293#undef CONFIG_CMD_IRQ
Stefan Roeseae691e52009-01-21 17:24:49 +0100294#undef CONFIG_CMD_LOADY
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200295#undef CONFIG_CMD_MII
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200296#undef CONFIG_CMD_PING
297#undef CONFIG_CMD_REGINFO
298#undef CONFIG_CMD_SNTP
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200299#undef CONFIG_CMD_STRINGS
300#undef CONFIG_CMD_TERMINAL
Stefan Roeseae691e52009-01-21 17:24:49 +0100301#undef CONFIG_CMD_USB
Stefan Roeseae691e52009-01-21 17:24:49 +0100302
Ben Warren736fead2009-07-20 22:01:11 -0700303#undef CONFIG_SMC911X
Heiko Schocherea818db2013-01-29 08:53:15 +0100304#undef CONFIG_SYS_I2C_SOFT
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200305#undef CONFIG_SOURCE
Stefan Roeseae691e52009-01-21 17:24:49 +0100306#undef CONFIG_SYS_LONGHELP
307#undef CONFIG_TIMESTAMP
308#endif /* CONFIG_VCT_SMALL_IMAGE */
309
310#endif /* __CONFIG_H */