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wdenk5b1d7132002-11-03 00:07:02 +00001/*
2 * (C) Copyright 2000
3 * Dave Ellis, SIXNET, dge@sixnetio.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24Using the Motorola MPC8XXFADS development board
25===============================================
26
27CONFIGURATIONS
28--------------
29
30There are ready-to-use default configurations available for the
31FADS823, FADS850SAR and FADS860T. The FADS860T configuration also
32works for the 855T processor.
33
34LOADING U-Boot INTO FADS FLASH MEMORY
35--------------------------------------
36
37MPC8BUG can load U-Boot into the FLASH memory using LOADF.
38
39 loadf u-boot.srec 100000
40
41
42STARTING U-Boot FROM MPC8BUG
43-----------------------------
44
45To start U-Boot from MPC8BUG:
46
471. Reset the board:
48 reset :h
49
502. Change BR0 and OR0 back to their values at reset:
51 rms memc br0 00000001
52 rms memc or0 00000d34
53
543. Modify DER so MPC8BUG gets control only when it should:
55 rms der 2002000f
56
574. Start as if from reset:
58 go 100
59
60This is NOT exactly the same as starting U-Boot without
61MPC8BUG. MPC8BUG turns off the watchdog as part of the hard reset.
62After it does the reset it writes SYPCR (to disable the watchdog)
63and sets BR0 and OR0 to map the FLASH at 0x02800000 (and does lots
64of other initialization). That is why it is necessary to set BR0
65and OR0 to map the FLASH everywhere. U-Boot can't turn on the
66watchdog after that, since MPC8BUG has used the only chance to write
67to SYPCR.
68
69Here is a bizarre sequence of MPC8BUG and U-Boot commands that lets
70U-Boot write to SYPCR. It works with MPC8BUG 1.5 and an 855T
71processor (your mileage may vary). It is probably better (and a lot
72easier) just to accept having the watchdog disabled when the debug
73cable is connected.
74
75in MPC8BUG:
76 reset :h
77 rms memc br0 00000001
78 rms memc or0 00000d34
79 rms der 2000f
80 go 100
81
82Now U-Boot is running with the MPC8BUG value for SYPCR. Use the
83U-Boot 'reset' command to reset the board.
84 =>reset
85Next, in MPC8BUG:
86 rms der 2000f
87 go
88
89Now U-Boot is running with the U-Boot value for SYPCR.