blob: 3cf2f0984a585e44ba24b3049f74b9bc55e8cccf [file] [log] [blame]
goda.yusukec2042f52008-01-25 20:46:36 +09001/*
2 * Configuation settings for the Renesas Solutions Migo-R board
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
goda.yusukec2042f52008-01-25 20:46:36 +09007 */
8
9#ifndef __MIGO_R_H
10#define __MIGO_R_H
11
goda.yusukec2042f52008-01-25 20:46:36 +090012#define CONFIG_CPU_SH7722 1
13#define CONFIG_MIGO_R 1
14
Vladimir Zapolskiy18a40e82016-11-28 00:15:30 +020015#define CONFIG_DISPLAY_BOARDINFO
goda.yusukec2042f52008-01-25 20:46:36 +090016#undef CONFIG_SHOW_BOOT_PROGRESS
17
18/* SMC9111 */
Ben Warren7194ab82009-10-04 22:37:03 -070019#define CONFIG_SMC91111
goda.yusukec2042f52008-01-25 20:46:36 +090020#define CONFIG_SMC91111_BASE (0xB0000000)
21
22/* MEMORY */
23#define MIGO_R_SDRAM_BASE (0x8C000000)
24#define MIGO_R_FLASH_BASE_1 (0xA0000000)
25#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
26
Nobuhiro Iwamatsu8cd73792011-01-17 20:43:40 +090027#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020028#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020029#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020030#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
goda.yusukec2042f52008-01-25 20:46:36 +090031
32/* SCIF */
goda.yusukec2042f52008-01-25 20:46:36 +090033#define CONFIG_CONS_SCIF0 1
goda.yusukec2042f52008-01-25 20:46:36 +090034
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020035#define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE)
36#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
goda.yusukec2042f52008-01-25 20:46:36 +090037
38/* Enable alternate, more extensive, memory test */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#undef CONFIG_SYS_ALT_MEMTEST
goda.yusukec2042f52008-01-25 20:46:36 +090040/* Scratch address used by the alternate memory test */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#undef CONFIG_SYS_MEMTEST_SCRATCH
goda.yusukec2042f52008-01-25 20:46:36 +090042
43/* Enable temporary baudrate change while serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#undef CONFIG_SYS_LOADS_BAUD_CHANGE
goda.yusukec2042f52008-01-25 20:46:36 +090045
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE)
goda.yusukec2042f52008-01-25 20:46:36 +090047/* maybe more, but if so u-boot doesn't know about it... */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020048#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090049/* default load address for scripts ?!? */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090051
52/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
goda.yusukec2042f52008-01-25 20:46:36 +090054/* Monitor size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090056/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090059
60/* FLASH */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020062#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#undef CONFIG_SYS_FLASH_QUIET_TEST
goda.yusukec2042f52008-01-25 20:46:36 +090064/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065#define CONFIG_SYS_FLASH_EMPTY_INFO
goda.yusukec2042f52008-01-25 20:46:36 +090066/* Physical start address of Flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1)
goda.yusukec2042f52008-01-25 20:46:36 +090068/* Max number of sectors on each Flash chip */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#define CONFIG_SYS_MAX_FLASH_SECT 512
goda.yusukec2042f52008-01-25 20:46:36 +090070
71/* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020072#define CONFIG_SYS_MAX_FLASH_BANKS 1
73#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
goda.yusukec2042f52008-01-25 20:46:36 +090074
75/* Timeout for Flash erase operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090077/* Timeout for Flash write operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090079/* Timeout for Flash set sector lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090081/* Timeout for Flash clear lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090083
84/* Use hardware flash sectors protection instead of U-Boot software protection */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020085#undef CONFIG_SYS_FLASH_PROTECTION
86#undef CONFIG_SYS_DIRECT_FLASH_TFTP
goda.yusukec2042f52008-01-25 20:46:36 +090087
88/* ENV setting */
goda.yusukec2042f52008-01-25 20:46:36 +090089#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020090#define CONFIG_ENV_SECT_SIZE (128 * 1024)
91#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020092#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
93/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
94#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020095#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
goda.yusukec2042f52008-01-25 20:46:36 +090096
97/* Board Clock */
98#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +090099#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
100#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARDbe45c632009-06-04 12:06:48 +0200101#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
goda.yusukec2042f52008-01-25 20:46:36 +0900102
103#endif /* __MIGO_R_H */