blob: dfb6ebc64ce5d06b4ee81777ebfda74fe31bb45c [file] [log] [blame]
Michal Simek18a952c2018-03-27 10:36:39 +02001// SPDX-License-Identifier: GPL-2.0+
Michal Simek44303df2015-10-30 15:39:18 +01002/*
3 * dts file for Xilinx ZynqMP
4 *
5 * (C) Copyright 2014 - 2015, Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 *
Michal Simek18a952c2018-03-27 10:36:39 +02009 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
Michal Simek44303df2015-10-30 15:39:18 +010013 */
Michal Simek91d11532016-12-16 13:12:48 +010014
Michal Simek44303df2015-10-30 15:39:18 +010015/ {
16 compatible = "xlnx,zynqmp";
17 #address-cells = <2>;
Michal Simek85d11422016-04-07 15:07:38 +020018 #size-cells = <2>;
Michal Simek44303df2015-10-30 15:39:18 +010019
20 cpus {
21 #address-cells = <1>;
22 #size-cells = <0>;
23
Michal Simek585ca872017-02-06 10:09:53 +010024 cpu0: cpu@0 {
Michal Simek44303df2015-10-30 15:39:18 +010025 compatible = "arm,cortex-a53", "arm,armv8";
26 device_type = "cpu";
27 enable-method = "psci";
Shubhrajyoti Datta941f61f2017-02-13 15:58:55 +053028 operating-points-v2 = <&cpu_opp_table>;
Michal Simek44303df2015-10-30 15:39:18 +010029 reg = <0x0>;
Stefan Krsmanovic2e15b072016-10-21 12:44:56 +020030 cpu-idle-states = <&CPU_SLEEP_0>;
Michal Simek44303df2015-10-30 15:39:18 +010031 };
32
Michal Simek585ca872017-02-06 10:09:53 +010033 cpu1: cpu@1 {
Michal Simek44303df2015-10-30 15:39:18 +010034 compatible = "arm,cortex-a53", "arm,armv8";
35 device_type = "cpu";
36 enable-method = "psci";
37 reg = <0x1>;
Shubhrajyoti Datta941f61f2017-02-13 15:58:55 +053038 operating-points-v2 = <&cpu_opp_table>;
Stefan Krsmanovic2e15b072016-10-21 12:44:56 +020039 cpu-idle-states = <&CPU_SLEEP_0>;
Michal Simek44303df2015-10-30 15:39:18 +010040 };
41
Michal Simek585ca872017-02-06 10:09:53 +010042 cpu2: cpu@2 {
Michal Simek44303df2015-10-30 15:39:18 +010043 compatible = "arm,cortex-a53", "arm,armv8";
44 device_type = "cpu";
45 enable-method = "psci";
46 reg = <0x2>;
Shubhrajyoti Datta941f61f2017-02-13 15:58:55 +053047 operating-points-v2 = <&cpu_opp_table>;
Stefan Krsmanovic2e15b072016-10-21 12:44:56 +020048 cpu-idle-states = <&CPU_SLEEP_0>;
Michal Simek44303df2015-10-30 15:39:18 +010049 };
50
Michal Simek585ca872017-02-06 10:09:53 +010051 cpu3: cpu@3 {
Michal Simek44303df2015-10-30 15:39:18 +010052 compatible = "arm,cortex-a53", "arm,armv8";
53 device_type = "cpu";
54 enable-method = "psci";
55 reg = <0x3>;
Shubhrajyoti Datta941f61f2017-02-13 15:58:55 +053056 operating-points-v2 = <&cpu_opp_table>;
Stefan Krsmanovic2e15b072016-10-21 12:44:56 +020057 cpu-idle-states = <&CPU_SLEEP_0>;
58 };
59
60 idle-states {
Amit Kucheria9a06ed82018-08-23 14:23:29 +053061 entry-method = "psci";
Stefan Krsmanovic2e15b072016-10-21 12:44:56 +020062
63 CPU_SLEEP_0: cpu-sleep-0 {
64 compatible = "arm,idle-state";
65 arm,psci-suspend-param = <0x40000000>;
66 local-timer-stop;
67 entry-latency-us = <300>;
68 exit-latency-us = <600>;
Jolly Shah6a097b02017-06-14 15:03:52 -070069 min-residency-us = <10000>;
Stefan Krsmanovic2e15b072016-10-21 12:44:56 +020070 };
Michal Simek44303df2015-10-30 15:39:18 +010071 };
72 };
73
Shubhrajyoti Datta941f61f2017-02-13 15:58:55 +053074 cpu_opp_table: cpu_opp_table {
75 compatible = "operating-points-v2";
76 opp-shared;
77 opp00 {
78 opp-hz = /bits/ 64 <1199999988>;
79 opp-microvolt = <1000000>;
80 clock-latency-ns = <500000>;
81 };
82 opp01 {
83 opp-hz = /bits/ 64 <599999994>;
84 opp-microvolt = <1000000>;
85 clock-latency-ns = <500000>;
86 };
87 opp02 {
88 opp-hz = /bits/ 64 <399999996>;
89 opp-microvolt = <1000000>;
90 clock-latency-ns = <500000>;
91 };
92 opp03 {
93 opp-hz = /bits/ 64 <299999997>;
94 opp-microvolt = <1000000>;
95 clock-latency-ns = <500000>;
96 };
97 };
98
Michal Simek69d09dd2016-09-09 08:46:39 +020099 dcc: dcc {
100 compatible = "arm,dcc";
101 status = "disabled";
102 u-boot,dm-pre-reloc;
103 };
104
Michal Simek44303df2015-10-30 15:39:18 +0100105 pmu {
106 compatible = "arm,armv8-pmuv3";
Michal Simek14cd9ea2016-04-07 15:28:33 +0200107 interrupt-parent = <&gic>;
Michal Simek44303df2015-10-30 15:39:18 +0100108 interrupts = <0 143 4>,
109 <0 144 4>,
110 <0 145 4>,
111 <0 146 4>;
112 };
113
114 psci {
115 compatible = "arm,psci-0.2";
116 method = "smc";
117 };
118
Michal Simek8a705a22017-12-01 14:43:05 +0100119 pmufw: firmware {
Michal Simek44303df2015-10-30 15:39:18 +0100120 compatible = "xlnx,zynqmp-pm";
121 method = "smc";
Soren Brinkmann19ee4022016-11-21 16:12:05 -0800122 interrupt-parent = <&gic>;
123 interrupts = <0 35 4>;
Michal Simek44303df2015-10-30 15:39:18 +0100124 };
125
126 timer {
127 compatible = "arm,armv8-timer";
128 interrupt-parent = <&gic>;
Michal Simek6db82e02017-02-09 14:45:12 +0100129 interrupts = <1 13 0xf08>,
130 <1 14 0xf08>,
131 <1 11 0xf08>,
132 <1 10 0xf08>;
Michal Simek44303df2015-10-30 15:39:18 +0100133 };
134
Naga Sureshkumar Relliaaf232f2016-06-20 15:48:30 +0530135 edac {
136 compatible = "arm,cortex-a53-edac";
137 };
138
Nava kishore Manne7689dce2017-05-22 12:05:17 +0530139 fpga_full: fpga-full {
140 compatible = "fpga-region";
141 fpga-mgr = <&pcap>;
142 #address-cells = <2>;
143 #size-cells = <2>;
144 };
145
Nava kishore Manne0d87c4f2017-01-17 16:57:24 +0530146 nvmem_firmware {
147 compatible = "xlnx,zynqmp-nvmem-fw";
148 #address-cells = <1>;
149 #size-cells = <1>;
150
151 soc_revision: soc_revision@0 {
152 reg = <0x0 0x4>;
153 };
154 };
155
Nava kishore Manne7689dce2017-05-22 12:05:17 +0530156 pcap: pcap {
Nava kishore Manned64e43f2016-08-21 00:17:52 +0530157 compatible = "xlnx,zynqmp-pcap-fpga";
158 };
159
Anurag Kumar Vulisha98ad47b2017-02-06 21:40:34 +0530160 rst: reset-controller {
161 compatible = "xlnx,zynqmp-reset";
162 #reset-cells = <1>;
163 };
164
Michal Simekb0c55202017-07-05 14:51:42 +0200165 xlnx_dp_snd_card: dp_snd_card {
166 compatible = "xlnx,dp-snd-card";
167 status = "disabled";
168 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
169 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
170 };
171
172 xlnx_dp_snd_codec0: dp_snd_codec0 {
173 compatible = "xlnx,dp-snd-codec";
174 status = "disabled";
175 clock-names = "aud_clk";
176 };
177
178 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
179 compatible = "xlnx,dp-snd-pcm";
180 status = "disabled";
181 dmas = <&xlnx_dpdma 4>;
182 dma-names = "tx";
183 };
184
185 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
186 compatible = "xlnx,dp-snd-pcm";
187 status = "disabled";
188 dmas = <&xlnx_dpdma 5>;
189 dma-names = "tx";
190 };
191
192 xilinx_drm: xilinx_drm {
193 compatible = "xlnx,drm";
194 status = "disabled";
195 xlnx,encoder-slave = <&xlnx_dp>;
196 xlnx,connector-type = "DisplayPort";
197 xlnx,dp-sub = <&xlnx_dp_sub>;
198 planes {
199 xlnx,pixel-format = "rgb565";
200 plane0 {
201 dmas = <&xlnx_dpdma 3>;
202 dma-names = "dma0";
203 };
204 plane1 {
205 dmas = <&xlnx_dpdma 0>,
206 <&xlnx_dpdma 1>,
207 <&xlnx_dpdma 2>;
208 dma-names = "dma0", "dma1", "dma2";
209 };
210 };
211 };
212
Michal Simekc926e6f2016-11-11 13:21:04 +0100213 amba_apu: amba_apu@0 {
Michal Simek44303df2015-10-30 15:39:18 +0100214 compatible = "simple-bus";
215 #address-cells = <2>;
216 #size-cells = <1>;
Michal Simek85d11422016-04-07 15:07:38 +0200217 ranges = <0 0 0 0 0xffffffff>;
Michal Simek44303df2015-10-30 15:39:18 +0100218
219 gic: interrupt-controller@f9010000 {
220 compatible = "arm,gic-400", "arm,cortex-a15-gic";
221 #interrupt-cells = <3>;
222 reg = <0x0 0xf9010000 0x10000>,
Alexander Graf0a8c4f62016-05-12 13:44:01 +0200223 <0x0 0xf9020000 0x20000>,
Michal Simek44303df2015-10-30 15:39:18 +0100224 <0x0 0xf9040000 0x20000>,
Alexander Graf0a8c4f62016-05-12 13:44:01 +0200225 <0x0 0xf9060000 0x20000>;
Michal Simek44303df2015-10-30 15:39:18 +0100226 interrupt-controller;
227 interrupt-parent = <&gic>;
228 interrupts = <1 9 0xf04>;
229 };
230 };
231
Michal Simekb976fd62016-02-11 07:19:06 +0100232 amba: amba {
Michal Simek44303df2015-10-30 15:39:18 +0100233 compatible = "simple-bus";
Michal Simekc9811e12016-02-22 09:57:27 +0100234 u-boot,dm-pre-reloc;
Michal Simek44303df2015-10-30 15:39:18 +0100235 #address-cells = <2>;
Michal Simekb976fd62016-02-11 07:19:06 +0100236 #size-cells = <2>;
237 ranges;
Michal Simek44303df2015-10-30 15:39:18 +0100238
239 can0: can@ff060000 {
240 compatible = "xlnx,zynq-can-1.0";
241 status = "disabled";
242 clock-names = "can_clk", "pclk";
Michal Simekb976fd62016-02-11 07:19:06 +0100243 reg = <0x0 0xff060000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100244 interrupts = <0 23 4>;
245 interrupt-parent = <&gic>;
246 tx-fifo-depth = <0x40>;
247 rx-fifo-depth = <0x40>;
248 };
249
250 can1: can@ff070000 {
251 compatible = "xlnx,zynq-can-1.0";
252 status = "disabled";
253 clock-names = "can_clk", "pclk";
Michal Simekb976fd62016-02-11 07:19:06 +0100254 reg = <0x0 0xff070000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100255 interrupts = <0 24 4>;
256 interrupt-parent = <&gic>;
257 tx-fifo-depth = <0x40>;
258 rx-fifo-depth = <0x40>;
259 };
260
Michal Simekff50d212015-11-26 11:21:25 +0100261 cci: cci@fd6e0000 {
262 compatible = "arm,cci-400";
Michal Simekb976fd62016-02-11 07:19:06 +0100263 reg = <0x0 0xfd6e0000 0x0 0x9000>;
Michal Simekff50d212015-11-26 11:21:25 +0100264 ranges = <0x0 0x0 0xfd6e0000 0x10000>;
265 #address-cells = <1>;
266 #size-cells = <1>;
267
268 pmu@9000 {
269 compatible = "arm,cci-400-pmu,r1";
270 reg = <0x9000 0x5000>;
271 interrupt-parent = <&gic>;
272 interrupts = <0 123 4>,
273 <0 123 4>,
274 <0 123 4>,
275 <0 123 4>,
276 <0 123 4>;
277 };
278 };
279
Michal Simek44303df2015-10-30 15:39:18 +0100280 /* GDMA */
281 fpd_dma_chan1: dma@fd500000 {
282 status = "disabled";
283 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100284 reg = <0x0 0xfd500000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100285 interrupt-parent = <&gic>;
286 interrupts = <0 124 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530287 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100288 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200289 #stream-id-cells = <1>;
290 iommus = <&smmu 0x14e8>;
Michal Simek44303df2015-10-30 15:39:18 +0100291 };
292
293 fpd_dma_chan2: dma@fd510000 {
294 status = "disabled";
295 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100296 reg = <0x0 0xfd510000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100297 interrupt-parent = <&gic>;
298 interrupts = <0 125 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530299 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100300 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200301 #stream-id-cells = <1>;
302 iommus = <&smmu 0x14e9>;
Michal Simek44303df2015-10-30 15:39:18 +0100303 };
304
305 fpd_dma_chan3: dma@fd520000 {
306 status = "disabled";
307 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100308 reg = <0x0 0xfd520000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100309 interrupt-parent = <&gic>;
310 interrupts = <0 126 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530311 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100312 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200313 #stream-id-cells = <1>;
314 iommus = <&smmu 0x14ea>;
Michal Simek44303df2015-10-30 15:39:18 +0100315 };
316
317 fpd_dma_chan4: dma@fd530000 {
318 status = "disabled";
319 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100320 reg = <0x0 0xfd530000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100321 interrupt-parent = <&gic>;
322 interrupts = <0 127 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530323 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100324 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200325 #stream-id-cells = <1>;
326 iommus = <&smmu 0x14eb>;
Michal Simek44303df2015-10-30 15:39:18 +0100327 };
328
329 fpd_dma_chan5: dma@fd540000 {
330 status = "disabled";
331 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100332 reg = <0x0 0xfd540000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100333 interrupt-parent = <&gic>;
334 interrupts = <0 128 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530335 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100336 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200337 #stream-id-cells = <1>;
338 iommus = <&smmu 0x14ec>;
Michal Simek44303df2015-10-30 15:39:18 +0100339 };
340
341 fpd_dma_chan6: dma@fd550000 {
342 status = "disabled";
343 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100344 reg = <0x0 0xfd550000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100345 interrupt-parent = <&gic>;
346 interrupts = <0 129 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530347 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100348 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200349 #stream-id-cells = <1>;
350 iommus = <&smmu 0x14ed>;
Michal Simek44303df2015-10-30 15:39:18 +0100351 };
352
353 fpd_dma_chan7: dma@fd560000 {
354 status = "disabled";
355 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100356 reg = <0x0 0xfd560000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100357 interrupt-parent = <&gic>;
358 interrupts = <0 130 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530359 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100360 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200361 #stream-id-cells = <1>;
362 iommus = <&smmu 0x14ee>;
Michal Simek44303df2015-10-30 15:39:18 +0100363 };
364
365 fpd_dma_chan8: dma@fd570000 {
366 status = "disabled";
367 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100368 reg = <0x0 0xfd570000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100369 interrupt-parent = <&gic>;
370 interrupts = <0 131 4>;
VNSL Durgab34d11d2016-03-24 22:45:12 +0530371 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100372 xlnx,bus-width = <128>;
Michal Simekba6ad312016-04-06 10:43:23 +0200373 #stream-id-cells = <1>;
374 iommus = <&smmu 0x14ef>;
Michal Simek44303df2015-10-30 15:39:18 +0100375 };
376
377 gpu: gpu@fd4b0000 {
378 status = "disabled";
379 compatible = "arm,mali-400", "arm,mali-utgard";
Hyun Kwon834ec8e2017-08-21 18:54:29 -0700380 reg = <0x0 0xfd4b0000 0x0 0x10000>;
Michal Simek44303df2015-10-30 15:39:18 +0100381 interrupt-parent = <&gic>;
382 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
383 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
Madhurkiran Harikrishnan59206dd2017-02-17 04:14:45 -0800384 clock-names = "gpu", "gpu_pp0", "gpu_pp1";
Michal Simek44303df2015-10-30 15:39:18 +0100385 };
386
Kedareswara rao Appana6af57732016-09-09 12:36:01 +0530387 /* LPDDMA default allows only secured access. inorder to enable
388 * These dma channels, Users should ensure that these dma
389 * Channels are allowed for non secure access.
390 */
Michal Simek44303df2015-10-30 15:39:18 +0100391 lpd_dma_chan1: dma@ffa80000 {
392 status = "disabled";
393 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100394 reg = <0x0 0xffa80000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100395 interrupt-parent = <&gic>;
396 interrupts = <0 77 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100397 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100398 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200399 #stream-id-cells = <1>;
400 iommus = <&smmu 0x868>;
Michal Simek44303df2015-10-30 15:39:18 +0100401 };
402
403 lpd_dma_chan2: dma@ffa90000 {
404 status = "disabled";
405 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100406 reg = <0x0 0xffa90000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100407 interrupt-parent = <&gic>;
408 interrupts = <0 78 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100409 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100410 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200411 #stream-id-cells = <1>;
412 iommus = <&smmu 0x869>;
Michal Simek44303df2015-10-30 15:39:18 +0100413 };
414
415 lpd_dma_chan3: dma@ffaa0000 {
416 status = "disabled";
417 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100418 reg = <0x0 0xffaa0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100419 interrupt-parent = <&gic>;
420 interrupts = <0 79 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100421 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100422 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200423 #stream-id-cells = <1>;
424 iommus = <&smmu 0x86a>;
Michal Simek44303df2015-10-30 15:39:18 +0100425 };
426
427 lpd_dma_chan4: dma@ffab0000 {
428 status = "disabled";
429 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100430 reg = <0x0 0xffab0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100431 interrupt-parent = <&gic>;
432 interrupts = <0 80 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100433 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100434 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200435 #stream-id-cells = <1>;
436 iommus = <&smmu 0x86b>;
Michal Simek44303df2015-10-30 15:39:18 +0100437 };
438
439 lpd_dma_chan5: dma@ffac0000 {
440 status = "disabled";
441 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100442 reg = <0x0 0xffac0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100443 interrupt-parent = <&gic>;
444 interrupts = <0 81 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100445 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100446 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200447 #stream-id-cells = <1>;
448 iommus = <&smmu 0x86c>;
Michal Simek44303df2015-10-30 15:39:18 +0100449 };
450
451 lpd_dma_chan6: dma@ffad0000 {
452 status = "disabled";
453 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100454 reg = <0x0 0xffad0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100455 interrupt-parent = <&gic>;
456 interrupts = <0 82 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100457 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100458 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200459 #stream-id-cells = <1>;
460 iommus = <&smmu 0x86d>;
Michal Simek44303df2015-10-30 15:39:18 +0100461 };
462
463 lpd_dma_chan7: dma@ffae0000 {
464 status = "disabled";
465 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100466 reg = <0x0 0xffae0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100467 interrupt-parent = <&gic>;
468 interrupts = <0 83 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100469 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100470 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200471 #stream-id-cells = <1>;
472 iommus = <&smmu 0x86e>;
Michal Simek44303df2015-10-30 15:39:18 +0100473 };
474
475 lpd_dma_chan8: dma@ffaf0000 {
476 status = "disabled";
477 compatible = "xlnx,zynqmp-dma-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100478 reg = <0x0 0xffaf0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100479 interrupt-parent = <&gic>;
480 interrupts = <0 84 4>;
Michal Simek680e9972018-01-17 16:32:33 +0100481 clock-names = "clk_main", "clk_apb";
Michal Simek44303df2015-10-30 15:39:18 +0100482 xlnx,bus-width = <64>;
Michal Simekba6ad312016-04-06 10:43:23 +0200483 #stream-id-cells = <1>;
484 iommus = <&smmu 0x86f>;
Michal Simek44303df2015-10-30 15:39:18 +0100485 };
486
Naga Sureshkumar Relli90869002016-03-11 13:10:26 +0530487 mc: memory-controller@fd070000 {
488 compatible = "xlnx,zynqmp-ddrc-2.40a";
Michal Simekb976fd62016-02-11 07:19:06 +0100489 reg = <0x0 0xfd070000 0x0 0x30000>;
Naga Sureshkumar Relli90869002016-03-11 13:10:26 +0530490 interrupt-parent = <&gic>;
491 interrupts = <0 112 4>;
492 };
493
Michal Simek44303df2015-10-30 15:39:18 +0100494 nand0: nand@ff100000 {
495 compatible = "arasan,nfc-v3p10";
496 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100497 reg = <0x0 0xff100000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100498 clock-names = "clk_sys", "clk_flash";
499 interrupt-parent = <&gic>;
500 interrupts = <0 14 4>;
501 #address-cells = <2>;
502 #size-cells = <1>;
Michal Simekba6ad312016-04-06 10:43:23 +0200503 #stream-id-cells = <1>;
504 iommus = <&smmu 0x872>;
Michal Simek44303df2015-10-30 15:39:18 +0100505 };
506
507 gem0: ethernet@ff0b0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100508 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100509 status = "disabled";
510 interrupt-parent = <&gic>;
511 interrupts = <0 57 4>, <0 57 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100512 reg = <0x0 0xff0b0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100513 clock-names = "pclk", "hclk", "tx_clk";
514 #address-cells = <1>;
515 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100516 #stream-id-cells = <1>;
Michal Simekba6ad312016-04-06 10:43:23 +0200517 iommus = <&smmu 0x874>;
Michal Simek44303df2015-10-30 15:39:18 +0100518 };
519
520 gem1: ethernet@ff0c0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100521 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100522 status = "disabled";
523 interrupt-parent = <&gic>;
524 interrupts = <0 59 4>, <0 59 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100525 reg = <0x0 0xff0c0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100526 clock-names = "pclk", "hclk", "tx_clk";
527 #address-cells = <1>;
528 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100529 #stream-id-cells = <1>;
Michal Simekba6ad312016-04-06 10:43:23 +0200530 iommus = <&smmu 0x875>;
Michal Simek44303df2015-10-30 15:39:18 +0100531 };
532
533 gem2: ethernet@ff0d0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100534 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100535 status = "disabled";
536 interrupt-parent = <&gic>;
537 interrupts = <0 61 4>, <0 61 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100538 reg = <0x0 0xff0d0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100539 clock-names = "pclk", "hclk", "tx_clk";
540 #address-cells = <1>;
541 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100542 #stream-id-cells = <1>;
Michal Simekba6ad312016-04-06 10:43:23 +0200543 iommus = <&smmu 0x876>;
Michal Simek44303df2015-10-30 15:39:18 +0100544 };
545
546 gem3: ethernet@ff0e0000 {
Michal Simekda2ad782016-02-11 15:26:46 +0100547 compatible = "cdns,zynqmp-gem";
Michal Simek44303df2015-10-30 15:39:18 +0100548 status = "disabled";
549 interrupt-parent = <&gic>;
550 interrupts = <0 63 4>, <0 63 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100551 reg = <0x0 0xff0e0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100552 clock-names = "pclk", "hclk", "tx_clk";
553 #address-cells = <1>;
554 #size-cells = <0>;
Edgar E. Iglesias7f1d7d92015-11-26 14:12:20 +0100555 #stream-id-cells = <1>;
Michal Simekba6ad312016-04-06 10:43:23 +0200556 iommus = <&smmu 0x877>;
Michal Simek44303df2015-10-30 15:39:18 +0100557 };
558
559 gpio: gpio@ff0a0000 {
560 compatible = "xlnx,zynqmp-gpio-1.0";
561 status = "disabled";
562 #gpio-cells = <0x2>;
563 interrupt-parent = <&gic>;
564 interrupts = <0 16 4>;
Michal Simek9e826b62016-10-20 10:26:13 +0200565 interrupt-controller;
566 #interrupt-cells = <2>;
Michal Simekb976fd62016-02-11 07:19:06 +0100567 reg = <0x0 0xff0a0000 0x0 0x1000>;
Michal Simek0b33e0b12017-08-30 08:06:11 +0200568 gpio-controller;
Michal Simek44303df2015-10-30 15:39:18 +0100569 };
570
571 i2c0: i2c@ff020000 {
Moritz Fischerde4914b2016-12-22 09:36:11 -0800572 compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
Michal Simek44303df2015-10-30 15:39:18 +0100573 status = "disabled";
574 interrupt-parent = <&gic>;
575 interrupts = <0 17 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100576 reg = <0x0 0xff020000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100577 #address-cells = <1>;
578 #size-cells = <0>;
579 };
580
581 i2c1: i2c@ff030000 {
Moritz Fischerde4914b2016-12-22 09:36:11 -0800582 compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
Michal Simek44303df2015-10-30 15:39:18 +0100583 status = "disabled";
584 interrupt-parent = <&gic>;
585 interrupts = <0 18 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100586 reg = <0x0 0xff030000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100587 #address-cells = <1>;
588 #size-cells = <0>;
589 };
590
Naga Sureshkumar Relli55344802016-05-18 12:23:13 +0530591 ocm: memory-controller@ff960000 {
592 compatible = "xlnx,zynqmp-ocmc-1.0";
Michal Simekb976fd62016-02-11 07:19:06 +0100593 reg = <0x0 0xff960000 0x0 0x1000>;
Naga Sureshkumar Relli55344802016-05-18 12:23:13 +0530594 interrupt-parent = <&gic>;
595 interrupts = <0 10 4>;
596 };
597
Michal Simek44303df2015-10-30 15:39:18 +0100598 pcie: pcie@fd0e0000 {
599 compatible = "xlnx,nwl-pcie-2.11";
600 status = "disabled";
601 #address-cells = <3>;
602 #size-cells = <2>;
603 #interrupt-cells = <1>;
Bharat Kumar Gogada7d6ca732016-07-19 20:49:29 +0530604 msi-controller;
Michal Simek44303df2015-10-30 15:39:18 +0100605 device_type = "pci";
606 interrupt-parent = <&gic>;
Michal Simek91a8b0e2016-01-20 12:59:23 +0100607 interrupts = <0 118 4>,
Bharat Kumar Gogada7d6ca732016-07-19 20:49:29 +0530608 <0 117 4>,
Michal Simek91a8b0e2016-01-20 12:59:23 +0100609 <0 116 4>,
610 <0 115 4>, /* MSI_1 [63...32] */
611 <0 114 4>; /* MSI_0 [31...0] */
Michal Simek680e9972018-01-17 16:32:33 +0100612 interrupt-names = "misc", "dummy", "intx",
613 "msi1", "msi0";
Bharat Kumar Gogada7d6ca732016-07-19 20:49:29 +0530614 msi-parent = <&pcie>;
Michal Simekb976fd62016-02-11 07:19:06 +0100615 reg = <0x0 0xfd0e0000 0x0 0x1000>,
616 <0x0 0xfd480000 0x0 0x1000>,
Bharat Kumar Gogada688d1be2016-08-02 20:34:13 +0530617 <0x80 0x00000000 0x0 0x1000000>;
Michal Simek44303df2015-10-30 15:39:18 +0100618 reg-names = "breg", "pcireg", "cfg";
Bharat Kumar Gogada688d1be2016-08-02 20:34:13 +0530619 ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
620 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
Rob Herringec2b2d42017-03-21 21:03:13 -0500621 bus-range = <0x00 0xff>;
Bharat Kumar Gogada33aec512016-02-15 21:18:58 +0530622 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
623 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
624 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
625 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
626 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
627 pcie_intc: legacy-interrupt-controller {
628 interrupt-controller;
629 #address-cells = <0>;
630 #interrupt-cells = <1>;
631 };
Michal Simek44303df2015-10-30 15:39:18 +0100632 };
633
634 qspi: spi@ff0f0000 {
Michal Simek24124ab2017-01-16 12:07:33 +0100635 u-boot,dm-pre-reloc;
Michal Simek44303df2015-10-30 15:39:18 +0100636 compatible = "xlnx,zynqmp-qspi-1.0";
637 status = "disabled";
638 clock-names = "ref_clk", "pclk";
639 interrupts = <0 15 4>;
640 interrupt-parent = <&gic>;
641 num-cs = <1>;
Michal Simekb976fd62016-02-11 07:19:06 +0100642 reg = <0x0 0xff0f0000 0x0 0x1000>,
643 <0x0 0xc0000000 0x0 0x8000000>;
Michal Simek44303df2015-10-30 15:39:18 +0100644 #address-cells = <1>;
645 #size-cells = <0>;
Michal Simekba6ad312016-04-06 10:43:23 +0200646 #stream-id-cells = <1>;
647 iommus = <&smmu 0x873>;
Michal Simek44303df2015-10-30 15:39:18 +0100648 };
649
650 rtc: rtc@ffa60000 {
651 compatible = "xlnx,zynqmp-rtc";
652 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100653 reg = <0x0 0xffa60000 0x0 0x100>;
Michal Simek44303df2015-10-30 15:39:18 +0100654 interrupt-parent = <&gic>;
655 interrupts = <0 26 4>, <0 27 4>;
656 interrupt-names = "alarm", "sec";
Nava kishore Manne4d9d6982017-01-27 18:20:14 +0530657 calibration = <0x8000>;
Michal Simek44303df2015-10-30 15:39:18 +0100658 };
659
Anurag Kumar Vulishadb6c62e2016-05-17 16:49:01 +0530660 serdes: zynqmp_phy@fd400000 {
661 compatible = "xlnx,zynqmp-psgtr";
662 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100663 reg = <0x0 0xfd400000 0x0 0x40000>,
664 <0x0 0xfd3d0000 0x0 0x1000>,
Michal Simekb976fd62016-02-11 07:19:06 +0100665 <0x0 0xff5e0000 0x0 0x1000>;
Anurag Kumar Vulisha0aada392017-02-08 17:09:10 +0530666 reg-names = "serdes", "siou", "lpd";
Michal Simek3940bca2017-01-17 14:36:54 +0100667 nvmem-cells = <&soc_revision>;
668 nvmem-cell-names = "soc_revision";
Anurag Kumar Vulisha98ad47b2017-02-06 21:40:34 +0530669 resets = <&rst 16>, <&rst 59>, <&rst 60>,
670 <&rst 61>, <&rst 62>, <&rst 63>,
671 <&rst 64>, <&rst 3>, <&rst 29>,
672 <&rst 30>, <&rst 31>, <&rst 32>;
673 reset-names = "sata_rst", "usb0_crst", "usb1_crst",
674 "usb0_hibrst", "usb1_hibrst", "usb0_apbrst",
675 "usb1_apbrst", "dp_rst", "gem0_rst",
676 "gem1_rst", "gem2_rst", "gem3_rst";
Anurag Kumar Vulishadb6c62e2016-05-17 16:49:01 +0530677 lane0: lane0 {
678 #phy-cells = <4>;
679 };
680 lane1: lane1 {
681 #phy-cells = <4>;
682 };
683 lane2: lane2 {
684 #phy-cells = <4>;
685 };
686 lane3: lane3 {
687 #phy-cells = <4>;
688 };
689 };
690
Michal Simek44303df2015-10-30 15:39:18 +0100691 sata: ahci@fd0c0000 {
692 compatible = "ceva,ahci-1v84";
693 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100694 reg = <0x0 0xfd0c0000 0x0 0x2000>;
Michal Simek44303df2015-10-30 15:39:18 +0100695 interrupt-parent = <&gic>;
696 interrupts = <0 133 4>;
Anurag Kumar Vulisha110d06b2017-07-04 20:03:42 +0530697 #stream-id-cells = <4>;
698 iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
699 <&smmu 0x4c2>, <&smmu 0x4c3>;
700 /* dma-coherent; */
Michal Simek44303df2015-10-30 15:39:18 +0100701 };
702
Siva Durga Prasad Paladugue7c9de62019-01-03 15:44:24 +0530703 sdhci0: mmc@ff160000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100704 u-boot,dm-pre-reloc;
Sai Krishna Potthuri0488a5e2016-08-16 14:41:35 +0530705 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
Michal Simek44303df2015-10-30 15:39:18 +0100706 status = "disabled";
707 interrupt-parent = <&gic>;
708 interrupts = <0 48 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100709 reg = <0x0 0xff160000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100710 clock-names = "clk_xin", "clk_ahb";
Sai Krishna Potthuri0488a5e2016-08-16 14:41:35 +0530711 xlnx,device_id = <0>;
Michal Simekba6ad312016-04-06 10:43:23 +0200712 #stream-id-cells = <1>;
713 iommus = <&smmu 0x870>;
Manish Narani5e3c90d2017-07-19 21:16:33 +0530714 nvmem-cells = <&soc_revision>;
715 nvmem-cell-names = "soc_revision";
Michal Simek44303df2015-10-30 15:39:18 +0100716 };
717
Siva Durga Prasad Paladugue7c9de62019-01-03 15:44:24 +0530718 sdhci1: mmc@ff170000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100719 u-boot,dm-pre-reloc;
Sai Krishna Potthuri0488a5e2016-08-16 14:41:35 +0530720 compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
Michal Simek44303df2015-10-30 15:39:18 +0100721 status = "disabled";
722 interrupt-parent = <&gic>;
723 interrupts = <0 49 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100724 reg = <0x0 0xff170000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100725 clock-names = "clk_xin", "clk_ahb";
Sai Krishna Potthuri0488a5e2016-08-16 14:41:35 +0530726 xlnx,device_id = <1>;
Michal Simekba6ad312016-04-06 10:43:23 +0200727 #stream-id-cells = <1>;
728 iommus = <&smmu 0x871>;
Manish Narani5e3c90d2017-07-19 21:16:33 +0530729 nvmem-cells = <&soc_revision>;
730 nvmem-cell-names = "soc_revision";
Michal Simek44303df2015-10-30 15:39:18 +0100731 };
732
Michal Simek9c77cb72017-11-02 11:51:59 +0100733 pinctrl0: pinctrl@ff180000 {
734 compatible = "xlnx,pinctrl-zynqmp";
735 status = "disabled";
736 reg = <0x0 0xff180000 0x0 0x1000>;
737 };
738
Michal Simek44303df2015-10-30 15:39:18 +0100739 smmu: smmu@fd800000 {
740 compatible = "arm,mmu-500";
Michal Simekb976fd62016-02-11 07:19:06 +0100741 reg = <0x0 0xfd800000 0x0 0x20000>;
Michal Simekba6ad312016-04-06 10:43:23 +0200742 #iommu-cells = <1>;
Naga Sureshkumar Relli10f2a292017-03-09 20:00:13 +0530743 status = "disabled";
Michal Simek44303df2015-10-30 15:39:18 +0100744 #global-interrupts = <1>;
745 interrupt-parent = <&gic>;
Edgar E. Iglesias88a85aa2015-11-26 14:12:19 +0100746 interrupts = <0 155 4>,
747 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
748 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
749 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
750 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
Michal Simek44303df2015-10-30 15:39:18 +0100751 };
752
753 spi0: spi@ff040000 {
754 compatible = "cdns,spi-r1p6";
755 status = "disabled";
756 interrupt-parent = <&gic>;
757 interrupts = <0 19 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100758 reg = <0x0 0xff040000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100759 clock-names = "ref_clk", "pclk";
760 #address-cells = <1>;
761 #size-cells = <0>;
762 };
763
764 spi1: spi@ff050000 {
765 compatible = "cdns,spi-r1p6";
766 status = "disabled";
767 interrupt-parent = <&gic>;
768 interrupts = <0 20 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100769 reg = <0x0 0xff050000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100770 clock-names = "ref_clk", "pclk";
771 #address-cells = <1>;
772 #size-cells = <0>;
773 };
774
775 ttc0: timer@ff110000 {
776 compatible = "cdns,ttc";
777 status = "disabled";
778 interrupt-parent = <&gic>;
779 interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100780 reg = <0x0 0xff110000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100781 timer-width = <32>;
782 };
783
784 ttc1: timer@ff120000 {
785 compatible = "cdns,ttc";
786 status = "disabled";
787 interrupt-parent = <&gic>;
788 interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100789 reg = <0x0 0xff120000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100790 timer-width = <32>;
791 };
792
793 ttc2: timer@ff130000 {
794 compatible = "cdns,ttc";
795 status = "disabled";
796 interrupt-parent = <&gic>;
797 interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100798 reg = <0x0 0xff130000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100799 timer-width = <32>;
800 };
801
802 ttc3: timer@ff140000 {
803 compatible = "cdns,ttc";
804 status = "disabled";
805 interrupt-parent = <&gic>;
806 interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100807 reg = <0x0 0xff140000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100808 timer-width = <32>;
809 };
810
811 uart0: serial@ff000000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100812 u-boot,dm-pre-reloc;
Michal Simekca2f5872015-11-27 13:22:58 +0100813 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
Michal Simek44303df2015-10-30 15:39:18 +0100814 status = "disabled";
815 interrupt-parent = <&gic>;
816 interrupts = <0 21 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100817 reg = <0x0 0xff000000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100818 clock-names = "uart_clk", "pclk";
819 };
820
821 uart1: serial@ff010000 {
Michal Simekc9811e12016-02-22 09:57:27 +0100822 u-boot,dm-pre-reloc;
Michal Simekca2f5872015-11-27 13:22:58 +0100823 compatible = "cdns,uart-r1p12", "xlnx,xuartps";
Michal Simek44303df2015-10-30 15:39:18 +0100824 status = "disabled";
825 interrupt-parent = <&gic>;
826 interrupts = <0 22 4>;
Michal Simekb976fd62016-02-11 07:19:06 +0100827 reg = <0x0 0xff010000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100828 clock-names = "uart_clk", "pclk";
829 };
830
Manish Naranif7346ef2017-03-27 17:47:00 +0530831 usb0: usb0@ff9d0000 {
Michal Simeka84de482016-04-07 15:06:07 +0200832 #address-cells = <2>;
Michal Simekb976fd62016-02-11 07:19:06 +0100833 #size-cells = <2>;
Michal Simek44303df2015-10-30 15:39:18 +0100834 status = "disabled";
Michal Simeka84de482016-04-07 15:06:07 +0200835 compatible = "xlnx,zynqmp-dwc3";
Manish Naranif7346ef2017-03-27 17:47:00 +0530836 reg = <0x0 0xff9d0000 0x0 0x100>;
Michal Simeka84de482016-04-07 15:06:07 +0200837 clock-names = "bus_clk", "ref_clk";
Michal Simeka84de482016-04-07 15:06:07 +0200838 ranges;
Anurag Kumar Vulisha8e5a4e62017-03-02 14:40:51 +0530839 nvmem-cells = <&soc_revision>;
840 nvmem-cell-names = "soc_revision";
Michal Simeka84de482016-04-07 15:06:07 +0200841
842 dwc3_0: dwc3@fe200000 {
843 compatible = "snps,dwc3";
844 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100845 reg = <0x0 0xfe200000 0x0 0x40000>;
Michal Simeka84de482016-04-07 15:06:07 +0200846 interrupt-parent = <&gic>;
Manish Narani2ef98662017-01-18 17:34:48 +0530847 interrupts = <0 65 4>, <0 69 4>;
Anurag Kumar Vulisha8861dcf2017-06-20 16:25:16 +0530848 #stream-id-cells = <1>;
849 iommus = <&smmu 0x860>;
Anurag Kumar Vulisha397a08a2017-03-10 19:18:17 +0530850 snps,quirk-frame-length-adjustment = <0x20>;
Michal Simeka84de482016-04-07 15:06:07 +0200851 snps,refclk_fladj;
Manish Naranif7346ef2017-03-27 17:47:00 +0530852 /* dma-coherent; */
Michal Simeka84de482016-04-07 15:06:07 +0200853 };
Michal Simek44303df2015-10-30 15:39:18 +0100854 };
855
Manish Naranif7346ef2017-03-27 17:47:00 +0530856 usb1: usb1@ff9e0000 {
Michal Simeka84de482016-04-07 15:06:07 +0200857 #address-cells = <2>;
Michal Simekb976fd62016-02-11 07:19:06 +0100858 #size-cells = <2>;
Michal Simek44303df2015-10-30 15:39:18 +0100859 status = "disabled";
Michal Simeka84de482016-04-07 15:06:07 +0200860 compatible = "xlnx,zynqmp-dwc3";
Manish Naranif7346ef2017-03-27 17:47:00 +0530861 reg = <0x0 0xff9e0000 0x0 0x100>;
Michal Simeka84de482016-04-07 15:06:07 +0200862 clock-names = "bus_clk", "ref_clk";
Michal Simeka84de482016-04-07 15:06:07 +0200863 ranges;
Anurag Kumar Vulisha8e5a4e62017-03-02 14:40:51 +0530864 nvmem-cells = <&soc_revision>;
865 nvmem-cell-names = "soc_revision";
Michal Simeka84de482016-04-07 15:06:07 +0200866
867 dwc3_1: dwc3@fe300000 {
868 compatible = "snps,dwc3";
869 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100870 reg = <0x0 0xfe300000 0x0 0x40000>;
Michal Simeka84de482016-04-07 15:06:07 +0200871 interrupt-parent = <&gic>;
Manish Narani2ef98662017-01-18 17:34:48 +0530872 interrupts = <0 70 4>, <0 74 4>;
Anurag Kumar Vulisha8861dcf2017-06-20 16:25:16 +0530873 #stream-id-cells = <1>;
874 iommus = <&smmu 0x861>;
Anurag Kumar Vulisha397a08a2017-03-10 19:18:17 +0530875 snps,quirk-frame-length-adjustment = <0x20>;
Michal Simeka84de482016-04-07 15:06:07 +0200876 snps,refclk_fladj;
Manish Naranif7346ef2017-03-27 17:47:00 +0530877 /* dma-coherent; */
Michal Simeka84de482016-04-07 15:06:07 +0200878 };
Michal Simek44303df2015-10-30 15:39:18 +0100879 };
880
881 watchdog0: watchdog@fd4d0000 {
882 compatible = "cdns,wdt-r1p2";
883 status = "disabled";
884 interrupt-parent = <&gic>;
Punnaiah Choudary Kallurid3fd4332015-11-04 12:34:17 +0530885 interrupts = <0 113 1>;
Michal Simekb976fd62016-02-11 07:19:06 +0100886 reg = <0x0 0xfd4d0000 0x0 0x1000>;
Mounika Grace Akula3c8ee332018-10-09 20:52:50 +0530887 timeout-sec = <60>;
888 reset-on-timeout;
Michal Simek44303df2015-10-30 15:39:18 +0100889 };
890
Michal Simek795ebc02017-11-02 12:04:43 +0100891 xilinx_ams: ams@ffa50000 {
892 compatible = "xlnx,zynqmp-ams";
893 status = "disabled";
894 interrupt-parent = <&gic>;
895 interrupts = <0 56 4>;
896 interrupt-names = "ams-irq";
897 reg = <0x0 0xffa50000 0x0 0x800>;
898 reg-names = "ams-base";
899 #address-cells = <2>;
900 #size-cells = <2>;
901 #io-channel-cells = <1>;
902 ranges;
903
904 ams_ps: ams_ps@ffa50800 {
905 compatible = "xlnx,zynqmp-ams-ps";
906 status = "disabled";
907 reg = <0x0 0xffa50800 0x0 0x400>;
908 };
909
910 ams_pl: ams_pl@ffa50c00 {
911 compatible = "xlnx,zynqmp-ams-pl";
912 status = "disabled";
913 reg = <0x0 0xffa50c00 0x0 0x400>;
914 };
915 };
916
Hyun Kwon695d75a2015-11-23 17:12:54 -0800917 xlnx_dp: dp@fd4a0000 {
Michal Simek44303df2015-10-30 15:39:18 +0100918 compatible = "xlnx,v-dp";
919 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100920 reg = <0x0 0xfd4a0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100921 interrupts = <0 119 4>;
922 interrupt-parent = <&gic>;
923 clock-names = "aclk", "aud_clk";
924 xlnx,dp-version = "v1.2";
925 xlnx,max-lanes = <2>;
926 xlnx,max-link-rate = <540000>;
927 xlnx,max-bpc = <16>;
928 xlnx,enable-ycrcb;
929 xlnx,colormetry = "rgb";
930 xlnx,bpc = <8>;
931 xlnx,audio-chan = <2>;
932 xlnx,dp-sub = <&xlnx_dp_sub>;
Hyun Kwon939cfea2015-11-23 17:12:55 -0800933 xlnx,max-pclock-frequency = <300000>;
Michal Simek44303df2015-10-30 15:39:18 +0100934 };
935
Hyun Kwon695d75a2015-11-23 17:12:54 -0800936 xlnx_dp_sub: dp_sub@fd4aa000 {
Michal Simek44303df2015-10-30 15:39:18 +0100937 compatible = "xlnx,dp-sub";
938 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100939 reg = <0x0 0xfd4aa000 0x0 0x1000>,
940 <0x0 0xfd4ab000 0x0 0x1000>,
941 <0x0 0xfd4ac000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100942 reg-names = "blend", "av_buf", "aud";
943 xlnx,output-fmt = "rgb";
Hyun Kwon939cfea2015-11-23 17:12:55 -0800944 xlnx,vid-fmt = "yuyv";
945 xlnx,gfx-fmt = "rgb565";
Michal Simek44303df2015-10-30 15:39:18 +0100946 };
947
948 xlnx_dpdma: dma@fd4c0000 {
949 compatible = "xlnx,dpdma";
950 status = "disabled";
Michal Simekb976fd62016-02-11 07:19:06 +0100951 reg = <0x0 0xfd4c0000 0x0 0x1000>;
Michal Simek44303df2015-10-30 15:39:18 +0100952 interrupts = <0 122 4>;
953 interrupt-parent = <&gic>;
954 clock-names = "axi_clk";
955 dma-channels = <6>;
956 #dma-cells = <1>;
Michal Simekc926e6f2016-11-11 13:21:04 +0100957 dma-video0channel {
Michal Simek44303df2015-10-30 15:39:18 +0100958 compatible = "xlnx,video0";
959 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100960 dma-video1channel {
Michal Simek44303df2015-10-30 15:39:18 +0100961 compatible = "xlnx,video1";
962 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100963 dma-video2channel {
Michal Simek44303df2015-10-30 15:39:18 +0100964 compatible = "xlnx,video2";
965 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100966 dma-graphicschannel {
Michal Simek44303df2015-10-30 15:39:18 +0100967 compatible = "xlnx,graphics";
968 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100969 dma-audio0channel {
Michal Simek44303df2015-10-30 15:39:18 +0100970 compatible = "xlnx,audio0";
971 };
Michal Simekc926e6f2016-11-11 13:21:04 +0100972 dma-audio1channel {
Michal Simek44303df2015-10-30 15:39:18 +0100973 compatible = "xlnx,audio1";
974 };
975 };
976 };
977};