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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 502b92c1ed619bced53d5c5f6f91b2a8ecad31ab / . / board / renesas / koelsch / qos.c
blob: d82bf8bee325e12e5fc66f7b4c4852b385063a9f [file] [log] [blame]
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1/*
2 * board/renesas/koelsch/qos.c
3 *
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]4 * Copyright (C) 2013,2014 Renesas Electronics Corporation
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]5 *
6 * SPDX-License-Identifier: GPL-2.0
7 *
8 */
9
10#include <common.h>
11#include <asm/processor.h>
12#include <asm/mach-types.h>
13#include <asm/io.h>
14#include <asm/arch/rmobile.h>
15
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]16/* QoS version 0.23 for ES1 and version 0.303 for ES2 */
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]17
18enum {
19 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
20 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
21 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
22 DBSC3_15,
23 DBSC3_NR,
24};
25
26static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
27 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
28 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
29 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
30 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
31 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
32 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
33 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
34 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
35 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
36 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
37 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
38 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
39 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
40 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
41 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
42 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
43};
44
45static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
46 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
47 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
48 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
49 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
50 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
51 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
52 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
53 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
54 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
55 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
56 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
57 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
58 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
59 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
60 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
61 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
62};
63
64static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = {
65 [DBSC3_00] = DBSC3_1_QOS_R0_BASE,
66 [DBSC3_01] = DBSC3_1_QOS_R1_BASE,
67 [DBSC3_02] = DBSC3_1_QOS_R2_BASE,
68 [DBSC3_03] = DBSC3_1_QOS_R3_BASE,
69 [DBSC3_04] = DBSC3_1_QOS_R4_BASE,
70 [DBSC3_05] = DBSC3_1_QOS_R5_BASE,
71 [DBSC3_06] = DBSC3_1_QOS_R6_BASE,
72 [DBSC3_07] = DBSC3_1_QOS_R7_BASE,
73 [DBSC3_08] = DBSC3_1_QOS_R8_BASE,
74 [DBSC3_09] = DBSC3_1_QOS_R9_BASE,
75 [DBSC3_10] = DBSC3_1_QOS_R10_BASE,
76 [DBSC3_11] = DBSC3_1_QOS_R11_BASE,
77 [DBSC3_12] = DBSC3_1_QOS_R12_BASE,
78 [DBSC3_13] = DBSC3_1_QOS_R13_BASE,
79 [DBSC3_14] = DBSC3_1_QOS_R14_BASE,
80 [DBSC3_15] = DBSC3_1_QOS_R15_BASE,
81};
82
83static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = {
84 [DBSC3_00] = DBSC3_1_QOS_W0_BASE,
85 [DBSC3_01] = DBSC3_1_QOS_W1_BASE,
86 [DBSC3_02] = DBSC3_1_QOS_W2_BASE,
87 [DBSC3_03] = DBSC3_1_QOS_W3_BASE,
88 [DBSC3_04] = DBSC3_1_QOS_W4_BASE,
89 [DBSC3_05] = DBSC3_1_QOS_W5_BASE,
90 [DBSC3_06] = DBSC3_1_QOS_W6_BASE,
91 [DBSC3_07] = DBSC3_1_QOS_W7_BASE,
92 [DBSC3_08] = DBSC3_1_QOS_W8_BASE,
93 [DBSC3_09] = DBSC3_1_QOS_W9_BASE,
94 [DBSC3_10] = DBSC3_1_QOS_W10_BASE,
95 [DBSC3_11] = DBSC3_1_QOS_W11_BASE,
96 [DBSC3_12] = DBSC3_1_QOS_W12_BASE,
97 [DBSC3_13] = DBSC3_1_QOS_W13_BASE,
98 [DBSC3_14] = DBSC3_1_QOS_W14_BASE,
99 [DBSC3_15] = DBSC3_1_QOS_W15_BASE,
100};
101
102void qos_init(void)
103{
104 int i;
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]105 struct rcar_s3c *s3c;
106 struct rcar_s3c_qos *s3c_qos;
107 struct rcar_dbsc3_qos *qos_addr;
108 struct rcar_mxi *mxi;
109 struct rcar_mxi_qos *mxi_qos;
110 struct rcar_axi_qos *axi_qos;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]111
112 /* DBSC DBADJ2 */
113 writel(0x20042004, DBSC3_0_DBADJ2);
114
115 /* S3C -QoS */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]116 s3c = (struct rcar_s3c *)S3C_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]117 if (IS_R8A7791_ES2()) {
118 writel(0x00FF1B0D, &s3c->s3cadsplcr);
119 writel(0x1F0D0B0A, &s3c->s3crorr);
120 writel(0x1F0D0B09, &s3c->s3cworr);
121 writel(0x00200808, &s3c->s3carcr11);
122 } else {
123 writel(0x00FF1B1D, &s3c->s3cadsplcr);
124 writel(0x1F0D0C0C, &s3c->s3crorr);
125 writel(0x1F0D0C0A, &s3c->s3cworr);
126 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]127 /* QoS Control Registers */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]128 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]129 writel(0x00890089, &s3c_qos->s3cqos0);
130 writel(0x20960010, &s3c_qos->s3cqos1);
131 writel(0x20302030, &s3c_qos->s3cqos2);
132 writel(0x20AA2200, &s3c_qos->s3cqos3);
133 writel(0x00002032, &s3c_qos->s3cqos4);
134 writel(0x20960010, &s3c_qos->s3cqos5);
135 writel(0x20302030, &s3c_qos->s3cqos6);
136 writel(0x20AA2200, &s3c_qos->s3cqos7);
137 writel(0x00002032, &s3c_qos->s3cqos8);
138
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]139 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]140 writel(0x00890089, &s3c_qos->s3cqos0);
141 writel(0x20960010, &s3c_qos->s3cqos1);
142 writel(0x20302030, &s3c_qos->s3cqos2);
143 writel(0x20AA2200, &s3c_qos->s3cqos3);
144 writel(0x00002032, &s3c_qos->s3cqos4);
145 writel(0x20960010, &s3c_qos->s3cqos5);
146 writel(0x20302030, &s3c_qos->s3cqos6);
147 writel(0x20AA2200, &s3c_qos->s3cqos7);
148 writel(0x00002032, &s3c_qos->s3cqos8);
149
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]150 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]151 if (IS_R8A7791_ES2())
152 writel(0x80928092, &s3c_qos->s3cqos0);
153 else
154 writel(0x00820082, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]155 writel(0x20960020, &s3c_qos->s3cqos1);
156 writel(0x20302030, &s3c_qos->s3cqos2);
157 writel(0x20AA20DC, &s3c_qos->s3cqos3);
158 writel(0x00002032, &s3c_qos->s3cqos4);
159 writel(0x20960020, &s3c_qos->s3cqos5);
160 writel(0x20302030, &s3c_qos->s3cqos6);
161 writel(0x20AA20DC, &s3c_qos->s3cqos7);
162 writel(0x00002032, &s3c_qos->s3cqos8);
163
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]164 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]165 writel(0x00820082, &s3c_qos->s3cqos0);
166 writel(0x20960020, &s3c_qos->s3cqos1);
167 writel(0x20302030, &s3c_qos->s3cqos2);
168 writel(0x20AA20FA, &s3c_qos->s3cqos3);
169 writel(0x00002032, &s3c_qos->s3cqos4);
170 writel(0x20960020, &s3c_qos->s3cqos5);
171 writel(0x20302030, &s3c_qos->s3cqos6);
172 writel(0x20AA20FA, &s3c_qos->s3cqos7);
173 writel(0x00002032, &s3c_qos->s3cqos8);
174
175 /* DBSC -QoS */
176 /* DBSC0 - Read */
177 for (i = DBSC3_00; i < DBSC3_NR; i++) {
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]178 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]179 writel(0x00000002, &qos_addr->dblgcnt);
180 writel(0x00002096, &qos_addr->dbtmval0);
181 writel(0x00002064, &qos_addr->dbtmval1);
182 writel(0x00002032, &qos_addr->dbtmval2);
183 writel(0x00001FB0, &qos_addr->dbtmval3);
184 writel(0x00000001, &qos_addr->dbrqctr);
185 writel(0x00002078, &qos_addr->dbthres0);
186 writel(0x0000204B, &qos_addr->dbthres1);
187 writel(0x00001FE7, &qos_addr->dbthres2);
188 writel(0x00000001, &qos_addr->dblgqon);
189 }
190
191 /* DBSC0 - Write */
192 for (i = DBSC3_00; i < DBSC3_NR; i++) {
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]193 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]194 writel(0x00000002, &qos_addr->dblgcnt);
195 writel(0x000020EB, &qos_addr->dbtmval0);
196 writel(0x0000206E, &qos_addr->dbtmval1);
197 writel(0x00002050, &qos_addr->dbtmval2);
198 writel(0x0000203A, &qos_addr->dbtmval3);
199 writel(0x00000001, &qos_addr->dbrqctr);
200 writel(0x00002078, &qos_addr->dbthres0);
201 writel(0x0000205A, &qos_addr->dbthres1);
202 writel(0x0000203C, &qos_addr->dbthres2);
203 writel(0x00000001, &qos_addr->dblgqon);
204 }
205
206 /* DBSC1 - Read */
207 for (i = DBSC3_00; i < DBSC3_NR; i++) {
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]208 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i];
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]209 writel(0x00000002, &qos_addr->dblgcnt);
210 writel(0x00002096, &qos_addr->dbtmval0);
211 writel(0x00002064, &qos_addr->dbtmval1);
212 writel(0x00002032, &qos_addr->dbtmval2);
213 writel(0x00001FB0, &qos_addr->dbtmval3);
214 writel(0x00000001, &qos_addr->dbrqctr);
215 writel(0x00002078, &qos_addr->dbthres0);
216 writel(0x0000204B, &qos_addr->dbthres1);
217 writel(0x00001FE7, &qos_addr->dbthres2);
218 writel(0x00000001, &qos_addr->dblgqon);
219 }
220
221 /* DBSC1 - Write */
222 for (i = DBSC3_00; i < DBSC3_NR; i++) {
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]223 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i];
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]224 writel(0x00000002, &qos_addr->dblgcnt);
225 writel(0x000020EB, &qos_addr->dbtmval0);
226 writel(0x0000206E, &qos_addr->dbtmval1);
227 writel(0x00002050, &qos_addr->dbtmval2);
228 writel(0x0000203A, &qos_addr->dbtmval3);
229 writel(0x00000001, &qos_addr->dbrqctr);
230 writel(0x00002078, &qos_addr->dbthres0);
231 writel(0x0000205A, &qos_addr->dbthres1);
232 writel(0x0000203C, &qos_addr->dbthres2);
233 writel(0x00000001, &qos_addr->dblgqon);
234 }
235
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]236 if (!IS_R8A7791_ES2()) {
237 /* CCI-400 -QoS */
238 writel(0x20001000, CCI_400_MAXOT_1);
239 writel(0x20001000, CCI_400_MAXOT_2);
240 writel(0x0000000C, CCI_400_QOSCNTL_1);
241 writel(0x0000000C, CCI_400_QOSCNTL_2);
242 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]243
244 /* MXI -QoS */
245 /* Transaction Control (MXI) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]246 mxi = (struct rcar_mxi *)MXI_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]247 writel(0x00000013, &mxi->mxrtcr);
248 writel(0x00000013, &mxi->mxwtcr);
249 writel(0x00780080, &mxi->mxsaar0);
250 writel(0x02000800, &mxi->mxsaar1);
251
252 /* QoS Control (MXI) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]253 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]254 writel(0x0000000C, &mxi_qos->vspdu0);
255 writel(0x0000000C, &mxi_qos->vspdu1);
256 writel(0x0000000D, &mxi_qos->du0);
257 writel(0x0000000D, &mxi_qos->du1);
258
259 /* AXI -QoS */
260 /* Transaction Control (MXI) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]261 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]262 writel(0x00000002, &axi_qos->qosconf);
263 writel(0x00002245, &axi_qos->qosctset0);
264 writel(0x00002096, &axi_qos->qosctset1);
265 writel(0x00002030, &axi_qos->qosctset2);
266 writel(0x00002030, &axi_qos->qosctset3);
267 writel(0x00000001, &axi_qos->qosreqctr);
268 writel(0x00002064, &axi_qos->qosthres0);
269 writel(0x00002004, &axi_qos->qosthres1);
270 writel(0x00000000, &axi_qos->qosthres2);
271 writel(0x00000001, &axi_qos->qosqon);
272
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]273 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]274 writel(0x00000000, &axi_qos->qosconf);
275 writel(0x000020A6, &axi_qos->qosctset0);
276 writel(0x00000001, &axi_qos->qosreqctr);
277 writel(0x00002064, &axi_qos->qosthres0);
278 writel(0x00002004, &axi_qos->qosthres1);
279 writel(0x00000000, &axi_qos->qosthres2);
280 writel(0x00000001, &axi_qos->qosqon);
281
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]282 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]283 writel(0x00000000, &axi_qos->qosconf);
284 writel(0x000020A6, &axi_qos->qosctset0);
285 writel(0x00000001, &axi_qos->qosreqctr);
286 writel(0x00002064, &axi_qos->qosthres0);
287 writel(0x00002004, &axi_qos->qosthres1);
288 writel(0x00000000, &axi_qos->qosthres2);
289 writel(0x00000001, &axi_qos->qosqon);
290
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]291 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]292 writel(0x00000000, &axi_qos->qosconf);
293 writel(0x00002021, &axi_qos->qosctset0);
294 writel(0x00000001, &axi_qos->qosreqctr);
295 writel(0x00002064, &axi_qos->qosthres0);
296 writel(0x00002004, &axi_qos->qosthres1);
297 writel(0x00000000, &axi_qos->qosthres2);
298 writel(0x00000001, &axi_qos->qosqon);
299
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]300 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]301 writel(0x00000000, &axi_qos->qosconf);
302 writel(0x00002037, &axi_qos->qosctset0);
303 writel(0x00000001, &axi_qos->qosreqctr);
304 writel(0x00002064, &axi_qos->qosthres0);
305 writel(0x00002004, &axi_qos->qosthres1);
306 writel(0x00000000, &axi_qos->qosthres2);
307 writel(0x00000001, &axi_qos->qosqon);
308
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]309 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]310 writel(0x00000002, &axi_qos->qosconf);
311 writel(0x00002245, &axi_qos->qosctset0);
312 writel(0x00002096, &axi_qos->qosctset1);
313 writel(0x00002030, &axi_qos->qosctset2);
314 writel(0x00002030, &axi_qos->qosctset3);
315 writel(0x00000001, &axi_qos->qosreqctr);
316 writel(0x00002064, &axi_qos->qosthres0);
317 writel(0x00002004, &axi_qos->qosthres1);
318 writel(0x00000000, &axi_qos->qosthres2);
319 writel(0x00000001, &axi_qos->qosqon);
320
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]321 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]322 writel(0x00000002, &axi_qos->qosconf);
323 writel(0x00002245, &axi_qos->qosctset0);
324 writel(0x00002096, &axi_qos->qosctset1);
325 writel(0x00002030, &axi_qos->qosctset2);
326 writel(0x00002030, &axi_qos->qosctset3);
327 writel(0x00000001, &axi_qos->qosreqctr);
328 writel(0x00002064, &axi_qos->qosthres0);
329 writel(0x00002004, &axi_qos->qosthres1);
330 writel(0x00000000, &axi_qos->qosthres2);
331 writel(0x00000001, &axi_qos->qosqon);
332
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]333 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]334 writel(0x00000002, &axi_qos->qosconf);
335 writel(0x00002245, &axi_qos->qosctset0);
336 writel(0x00002096, &axi_qos->qosctset1);
337 writel(0x00002030, &axi_qos->qosctset2);
338 writel(0x00002030, &axi_qos->qosctset3);
339 writel(0x00000001, &axi_qos->qosreqctr);
340 writel(0x00002064, &axi_qos->qosthres0);
341 writel(0x00002004, &axi_qos->qosthres1);
342 writel(0x00000000, &axi_qos->qosthres2);
343 writel(0x00000001, &axi_qos->qosqon);
344
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]345 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]346 writel(0x00000000, &axi_qos->qosconf);
347 writel(0x0000214C, &axi_qos->qosctset0);
348 writel(0x00000001, &axi_qos->qosreqctr);
349 writel(0x00002064, &axi_qos->qosthres0);
350 writel(0x00002004, &axi_qos->qosthres1);
351 writel(0x00000000, &axi_qos->qosthres2);
352 writel(0x00000001, &axi_qos->qosqon);
353
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]354 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]355 writel(0x00000001, &axi_qos->qosconf);
356 writel(0x00002004, &axi_qos->qosctset0);
357 writel(0x00002096, &axi_qos->qosctset1);
358 writel(0x00002030, &axi_qos->qosctset2);
359 writel(0x00002030, &axi_qos->qosctset3);
360 writel(0x00000001, &axi_qos->qosreqctr);
361 writel(0x00002064, &axi_qos->qosthres0);
362 writel(0x00002004, &axi_qos->qosthres1);
363 writel(0x00000000, &axi_qos->qosthres2);
364 writel(0x00000001, &axi_qos->qosqon);
365
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]366 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]367 writel(0x00000001, &axi_qos->qosconf);
368 writel(0x00002004, &axi_qos->qosctset0);
369 writel(0x00002096, &axi_qos->qosctset1);
370 writel(0x00002030, &axi_qos->qosctset2);
371 writel(0x00002030, &axi_qos->qosctset3);
372 writel(0x00000001, &axi_qos->qosreqctr);
373 writel(0x00002064, &axi_qos->qosthres0);
374 writel(0x00002004, &axi_qos->qosthres1);
375 writel(0x00000000, &axi_qos->qosthres2);
376 writel(0x00000001, &axi_qos->qosqon);
377
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]378 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]379 writel(0x00000001, &axi_qos->qosconf);
380 writel(0x00002004, &axi_qos->qosctset0);
381 writel(0x00002096, &axi_qos->qosctset1);
382 writel(0x00002030, &axi_qos->qosctset2);
383 writel(0x00002030, &axi_qos->qosctset3);
384 writel(0x00000001, &axi_qos->qosreqctr);
385 writel(0x00002064, &axi_qos->qosthres0);
386 writel(0x00002004, &axi_qos->qosthres1);
387 writel(0x00000000, &axi_qos->qosthres2);
388 writel(0x00000001, &axi_qos->qosqon);
389
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]390 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]391 writel(0x00000001, &axi_qos->qosconf);
392 writel(0x00002004, &axi_qos->qosctset0);
393 writel(0x00002096, &axi_qos->qosctset1);
394 writel(0x00002030, &axi_qos->qosctset2);
395 writel(0x00002030, &axi_qos->qosctset3);
396 writel(0x00000001, &axi_qos->qosreqctr);
397 writel(0x00002064, &axi_qos->qosthres0);
398 writel(0x00002004, &axi_qos->qosthres1);
399 writel(0x00000000, &axi_qos->qosthres2);
400 writel(0x00000001, &axi_qos->qosqon);
401
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]402 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]403 writel(0x00000001, &axi_qos->qosconf);
404 writel(0x00002004, &axi_qos->qosctset0);
405 writel(0x00002096, &axi_qos->qosctset1);
406 writel(0x00002030, &axi_qos->qosctset2);
407 writel(0x00002030, &axi_qos->qosctset3);
408 writel(0x00000001, &axi_qos->qosreqctr);
409 writel(0x00002064, &axi_qos->qosthres0);
410 writel(0x00002004, &axi_qos->qosthres1);
411 writel(0x00000000, &axi_qos->qosthres2);
412 writel(0x00000001, &axi_qos->qosqon);
413
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]414 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]415 writel(0x00000000, &axi_qos->qosconf);
416 writel(0x00002021, &axi_qos->qosctset0);
417 writel(0x00000001, &axi_qos->qosreqctr);
418 writel(0x00002064, &axi_qos->qosthres0);
419 writel(0x00002004, &axi_qos->qosthres1);
420 writel(0x00000000, &axi_qos->qosthres2);
421 writel(0x00000001, &axi_qos->qosqon);
422
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]423 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]424 writel(0x00000000, &axi_qos->qosconf);
425 writel(0x00002021, &axi_qos->qosctset0);
426 writel(0x00000001, &axi_qos->qosreqctr);
427 writel(0x00002064, &axi_qos->qosthres0);
428 writel(0x00002004, &axi_qos->qosthres1);
429 writel(0x00000000, &axi_qos->qosthres2);
430 writel(0x00000001, &axi_qos->qosqon);
431
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]432 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]433 writel(0x00000000, &axi_qos->qosconf);
434 writel(0x0000214C, &axi_qos->qosctset0);
435 writel(0x00000001, &axi_qos->qosreqctr);
436 writel(0x00002064, &axi_qos->qosthres0);
437 writel(0x00002004, &axi_qos->qosthres1);
438 writel(0x00000000, &axi_qos->qosthres2);
439 writel(0x00000001, &axi_qos->qosqon);
440
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]441 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]442 writel(0x00000002, &axi_qos->qosconf);
443 writel(0x00002245, &axi_qos->qosctset0);
444 writel(0x00002096, &axi_qos->qosctset1);
445 writel(0x00002030, &axi_qos->qosctset2);
446 writel(0x00002030, &axi_qos->qosctset3);
447 writel(0x00000001, &axi_qos->qosreqctr);
448 writel(0x00002064, &axi_qos->qosthres0);
449 writel(0x00002004, &axi_qos->qosthres1);
450 writel(0x00000000, &axi_qos->qosthres2);
451 writel(0x00000001, &axi_qos->qosqon);
452
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]453 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]454 writel(0x00000000, &axi_qos->qosconf);
455 writel(0x000020A6, &axi_qos->qosctset0);
456 writel(0x00000001, &axi_qos->qosreqctr);
457 writel(0x00002064, &axi_qos->qosthres0);
458 writel(0x00002004, &axi_qos->qosthres1);
459 writel(0x00000000, &axi_qos->qosthres2);
460 writel(0x00000001, &axi_qos->qosqon);
461
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]462 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]463 writel(0x00000000, &axi_qos->qosconf);
464 writel(0x000020A6, &axi_qos->qosctset0);
465 writel(0x00000001, &axi_qos->qosreqctr);
466 writel(0x00002064, &axi_qos->qosthres0);
467 writel(0x00002004, &axi_qos->qosthres1);
468 writel(0x00000000, &axi_qos->qosthres2);
469 writel(0x00000001, &axi_qos->qosqon);
470
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]471 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]472 writel(0x00000000, &axi_qos->qosconf);
473 writel(0x00002053, &axi_qos->qosctset0);
474 writel(0x00000001, &axi_qos->qosreqctr);
475 writel(0x00002064, &axi_qos->qosthres0);
476 writel(0x00002004, &axi_qos->qosthres1);
477 writel(0x00000000, &axi_qos->qosthres2);
478 writel(0x00000001, &axi_qos->qosqon);
479
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]480 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]481 writel(0x00000000, &axi_qos->qosconf);
482 writel(0x00002053, &axi_qos->qosctset0);
483 writel(0x00000001, &axi_qos->qosreqctr);
484 writel(0x00002064, &axi_qos->qosthres0);
485 writel(0x00002004, &axi_qos->qosthres1);
486 writel(0x00000000, &axi_qos->qosthres2);
487 writel(0x00000001, &axi_qos->qosqon);
488
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]489 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]490 writel(0x00000000, &axi_qos->qosconf);
491 writel(0x00002053, &axi_qos->qosctset0);
492 writel(0x00000001, &axi_qos->qosreqctr);
493 writel(0x00002064, &axi_qos->qosthres0);
494 writel(0x00002004, &axi_qos->qosthres1);
495 writel(0x00000000, &axi_qos->qosthres2);
496 writel(0x00000001, &axi_qos->qosqon);
497
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]498 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]499 writel(0x00000000, &axi_qos->qosconf);
500 writel(0x0000214C, &axi_qos->qosctset0);
501 writel(0x00000001, &axi_qos->qosreqctr);
502 writel(0x00002064, &axi_qos->qosthres0);
503 writel(0x00002004, &axi_qos->qosthres1);
504 writel(0x00000000, &axi_qos->qosthres2);
505 writel(0x00000001, &axi_qos->qosqon);
506
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]507 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]508 writel(0x00000002, &axi_qos->qosconf);
509 writel(0x00002245, &axi_qos->qosctset0);
510 writel(0x00000001, &axi_qos->qosreqctr);
511 writel(0x00002064, &axi_qos->qosthres0);
512 writel(0x00002004, &axi_qos->qosthres1);
513 writel(0x00000000, &axi_qos->qosthres2);
514 writel(0x00000001, &axi_qos->qosqon);
515
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]516 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]517 writel(0x00000000, &axi_qos->qosconf);
518 writel(0x00002029, &axi_qos->qosctset0);
519 writel(0x00000001, &axi_qos->qosreqctr);
520 writel(0x00002064, &axi_qos->qosthres0);
521 writel(0x00002004, &axi_qos->qosthres1);
522 writel(0x00000000, &axi_qos->qosthres2);
523 writel(0x00000001, &axi_qos->qosqon);
524
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]525 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]526 writel(0x00000002, &axi_qos->qosconf);
527 writel(0x00002245, &axi_qos->qosctset0);
528 writel(0x00000001, &axi_qos->qosreqctr);
529 writel(0x00002064, &axi_qos->qosthres0);
530 writel(0x00002004, &axi_qos->qosthres1);
531 writel(0x00000000, &axi_qos->qosthres2);
532 writel(0x00000001, &axi_qos->qosqon);
533
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]534 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]535 writel(0x00000000, &axi_qos->qosconf);
536 writel(0x00002053, &axi_qos->qosctset0);
537 writel(0x00000001, &axi_qos->qosreqctr);
538 writel(0x00002064, &axi_qos->qosthres0);
539 writel(0x00002004, &axi_qos->qosthres1);
540 writel(0x00000000, &axi_qos->qosthres2);
541 writel(0x00000001, &axi_qos->qosqon);
542
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]543 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]544 writel(0x00000000, &axi_qos->qosconf);
545 writel(0x000020A6, &axi_qos->qosctset0);
546 writel(0x00000001, &axi_qos->qosreqctr);
547 writel(0x00002064, &axi_qos->qosthres0);
548 writel(0x00002004, &axi_qos->qosthres1);
549 writel(0x00000000, &axi_qos->qosthres2);
550 writel(0x00000001, &axi_qos->qosqon);
551
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]552 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]553 writel(0x00000000, &axi_qos->qosconf);
554 writel(0x00002053, &axi_qos->qosctset0);
555 writel(0x00000001, &axi_qos->qosreqctr);
556 writel(0x00002064, &axi_qos->qosthres0);
557 writel(0x00002004, &axi_qos->qosthres1);
558 writel(0x00000000, &axi_qos->qosthres2);
559 writel(0x00000001, &axi_qos->qosqon);
560
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]561 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]562 writel(0x00000002, &axi_qos->qosconf);
563 writel(0x00002245, &axi_qos->qosctset0);
564 writel(0x00000001, &axi_qos->qosreqctr);
565 writel(0x00002064, &axi_qos->qosthres0);
566 writel(0x00002004, &axi_qos->qosthres1);
567 writel(0x00000000, &axi_qos->qosthres2);
568 writel(0x00000001, &axi_qos->qosqon);
569
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]570 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]571 writel(0x00000000, &axi_qos->qosconf);
572 writel(0x00002053, &axi_qos->qosctset0);
573 writel(0x00000001, &axi_qos->qosreqctr);
574 writel(0x00002064, &axi_qos->qosthres0);
575 writel(0x00002004, &axi_qos->qosthres1);
576 writel(0x00000000, &axi_qos->qosthres2);
577 writel(0x00000001, &axi_qos->qosqon);
578
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]579 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]580 writel(0x00000000, &axi_qos->qosconf);
581 writel(0x00002053, &axi_qos->qosctset0);
582 writel(0x00000001, &axi_qos->qosreqctr);
583 writel(0x00002064, &axi_qos->qosthres0);
584 writel(0x00002004, &axi_qos->qosthres1);
585 writel(0x00000000, &axi_qos->qosthres2);
586 writel(0x00000001, &axi_qos->qosqon);
587
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]588 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]589 writel(0x00000000, &axi_qos->qosconf);
590 writel(0x0000214C, &axi_qos->qosctset0);
591 writel(0x00000001, &axi_qos->qosreqctr);
592 writel(0x00002064, &axi_qos->qosthres0);
593 writel(0x00002004, &axi_qos->qosthres1);
594 writel(0x00000000, &axi_qos->qosthres2);
595 writel(0x00000001, &axi_qos->qosqon);
596
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]597 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]598 writel(0x00000000, &axi_qos->qosconf);
599 writel(0x0000214C, &axi_qos->qosctset0);
600 writel(0x00000001, &axi_qos->qosreqctr);
601 writel(0x00002064, &axi_qos->qosthres0);
602 writel(0x00002004, &axi_qos->qosthres1);
603 writel(0x00000000, &axi_qos->qosthres2);
604 writel(0x00000001, &axi_qos->qosqon);
605
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]606 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]607 writel(0x00000000, &axi_qos->qosconf);
608 writel(0x000020A6, &axi_qos->qosctset0);
609 writel(0x00000001, &axi_qos->qosreqctr);
610 writel(0x00002064, &axi_qos->qosthres0);
611 writel(0x00002004, &axi_qos->qosthres1);
612 writel(0x00000000, &axi_qos->qosthres2);
613 writel(0x00000001, &axi_qos->qosqon);
614
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]615 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]616 writel(0x00000000, &axi_qos->qosconf);
617 writel(0x00002053, &axi_qos->qosctset0);
618 writel(0x00000001, &axi_qos->qosreqctr);
619 writel(0x00002064, &axi_qos->qosthres0);
620 writel(0x00002004, &axi_qos->qosthres1);
621 writel(0x00000000, &axi_qos->qosthres2);
622 writel(0x00000001, &axi_qos->qosqon);
623
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]624 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]625 writel(0x00000000, &axi_qos->qosconf);
626 writel(0x00002053, &axi_qos->qosctset0);
627 writel(0x00000001, &axi_qos->qosreqctr);
628 writel(0x00002064, &axi_qos->qosthres0);
629 writel(0x00002004, &axi_qos->qosthres1);
630 writel(0x00000000, &axi_qos->qosthres2);
631 writel(0x00000001, &axi_qos->qosqon);
632
633 /* QoS Register (RT-AXI) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]634 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]635 writel(0x00000000, &axi_qos->qosconf);
636 writel(0x00002053, &axi_qos->qosctset0);
637 writel(0x00002096, &axi_qos->qosctset1);
638 writel(0x00002030, &axi_qos->qosctset2);
639 writel(0x00002030, &axi_qos->qosctset3);
640 writel(0x00000001, &axi_qos->qosreqctr);
641 writel(0x00002064, &axi_qos->qosthres0);
642 writel(0x00002004, &axi_qos->qosthres1);
643 writel(0x00000000, &axi_qos->qosthres2);
644 writel(0x00000001, &axi_qos->qosqon);
645
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]646 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]647 writel(0x00000000, &axi_qos->qosconf);
648 writel(0x00002053, &axi_qos->qosctset0);
649 writel(0x00002096, &axi_qos->qosctset1);
650 writel(0x00002030, &axi_qos->qosctset2);
651 writel(0x00002030, &axi_qos->qosctset3);
652 writel(0x00000001, &axi_qos->qosreqctr);
653 writel(0x00002064, &axi_qos->qosthres0);
654 writel(0x00002004, &axi_qos->qosthres1);
655 writel(0x00000000, &axi_qos->qosthres2);
656 writel(0x00000001, &axi_qos->qosqon);
657
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]658 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]659 writel(0x00000000, &axi_qos->qosconf);
660 writel(0x00002299, &axi_qos->qosctset0);
661 writel(0x00000001, &axi_qos->qosreqctr);
662 writel(0x00002064, &axi_qos->qosthres0);
663 writel(0x00002004, &axi_qos->qosthres1);
664 writel(0x00000000, &axi_qos->qosthres2);
665 writel(0x00000001, &axi_qos->qosqon);
666
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]667 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]668 writel(0x00000000, &axi_qos->qosconf);
669 writel(0x00002029, &axi_qos->qosctset0);
670 writel(0x00000001, &axi_qos->qosreqctr);
671 writel(0x00002064, &axi_qos->qosthres0);
672 writel(0x00002004, &axi_qos->qosthres1);
673 writel(0x00000000, &axi_qos->qosthres2);
674 writel(0x00000001, &axi_qos->qosqon);
675
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]676 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]677 writel(0x00000002, &axi_qos->qosconf);
678 writel(0x00002245, &axi_qos->qosctset0);
679 writel(0x00002096, &axi_qos->qosctset1);
680 writel(0x00002030, &axi_qos->qosctset2);
681 writel(0x00002030, &axi_qos->qosctset3);
682 writel(0x00000001, &axi_qos->qosreqctr);
683 writel(0x00002064, &axi_qos->qosthres0);
684 writel(0x00002004, &axi_qos->qosthres1);
685 writel(0x00000000, &axi_qos->qosthres2);
686 writel(0x00000001, &axi_qos->qosqon);
687
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]688 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]689 writel(0x00000000, &axi_qos->qosconf);
690 writel(0x00002029, &axi_qos->qosctset0);
691 writel(0x00002096, &axi_qos->qosctset1);
692 writel(0x00002030, &axi_qos->qosctset2);
693 writel(0x00002030, &axi_qos->qosctset3);
694 writel(0x00000001, &axi_qos->qosreqctr);
695 writel(0x00002064, &axi_qos->qosthres0);
696 writel(0x00002004, &axi_qos->qosthres1);
697 writel(0x00000000, &axi_qos->qosthres2);
698 writel(0x00000001, &axi_qos->qosqon);
699
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]700 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]701 writel(0x00000002, &axi_qos->qosconf);
702 writel(0x00002245, &axi_qos->qosctset0);
703 writel(0x00002096, &axi_qos->qosctset1);
704 writel(0x00002030, &axi_qos->qosctset2);
705 writel(0x00002030, &axi_qos->qosctset3);
706 writel(0x00000001, &axi_qos->qosreqctr);
707 writel(0x00002064, &axi_qos->qosthres0);
708 writel(0x00002004, &axi_qos->qosthres1);
709 writel(0x00000000, &axi_qos->qosthres2);
710 writel(0x00000001, &axi_qos->qosqon);
711
712 /* QoS Register (MP-AXI) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]713 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]714 writel(0x00000000, &axi_qos->qosconf);
715 writel(0x00002037, &axi_qos->qosctset0);
716 writel(0x00000001, &axi_qos->qosreqctr);
717 writel(0x00002064, &axi_qos->qosthres0);
718 writel(0x00002004, &axi_qos->qosthres1);
719 writel(0x00000000, &axi_qos->qosthres2);
720 writel(0x00000001, &axi_qos->qosqon);
721
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]722 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]723 writel(0x00000001, &axi_qos->qosconf);
724 writel(0x00002014, &axi_qos->qosctset0);
725 writel(0x00000001, &axi_qos->qosreqctr);
726 writel(0x00002064, &axi_qos->qosthres0);
727 writel(0x00002004, &axi_qos->qosthres1);
728 writel(0x00000000, &axi_qos->qosthres2);
729 writel(0x00000001, &axi_qos->qosqon);
730
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]731 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]732 writel(0x00000001, &axi_qos->qosconf);
733 writel(0x00002014, &axi_qos->qosctset0);
734 writel(0x00000001, &axi_qos->qosreqctr);
735 writel(0x00002064, &axi_qos->qosthres0);
736 writel(0x00002004, &axi_qos->qosthres1);
737 writel(0x00000000, &axi_qos->qosthres2);
738 writel(0x00000001, &axi_qos->qosqon);
739
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]740 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]741 writel(0x00000000, &axi_qos->qosconf);
742 writel(0x00002014, &axi_qos->qosctset0);
743 writel(0x00000001, &axi_qos->qosreqctr);
744 writel(0x00002064, &axi_qos->qosthres0);
745 writel(0x00002004, &axi_qos->qosthres1);
746 writel(0x00000000, &axi_qos->qosthres2);
747 writel(0x00000001, &axi_qos->qosqon);
748
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]749 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]750 writel(0x00000001, &axi_qos->qosconf);
751 writel(0x00002004, &axi_qos->qosctset0);
752 writel(0x00002096, &axi_qos->qosctset1);
753 writel(0x00002030, &axi_qos->qosctset2);
754 writel(0x00002030, &axi_qos->qosctset3);
755 writel(0x00000001, &axi_qos->qosreqctr);
756 writel(0x00002064, &axi_qos->qosthres0);
757 writel(0x00002004, &axi_qos->qosthres1);
758 writel(0x00000000, &axi_qos->qosthres2);
759 writel(0x00000001, &axi_qos->qosqon);
760
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]761 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]762 writel(0x00000000, &axi_qos->qosconf);
763 writel(0x00002053, &axi_qos->qosctset0);
764 writel(0x00000001, &axi_qos->qosreqctr);
765 writel(0x00002064, &axi_qos->qosthres0);
766 writel(0x00002004, &axi_qos->qosthres1);
767 writel(0x00000000, &axi_qos->qosthres2);
768 writel(0x00000001, &axi_qos->qosqon);
769
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]770 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]771 writel(0x00000000, &axi_qos->qosconf);
772 writel(0x0000206E, &axi_qos->qosctset0);
773 writel(0x00000001, &axi_qos->qosreqctr);
774 writel(0x00002064, &axi_qos->qosthres0);
775 writel(0x00002004, &axi_qos->qosthres1);
776 writel(0x00000000, &axi_qos->qosthres2);
777 writel(0x00000001, &axi_qos->qosqon);
778
779 /* QoS Register (SYS-AXI256) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]780 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]781 writel(0x00000002, &axi_qos->qosconf);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]782 if (IS_R8A7791_ES2())
783 writel(0x000020EB, &axi_qos->qosctset0);
784 else
785 writel(0x00002245, &axi_qos->qosctset0);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]786 writel(0x00002096, &axi_qos->qosctset1);
787 writel(0x00002030, &axi_qos->qosctset2);
788 writel(0x00002030, &axi_qos->qosctset3);
789 writel(0x00000001, &axi_qos->qosreqctr);
790 writel(0x00002064, &axi_qos->qosthres0);
791 writel(0x00002004, &axi_qos->qosthres1);
792 writel(0x00000000, &axi_qos->qosthres2);
793 writel(0x00000001, &axi_qos->qosqon);
794
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]795 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]796 writel(0x00000002, &axi_qos->qosconf);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]797 if (IS_R8A7791_ES2())
798 writel(0x000020EB, &axi_qos->qosctset0);
799 else
800 writel(0x00002245, &axi_qos->qosctset0);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]801 writel(0x00002096, &axi_qos->qosctset1);
802 writel(0x00002030, &axi_qos->qosctset2);
803 writel(0x00002030, &axi_qos->qosctset3);
804 writel(0x00000001, &axi_qos->qosreqctr);
805 writel(0x00002064, &axi_qos->qosthres0);
806 writel(0x00002004, &axi_qos->qosthres1);
807 writel(0x00000000, &axi_qos->qosthres2);
808 writel(0x00000001, &axi_qos->qosqon);
809
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]810 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]811 writel(0x00000002, &axi_qos->qosconf);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]812 if (IS_R8A7791_ES2())
813 writel(0x000020EB, &axi_qos->qosctset0);
814 else
815 writel(0x00002245, &axi_qos->qosctset0);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]816 writel(0x00002096, &axi_qos->qosctset1);
817 writel(0x00002030, &axi_qos->qosctset2);
818 writel(0x00002030, &axi_qos->qosctset3);
819 writel(0x00000001, &axi_qos->qosreqctr);
820 writel(0x00002064, &axi_qos->qosthres0);
821 writel(0x00002004, &axi_qos->qosthres1);
822 writel(0x00000000, &axi_qos->qosthres2);
823 writel(0x00000001, &axi_qos->qosqon);
824
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]825 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]826 writel(0x00000002, &axi_qos->qosconf);
827 writel(0x00002245, &axi_qos->qosctset0);
828 writel(0x00002096, &axi_qos->qosctset1);
829 writel(0x00002030, &axi_qos->qosctset2);
830 writel(0x00002030, &axi_qos->qosctset3);
831 writel(0x00000001, &axi_qos->qosreqctr);
832 writel(0x00002064, &axi_qos->qosthres0);
833 writel(0x00002004, &axi_qos->qosthres1);
834 writel(0x00000000, &axi_qos->qosthres2);
835 writel(0x00000001, &axi_qos->qosqon);
836
837 /* QoS Register (CCI-AXI) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]838 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]839 writel(0x00000001, &axi_qos->qosconf);
840 writel(0x00002004, &axi_qos->qosctset0);
841 writel(0x00002096, &axi_qos->qosctset1);
842 writel(0x00002030, &axi_qos->qosctset2);
843 writel(0x00002030, &axi_qos->qosctset3);
844 writel(0x00000001, &axi_qos->qosreqctr);
845 writel(0x00002064, &axi_qos->qosthres0);
846 writel(0x00002004, &axi_qos->qosthres1);
847 writel(0x00000000, &axi_qos->qosthres2);
848 writel(0x00000001, &axi_qos->qosqon);
849
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]850 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]851 writel(0x00000002, &axi_qos->qosconf);
852 writel(0x00002245, &axi_qos->qosctset0);
853 writel(0x00002096, &axi_qos->qosctset1);
854 writel(0x00002030, &axi_qos->qosctset2);
855 writel(0x00002030, &axi_qos->qosctset3);
856 writel(0x00000001, &axi_qos->qosreqctr);
857 writel(0x00002064, &axi_qos->qosthres0);
858 writel(0x00002004, &axi_qos->qosthres1);
859 writel(0x00000000, &axi_qos->qosthres2);
860 writel(0x00000001, &axi_qos->qosqon);
861
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]862 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]863 writel(0x00000001, &axi_qos->qosconf);
864 writel(0x00002004, &axi_qos->qosctset0);
865 writel(0x00002096, &axi_qos->qosctset1);
866 writel(0x00002030, &axi_qos->qosctset2);
867 writel(0x00002030, &axi_qos->qosctset3);
868 writel(0x00000001, &axi_qos->qosreqctr);
869 writel(0x00002064, &axi_qos->qosthres0);
870 writel(0x00002004, &axi_qos->qosthres1);
871 writel(0x00000000, &axi_qos->qosthres2);
872 writel(0x00000001, &axi_qos->qosqon);
873
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]874 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]875 writel(0x00000001, &axi_qos->qosconf);
876 writel(0x00002004, &axi_qos->qosctset0);
877 writel(0x00002096, &axi_qos->qosctset1);
878 writel(0x00002030, &axi_qos->qosctset2);
879 writel(0x00002030, &axi_qos->qosctset3);
880 writel(0x00000001, &axi_qos->qosreqctr);
881 writel(0x00002064, &axi_qos->qosthres0);
882 writel(0x00002004, &axi_qos->qosthres1);
883 writel(0x00000000, &axi_qos->qosthres2);
884 writel(0x00000001, &axi_qos->qosqon);
885
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]886 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]887 writel(0x00000001, &axi_qos->qosconf);
888 writel(0x00002004, &axi_qos->qosctset0);
889 writel(0x00002096, &axi_qos->qosctset1);
890 writel(0x00002030, &axi_qos->qosctset2);
891 writel(0x00002030, &axi_qos->qosctset3);
892 writel(0x00000001, &axi_qos->qosreqctr);
893 writel(0x00002064, &axi_qos->qosthres0);
894 writel(0x00002004, &axi_qos->qosthres1);
895 writel(0x00000000, &axi_qos->qosthres2);
896 writel(0x00000001, &axi_qos->qosqon);
897
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]898 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]899 writel(0x00000002, &axi_qos->qosconf);
900 writel(0x00002245, &axi_qos->qosctset0);
901 writel(0x00002096, &axi_qos->qosctset1);
902 writel(0x00002030, &axi_qos->qosctset2);
903 writel(0x00002030, &axi_qos->qosctset3);
904 writel(0x00000001, &axi_qos->qosreqctr);
905 writel(0x00002064, &axi_qos->qosthres0);
906 writel(0x00002004, &axi_qos->qosthres1);
907 writel(0x00000000, &axi_qos->qosthres2);
908 writel(0x00000001, &axi_qos->qosqon);
909
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]910 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]911 writel(0x00000001, &axi_qos->qosconf);
912 writel(0x00002004, &axi_qos->qosctset0);
913 writel(0x00002096, &axi_qos->qosctset1);
914 writel(0x00002030, &axi_qos->qosctset2);
915 writel(0x00002030, &axi_qos->qosctset3);
916 writel(0x00000001, &axi_qos->qosreqctr);
917 writel(0x00002064, &axi_qos->qosthres0);
918 writel(0x00002004, &axi_qos->qosthres1);
919 writel(0x00000000, &axi_qos->qosthres2);
920 writel(0x00000001, &axi_qos->qosqon);
921
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]922 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]923 writel(0x00000001, &axi_qos->qosconf);
924 writel(0x00002004, &axi_qos->qosctset0);
925 writel(0x00002096, &axi_qos->qosctset1);
926 writel(0x00002030, &axi_qos->qosctset2);
927 writel(0x00002030, &axi_qos->qosctset3);
928 writel(0x00000001, &axi_qos->qosreqctr);
929 writel(0x00002064, &axi_qos->qosthres0);
930 writel(0x00002004, &axi_qos->qosthres1);
931 writel(0x00000000, &axi_qos->qosthres2);
932 writel(0x00000001, &axi_qos->qosqon);
933
934 /* QoS Register (Media-AXI) */
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]935 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]936 writel(0x00000002, &axi_qos->qosconf);
937 writel(0x000020DC, &axi_qos->qosctset0);
938 writel(0x00002096, &axi_qos->qosctset1);
939 writel(0x00002030, &axi_qos->qosctset2);
940 writel(0x00002030, &axi_qos->qosctset3);
941 writel(0x00000020, &axi_qos->qosreqctr);
942 writel(0x000020AA, &axi_qos->qosthres0);
943 writel(0x00002032, &axi_qos->qosthres1);
944 writel(0x00000001, &axi_qos->qosthres2);
945
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]946 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]947 writel(0x00000002, &axi_qos->qosconf);
948 writel(0x000020DC, &axi_qos->qosctset0);
949 writel(0x00002096, &axi_qos->qosctset1);
950 writel(0x00002030, &axi_qos->qosctset2);
951 writel(0x00002030, &axi_qos->qosctset3);
952 writel(0x00000020, &axi_qos->qosreqctr);
953 writel(0x000020AA, &axi_qos->qosthres0);
954 writel(0x00002032, &axi_qos->qosthres1);
955 writel(0x00000001, &axi_qos->qosthres2);
956
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]957 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]958 writel(0x00000001, &axi_qos->qosconf);
959 writel(0x00002190, &axi_qos->qosctset0);
960 writel(0x00000020, &axi_qos->qosreqctr);
961 writel(0x00002064, &axi_qos->qosthres0);
962 writel(0x00002004, &axi_qos->qosthres1);
963 writel(0x00000001, &axi_qos->qosthres2);
964 writel(0x00000001, &axi_qos->qosqon);
965
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]966 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]967 writel(0x00000001, &axi_qos->qosconf);
968 writel(0x00002190, &axi_qos->qosctset0);
969 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]970 if (IS_R8A7791_ES2()) {
971 writel(0x00000001, &axi_qos->qosthres0);
972 writel(0x00000001, &axi_qos->qosthres1);
973 } else {
974 writel(0x00002064, &axi_qos->qosthres0);
975 writel(0x00002004, &axi_qos->qosthres1);
976 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]977 writel(0x00000001, &axi_qos->qosthres2);
978 writel(0x00000001, &axi_qos->qosqon);
979
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]980 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]981 writel(0x00000001, &axi_qos->qosconf);
982 writel(0x00002190, &axi_qos->qosctset0);
983 writel(0x00000020, &axi_qos->qosreqctr);
984 writel(0x00002064, &axi_qos->qosthres0);
985 writel(0x00002004, &axi_qos->qosthres1);
986 writel(0x00000001, &axi_qos->qosthres2);
987 writel(0x00000001, &axi_qos->qosqon);
988
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]989 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]990 writel(0x00000001, &axi_qos->qosconf);
991 writel(0x00002190, &axi_qos->qosctset0);
992 writel(0x00000020, &axi_qos->qosreqctr);
993 writel(0x00002064, &axi_qos->qosthres0);
994 writel(0x00002004, &axi_qos->qosthres1);
995 writel(0x00000001, &axi_qos->qosthres2);
996 writel(0x00000001, &axi_qos->qosqon);
997
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]998 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]999 writel(0x00000001, &axi_qos->qosconf);
1000 writel(0x00002190, &axi_qos->qosctset0);
1001 writel(0x00000020, &axi_qos->qosreqctr);
1002 writel(0x00002064, &axi_qos->qosthres0);
1003 writel(0x00002004, &axi_qos->qosthres1);
1004 writel(0x00000001, &axi_qos->qosthres2);
1005 writel(0x00000001, &axi_qos->qosqon);
1006
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1007 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1008 writel(0x00000001, &axi_qos->qosconf);
1009 writel(0x00002190, &axi_qos->qosctset0);
1010 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1011 if (IS_R8A7791_ES2()) {
1012 writel(0x00000001, &axi_qos->qosthres0);
1013 writel(0x00000001, &axi_qos->qosthres1);
1014 } else {
1015 writel(0x00002064, &axi_qos->qosthres0);
1016 writel(0x00002004, &axi_qos->qosthres1);
1017 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1018 writel(0x00000001, &axi_qos->qosthres2);
1019 writel(0x00000001, &axi_qos->qosqon);
1020
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1021 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1022 writel(0x00000001, &axi_qos->qosconf);
1023 writel(0x00002190, &axi_qos->qosctset0);
1024 writel(0x00000020, &axi_qos->qosreqctr);
1025 writel(0x00002064, &axi_qos->qosthres0);
1026 writel(0x00002004, &axi_qos->qosthres1);
1027 writel(0x00000001, &axi_qos->qosthres2);
1028 writel(0x00000001, &axi_qos->qosqon);
1029
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1030 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1031 writel(0x00000001, &axi_qos->qosconf);
1032 writel(0x00002190, &axi_qos->qosctset0);
1033 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1034 if (IS_R8A7791_ES2()) {
1035 writel(0x00000001, &axi_qos->qosthres0);
1036 writel(0x00000001, &axi_qos->qosthres1);
1037 } else {
1038 writel(0x00002064, &axi_qos->qosthres0);
1039 writel(0x00002004, &axi_qos->qosthres1);
1040 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1041 writel(0x00000001, &axi_qos->qosthres2);
1042 writel(0x00000001, &axi_qos->qosqon);
1043
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1044 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1045 writel(0x00000001, &axi_qos->qosconf);
1046 writel(0x00002190, &axi_qos->qosctset0);
1047 writel(0x00000020, &axi_qos->qosreqctr);
1048 writel(0x00002064, &axi_qos->qosthres0);
1049 writel(0x00002004, &axi_qos->qosthres1);
1050 writel(0x00000001, &axi_qos->qosthres2);
1051 writel(0x00000001, &axi_qos->qosqon);
1052
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1053 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1054 writel(0x00000001, &axi_qos->qosconf);
1055 writel(0x00002190, &axi_qos->qosctset0);
1056 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1057 if (IS_R8A7791_ES2()) {
1058 writel(0x00000001, &axi_qos->qosthres0);
1059 writel(0x00000001, &axi_qos->qosthres1);
1060 } else {
1061 writel(0x00002064, &axi_qos->qosthres0);
1062 writel(0x00002004, &axi_qos->qosthres1);
1063 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1064 writel(0x00000001, &axi_qos->qosthres2);
1065 writel(0x00000001, &axi_qos->qosqon);
1066
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1067 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1068 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1069 if (IS_R8A7791_ES2())
1070 writel(0x00001FF0, &axi_qos->qosctset0);
1071 else
1072 writel(0x000020C8, &axi_qos->qosctset0);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1073 writel(0x00000020, &axi_qos->qosreqctr);
1074 writel(0x00002064, &axi_qos->qosthres0);
1075 writel(0x00002004, &axi_qos->qosthres1);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1076 if (IS_R8A7791_ES2())
1077 writel(0x00002001, &axi_qos->qosthres2);
1078 else
1079 writel(0x00000001, &axi_qos->qosthres2);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1080 writel(0x00000001, &axi_qos->qosqon);
1081
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1082 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1083 writel(0x00000001, &axi_qos->qosconf);
1084 writel(0x000020C8, &axi_qos->qosctset0);
1085 writel(0x00000020, &axi_qos->qosreqctr);
1086 writel(0x00002064, &axi_qos->qosthres0);
1087 writel(0x00002004, &axi_qos->qosthres1);
1088 writel(0x00000001, &axi_qos->qosthres2);
1089 writel(0x00000001, &axi_qos->qosqon);
1090
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1091 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1092 writel(0x00000001, &axi_qos->qosconf);
1093 writel(0x000020C8, &axi_qos->qosctset0);
1094 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1095 if (IS_R8A7791_ES2()) {
1096 writel(0x00000001, &axi_qos->qosthres0);
1097 writel(0x00000001, &axi_qos->qosthres1);
1098 } else {
1099 writel(0x00002064, &axi_qos->qosthres0);
1100 writel(0x00002004, &axi_qos->qosthres1);
1101 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1102 writel(0x00000001, &axi_qos->qosthres2);
1103 writel(0x00000001, &axi_qos->qosqon);
1104
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1105 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1106 writel(0x00000001, &axi_qos->qosconf);
1107 writel(0x000020C8, &axi_qos->qosctset0);
1108 writel(0x00000020, &axi_qos->qosreqctr);
1109 writel(0x00002064, &axi_qos->qosthres0);
1110 writel(0x00002004, &axi_qos->qosthres1);
1111 writel(0x00000001, &axi_qos->qosthres2);
1112 writel(0x00000001, &axi_qos->qosqon);
1113
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1114 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1115 writel(0x00000001, &axi_qos->qosconf);
1116 writel(0x000020C8, &axi_qos->qosctset0);
1117 writel(0x00000020, &axi_qos->qosreqctr);
1118 writel(0x00002064, &axi_qos->qosthres0);
1119 writel(0x00002004, &axi_qos->qosthres1);
1120 writel(0x00000001, &axi_qos->qosthres2);
1121 writel(0x00000001, &axi_qos->qosqon);
1122
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1123 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1124 writel(0x00000001, &axi_qos->qosconf);
1125 writel(0x000020C8, &axi_qos->qosctset0);
1126 writel(0x00000020, &axi_qos->qosreqctr);
1127 writel(0x00002064, &axi_qos->qosthres0);
1128 writel(0x00002004, &axi_qos->qosthres1);
1129 writel(0x00000001, &axi_qos->qosthres2);
1130 writel(0x00000001, &axi_qos->qosqon);
1131
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1132 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1133 writel(0x00000001, &axi_qos->qosconf);
1134 writel(0x000020C8, &axi_qos->qosctset0);
1135 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1136 if (IS_R8A7791_ES2()) {
1137 writel(0x00000001, &axi_qos->qosthres0);
1138 writel(0x00000001, &axi_qos->qosthres1);
1139 } else {
1140 writel(0x00002064, &axi_qos->qosthres0);
1141 writel(0x00002004, &axi_qos->qosthres1);
1142 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1143 writel(0x00000001, &axi_qos->qosthres2);
1144 writel(0x00000001, &axi_qos->qosqon);
1145
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1146 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1147 writel(0x00000001, &axi_qos->qosconf);
1148 writel(0x000020C8, &axi_qos->qosctset0);
1149 writel(0x00000020, &axi_qos->qosreqctr);
1150 writel(0x00002064, &axi_qos->qosthres0);
1151 writel(0x00002004, &axi_qos->qosthres1);
1152 writel(0x00000001, &axi_qos->qosthres2);
1153 writel(0x00000001, &axi_qos->qosqon);
1154
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1155 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1156 writel(0x00000001, &axi_qos->qosconf);
1157 writel(0x000020C8, &axi_qos->qosctset0);
1158 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1159 if (IS_R8A7791_ES2()) {
1160 writel(0x00000001, &axi_qos->qosthres0);
1161 writel(0x00000001, &axi_qos->qosthres1);
1162 } else {
1163 writel(0x00002064, &axi_qos->qosthres0);
1164 writel(0x00002004, &axi_qos->qosthres1);
1165 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1166 writel(0x00000001, &axi_qos->qosthres2);
1167 writel(0x00000001, &axi_qos->qosqon);
1168
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1169 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1170 writel(0x00000001, &axi_qos->qosconf);
1171 writel(0x000020C8, &axi_qos->qosctset0);
1172 writel(0x00000020, &axi_qos->qosreqctr);
1173 writel(0x00002064, &axi_qos->qosthres0);
1174 writel(0x00002004, &axi_qos->qosthres1);
1175 writel(0x00000001, &axi_qos->qosthres2);
1176 writel(0x00000001, &axi_qos->qosqon);
1177
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1178 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1179 writel(0x00000001, &axi_qos->qosconf);
1180 writel(0x000020C8, &axi_qos->qosctset0);
1181 writel(0x00000020, &axi_qos->qosreqctr);
1182 writel(0x00002064, &axi_qos->qosthres0);
1183 writel(0x00002004, &axi_qos->qosthres1);
1184 writel(0x00000001, &axi_qos->qosthres2);
1185 writel(0x00000001, &axi_qos->qosqon);
1186
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1187 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1188 if (IS_R8A7791_ES2())
1189 writel(0x00000003, &axi_qos->qosconf);
1190 else
1191 writel(0x00000000, &axi_qos->qosconf);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1192 writel(0x000020C8, &axi_qos->qosctset0);
1193 writel(0x00002064, &axi_qos->qosthres0);
1194 writel(0x00002004, &axi_qos->qosthres1);
1195 writel(0x00000001, &axi_qos->qosthres2);
1196 writel(0x00000001, &axi_qos->qosqon);
1197
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1198 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1199 if (IS_R8A7791_ES2())
1200 writel(0x00000003, &axi_qos->qosconf);
1201 else
1202 writel(0x00000000, &axi_qos->qosconf);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1203 writel(0x000020C8, &axi_qos->qosctset0);
1204 writel(0x00002064, &axi_qos->qosthres0);
1205 writel(0x00002004, &axi_qos->qosthres1);
1206 writel(0x00000001, &axi_qos->qosthres2);
1207 writel(0x00000001, &axi_qos->qosqon);
1208
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1209 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1210 if (IS_R8A7791_ES2())
1211 writel(0x00000003, &axi_qos->qosconf);
1212 else
1213 writel(0x00000000, &axi_qos->qosconf);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1214 writel(0x000020C8, &axi_qos->qosctset0);
1215 writel(0x00002064, &axi_qos->qosthres0);
1216 writel(0x00002004, &axi_qos->qosthres1);
1217 writel(0x00000001, &axi_qos->qosthres2);
1218 writel(0x00000001, &axi_qos->qosqon);
1219
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1220 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1221 if (IS_R8A7791_ES2())
1222 writel(0x00000003, &axi_qos->qosconf);
1223 else
1224 writel(0x00000000, &axi_qos->qosconf);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1225 writel(0x000020C8, &axi_qos->qosctset0);
1226 writel(0x00002064, &axi_qos->qosthres0);
1227 writel(0x00002004, &axi_qos->qosthres1);
1228 writel(0x00000001, &axi_qos->qosthres2);
1229 writel(0x00000001, &axi_qos->qosqon);
1230
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1231 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1232 if (IS_R8A7791_ES2())
1233 writel(0x00000003, &axi_qos->qosconf);
1234 else
1235 writel(0x00000000, &axi_qos->qosconf);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1236 writel(0x00002063, &axi_qos->qosctset0);
1237 writel(0x00000001, &axi_qos->qosreqctr);
1238 writel(0x00002064, &axi_qos->qosthres0);
1239 writel(0x00002004, &axi_qos->qosthres1);
1240 writel(0x00000001, &axi_qos->qosthres2);
1241 writel(0x00000001, &axi_qos->qosqon);
1242
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1243 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1244 if (IS_R8A7791_ES2())
1245 writel(0x00000000, &axi_qos->qosconf);
1246 else
1247 writel(0x00000000, &axi_qos->qosconf);
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1248 writel(0x00002063, &axi_qos->qosctset0);
1249 writel(0x00000001, &axi_qos->qosreqctr);
1250 writel(0x00002064, &axi_qos->qosthres0);
1251 writel(0x00002004, &axi_qos->qosthres1);
1252 writel(0x00000001, &axi_qos->qosthres2);
1253 writel(0x00000001, &axi_qos->qosqon);
1254
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1255 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1256 writel(0x00000001, &axi_qos->qosconf);
1257 writel(0x00002073, &axi_qos->qosctset0);
1258 writel(0x00000020, &axi_qos->qosreqctr);
1259 writel(0x00002064, &axi_qos->qosthres0);
1260 writel(0x00002004, &axi_qos->qosthres1);
1261 writel(0x00000001, &axi_qos->qosthres2);
1262 writel(0x00000001, &axi_qos->qosqon);
1263
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1264 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1265 writel(0x00000001, &axi_qos->qosconf);
1266 writel(0x00002073, &axi_qos->qosctset0);
1267 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1268 if (IS_R8A7791_ES2()) {
1269 writel(0x00000001, &axi_qos->qosthres0);
1270 writel(0x00000001, &axi_qos->qosthres1);
1271 } else {
1272 writel(0x00002064, &axi_qos->qosthres0);
1273 writel(0x00002004, &axi_qos->qosthres1);
1274 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1275 writel(0x00000001, &axi_qos->qosthres2);
1276 writel(0x00000001, &axi_qos->qosqon);
1277
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1278 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1279 writel(0x00000001, &axi_qos->qosconf);
1280 writel(0x00002073, &axi_qos->qosctset0);
1281 writel(0x00000020, &axi_qos->qosreqctr);
1282 writel(0x00002064, &axi_qos->qosthres0);
1283 writel(0x00002004, &axi_qos->qosthres1);
1284 writel(0x00000001, &axi_qos->qosthres2);
1285 writel(0x00000001, &axi_qos->qosqon);
1286
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1287 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1288 writel(0x00000001, &axi_qos->qosconf);
1289 writel(0x00002073, &axi_qos->qosctset0);
1290 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsu502b92c2014-04-02 11:50:37 +0900[diff] [blame^]1291 if (IS_R8A7791_ES2()) {
1292 writel(0x00000001, &axi_qos->qosthres0);
1293 writel(0x00000001, &axi_qos->qosthres1);
1294 } else {
1295 writel(0x00002064, &axi_qos->qosthres0);
1296 writel(0x00002004, &axi_qos->qosthres1);
1297 }
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1298 writel(0x00000001, &axi_qos->qosthres2);
1299 writel(0x00000001, &axi_qos->qosqon);
1300
Nobuhiro Iwamatsuec9b3862014-03-27 16:18:08 +0900[diff] [blame]1301 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
Nobuhiro Iwamatsu1251e492013-11-21 17:07:46 +0900[diff] [blame]1302 writel(0x00000001, &axi_qos->qosconf);
1303 writel(0x00002073, &axi_qos->qosctset0);
1304 writel(0x00000020, &axi_qos->qosreqctr);
1305 writel(0x00002064, &axi_qos->qosthres0);
1306 writel(0x00002004, &axi_qos->qosthres1);
1307 writel(0x00000001, &axi_qos->qosthres2);
1308 writel(0x00000001, &axi_qos->qosqon);
1309}