blob: 06f7c66dfd53ab6ff12fce298b902fcb2b7bb692 [file] [log] [blame]
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +01001/*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +01005 */
6#ifndef __DRIVERS_MACB_H__
7#define __DRIVERS_MACB_H__
8
9/* MACB register offsets */
10#define MACB_NCR 0x0000
11#define MACB_NCFGR 0x0004
12#define MACB_NSR 0x0008
Bo Shend256be22013-04-24 15:59:28 +080013#define GEM_UR 0x000c
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010014#define MACB_TSR 0x0014
15#define MACB_RBQP 0x0018
16#define MACB_TBQP 0x001c
17#define MACB_RSR 0x0020
18#define MACB_ISR 0x0024
19#define MACB_IER 0x0028
20#define MACB_IDR 0x002c
21#define MACB_IMR 0x0030
22#define MACB_MAN 0x0034
23#define MACB_PTR 0x0038
24#define MACB_PFR 0x003c
25#define MACB_FTO 0x0040
26#define MACB_SCF 0x0044
27#define MACB_MCF 0x0048
28#define MACB_FRO 0x004c
29#define MACB_FCSE 0x0050
30#define MACB_ALE 0x0054
31#define MACB_DTF 0x0058
32#define MACB_LCOL 0x005c
33#define MACB_EXCOL 0x0060
34#define MACB_TUND 0x0064
35#define MACB_CSE 0x0068
36#define MACB_RRE 0x006c
37#define MACB_ROVR 0x0070
38#define MACB_RSE 0x0074
39#define MACB_ELE 0x0078
40#define MACB_RJA 0x007c
41#define MACB_USF 0x0080
42#define MACB_STE 0x0084
43#define MACB_RLE 0x0088
44#define MACB_TPF 0x008c
45#define MACB_HRB 0x0090
46#define MACB_HRT 0x0094
47#define MACB_SA1B 0x0098
48#define MACB_SA1T 0x009c
49#define MACB_SA2B 0x00a0
50#define MACB_SA2T 0x00a4
51#define MACB_SA3B 0x00a8
52#define MACB_SA3T 0x00ac
53#define MACB_SA4B 0x00b0
54#define MACB_SA4T 0x00b4
55#define MACB_TID 0x00b8
56#define MACB_TPQ 0x00bc
57#define MACB_USRIO 0x00c0
58#define MACB_WOL 0x00c4
Bo Shend256be22013-04-24 15:59:28 +080059#define MACB_MID 0x00fc
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010060
Bo Shen32e4f6b2013-09-18 15:07:44 +080061/* GEM specific register offsets */
62#define GEM_DCFG1 0x0280
63
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +010064/* Bitfields in NCR */
65#define MACB_LB_OFFSET 0
66#define MACB_LB_SIZE 1
67#define MACB_LLB_OFFSET 1
68#define MACB_LLB_SIZE 1
69#define MACB_RE_OFFSET 2
70#define MACB_RE_SIZE 1
71#define MACB_TE_OFFSET 3
72#define MACB_TE_SIZE 1
73#define MACB_MPE_OFFSET 4
74#define MACB_MPE_SIZE 1
75#define MACB_CLRSTAT_OFFSET 5
76#define MACB_CLRSTAT_SIZE 1
77#define MACB_INCSTAT_OFFSET 6
78#define MACB_INCSTAT_SIZE 1
79#define MACB_WESTAT_OFFSET 7
80#define MACB_WESTAT_SIZE 1
81#define MACB_BP_OFFSET 8
82#define MACB_BP_SIZE 1
83#define MACB_TSTART_OFFSET 9
84#define MACB_TSTART_SIZE 1
85#define MACB_THALT_OFFSET 10
86#define MACB_THALT_SIZE 1
87#define MACB_NCR_TPF_OFFSET 11
88#define MACB_NCR_TPF_SIZE 1
89#define MACB_TZQ_OFFSET 12
90#define MACB_TZQ_SIZE 1
91
92/* Bitfields in NCFGR */
93#define MACB_SPD_OFFSET 0
94#define MACB_SPD_SIZE 1
95#define MACB_FD_OFFSET 1
96#define MACB_FD_SIZE 1
97#define MACB_BIT_RATE_OFFSET 2
98#define MACB_BIT_RATE_SIZE 1
99#define MACB_JFRAME_OFFSET 3
100#define MACB_JFRAME_SIZE 1
101#define MACB_CAF_OFFSET 4
102#define MACB_CAF_SIZE 1
103#define MACB_NBC_OFFSET 5
104#define MACB_NBC_SIZE 1
105#define MACB_NCFGR_MTI_OFFSET 6
106#define MACB_NCFGR_MTI_SIZE 1
107#define MACB_UNI_OFFSET 7
108#define MACB_UNI_SIZE 1
109#define MACB_BIG_OFFSET 8
110#define MACB_BIG_SIZE 1
111#define MACB_EAE_OFFSET 9
112#define MACB_EAE_SIZE 1
113#define MACB_CLK_OFFSET 10
114#define MACB_CLK_SIZE 2
115#define MACB_RTY_OFFSET 12
116#define MACB_RTY_SIZE 1
117#define MACB_PAE_OFFSET 13
118#define MACB_PAE_SIZE 1
119#define MACB_RBOF_OFFSET 14
120#define MACB_RBOF_SIZE 2
121#define MACB_RLCE_OFFSET 16
122#define MACB_RLCE_SIZE 1
123#define MACB_DRFCS_OFFSET 17
124#define MACB_DRFCS_SIZE 1
125#define MACB_EFRHD_OFFSET 18
126#define MACB_EFRHD_SIZE 1
127#define MACB_IRXFCS_OFFSET 19
128#define MACB_IRXFCS_SIZE 1
129
Bo Shend256be22013-04-24 15:59:28 +0800130#define GEM_GBE_OFFSET 10
131#define GEM_GBE_SIZE 1
132#define GEM_CLK_OFFSET 18
133#define GEM_CLK_SIZE 3
134#define GEM_DBW_OFFSET 21
135#define GEM_DBW_SIZE 2
136
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100137/* Bitfields in NSR */
138#define MACB_NSR_LINK_OFFSET 0
139#define MACB_NSR_LINK_SIZE 1
140#define MACB_MDIO_OFFSET 1
141#define MACB_MDIO_SIZE 1
142#define MACB_IDLE_OFFSET 2
143#define MACB_IDLE_SIZE 1
144
Bo Shend256be22013-04-24 15:59:28 +0800145/* Bitfields in UR */
146#define GEM_RGMII_OFFSET 0
147#define GEM_RGMII_SIZE 1
148
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100149/* Bitfields in TSR */
150#define MACB_UBR_OFFSET 0
151#define MACB_UBR_SIZE 1
152#define MACB_COL_OFFSET 1
153#define MACB_COL_SIZE 1
154#define MACB_TSR_RLE_OFFSET 2
155#define MACB_TSR_RLE_SIZE 1
156#define MACB_TGO_OFFSET 3
157#define MACB_TGO_SIZE 1
158#define MACB_BEX_OFFSET 4
159#define MACB_BEX_SIZE 1
160#define MACB_COMP_OFFSET 5
161#define MACB_COMP_SIZE 1
162#define MACB_UND_OFFSET 6
163#define MACB_UND_SIZE 1
164
165/* Bitfields in RSR */
166#define MACB_BNA_OFFSET 0
167#define MACB_BNA_SIZE 1
168#define MACB_REC_OFFSET 1
169#define MACB_REC_SIZE 1
170#define MACB_OVR_OFFSET 2
171#define MACB_OVR_SIZE 1
172
173/* Bitfields in ISR/IER/IDR/IMR */
174#define MACB_MFD_OFFSET 0
175#define MACB_MFD_SIZE 1
176#define MACB_RCOMP_OFFSET 1
177#define MACB_RCOMP_SIZE 1
178#define MACB_RXUBR_OFFSET 2
179#define MACB_RXUBR_SIZE 1
180#define MACB_TXUBR_OFFSET 3
181#define MACB_TXUBR_SIZE 1
182#define MACB_ISR_TUND_OFFSET 4
183#define MACB_ISR_TUND_SIZE 1
184#define MACB_ISR_RLE_OFFSET 5
185#define MACB_ISR_RLE_SIZE 1
186#define MACB_TXERR_OFFSET 6
187#define MACB_TXERR_SIZE 1
188#define MACB_TCOMP_OFFSET 7
189#define MACB_TCOMP_SIZE 1
190#define MACB_ISR_LINK_OFFSET 9
191#define MACB_ISR_LINK_SIZE 1
192#define MACB_ISR_ROVR_OFFSET 10
193#define MACB_ISR_ROVR_SIZE 1
194#define MACB_HRESP_OFFSET 11
195#define MACB_HRESP_SIZE 1
196#define MACB_PFR_OFFSET 12
197#define MACB_PFR_SIZE 1
198#define MACB_PTZ_OFFSET 13
199#define MACB_PTZ_SIZE 1
200
201/* Bitfields in MAN */
202#define MACB_DATA_OFFSET 0
203#define MACB_DATA_SIZE 16
204#define MACB_CODE_OFFSET 16
205#define MACB_CODE_SIZE 2
206#define MACB_REGA_OFFSET 18
207#define MACB_REGA_SIZE 5
208#define MACB_PHYA_OFFSET 23
209#define MACB_PHYA_SIZE 5
210#define MACB_RW_OFFSET 28
211#define MACB_RW_SIZE 2
212#define MACB_SOF_OFFSET 30
213#define MACB_SOF_SIZE 2
214
215/* Bitfields in USRIO */
216#define MACB_MII_OFFSET 0
217#define MACB_MII_SIZE 1
218#define MACB_EAM_OFFSET 1
219#define MACB_EAM_SIZE 1
220#define MACB_TX_PAUSE_OFFSET 2
221#define MACB_TX_PAUSE_SIZE 1
222#define MACB_TX_PAUSE_ZERO_OFFSET 3
223#define MACB_TX_PAUSE_ZERO_SIZE 1
224
Stelian Pop7263ef12008-01-03 21:15:56 +0000225/* Bitfields in USRIO (AT91) */
226#define MACB_RMII_OFFSET 0
227#define MACB_RMII_SIZE 1
228#define MACB_CLKEN_OFFSET 1
229#define MACB_CLKEN_SIZE 1
230
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100231/* Bitfields in WOL */
232#define MACB_IP_OFFSET 0
233#define MACB_IP_SIZE 16
234#define MACB_MAG_OFFSET 16
235#define MACB_MAG_SIZE 1
236#define MACB_ARP_OFFSET 17
237#define MACB_ARP_SIZE 1
238#define MACB_SA1_OFFSET 18
239#define MACB_SA1_SIZE 1
240#define MACB_WOL_MTI_OFFSET 19
241#define MACB_WOL_MTI_SIZE 1
242
Bo Shend256be22013-04-24 15:59:28 +0800243/* Bitfields in MID */
244#define MACB_IDNUM_OFFSET 16
245#define MACB_IDNUM_SIZE 16
246
247/* Bitfields in DCFG1 */
Bo Shen32e4f6b2013-09-18 15:07:44 +0800248#define GEM_DBWDEF_OFFSET 25
249#define GEM_DBWDEF_SIZE 3
250
251/* constants for data bus width */
252#define GEM_DBW32 0
253#define GEM_DBW64 1
254#define GEM_DBW128 2
255
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100256/* Constants for CLK */
257#define MACB_CLK_DIV8 0
258#define MACB_CLK_DIV16 1
259#define MACB_CLK_DIV32 2
260#define MACB_CLK_DIV64 3
261
Bo Shend256be22013-04-24 15:59:28 +0800262/* GEM specific constants for CLK */
263#define GEM_CLK_DIV8 0
264#define GEM_CLK_DIV16 1
265#define GEM_CLK_DIV32 2
266#define GEM_CLK_DIV48 3
267#define GEM_CLK_DIV64 4
268#define GEM_CLK_DIV96 5
269
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100270/* Constants for MAN register */
271#define MACB_MAN_SOF 1
272#define MACB_MAN_WRITE 1
273#define MACB_MAN_READ 2
274#define MACB_MAN_CODE 2
275
276/* Bit manipulation macros */
277#define MACB_BIT(name) \
278 (1 << MACB_##name##_OFFSET)
Bo Shend256be22013-04-24 15:59:28 +0800279#define MACB_BF(name, value) \
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100280 (((value) & ((1 << MACB_##name##_SIZE) - 1)) \
281 << MACB_##name##_OFFSET)
Bo Shend256be22013-04-24 15:59:28 +0800282#define MACB_BFEXT(name, value)\
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100283 (((value) >> MACB_##name##_OFFSET) \
284 & ((1 << MACB_##name##_SIZE) - 1))
Bo Shend256be22013-04-24 15:59:28 +0800285#define MACB_BFINS(name, value, old) \
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100286 (((old) & ~(((1 << MACB_##name##_SIZE) - 1) \
287 << MACB_##name##_OFFSET)) \
Bo Shend256be22013-04-24 15:59:28 +0800288 | MACB_BF(name, value))
289
290#define GEM_BIT(name) \
291 (1 << GEM_##name##_OFFSET)
292#define GEM_BF(name, value) \
293 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \
294 << GEM_##name##_OFFSET)
295#define GEM_BFEXT(name, value)\
296 (((value) >> GEM_##name##_OFFSET) \
297 & ((1 << GEM_##name##_SIZE) - 1))
298#define GEM_BFINS(name, value, old) \
299 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \
300 << GEM_##name##_OFFSET)) \
301 | GEM_BF(name, value))
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100302
303/* Register access macros */
Bo Shend256be22013-04-24 15:59:28 +0800304#define macb_readl(port, reg) \
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100305 readl((port)->regs + MACB_##reg)
Bo Shend256be22013-04-24 15:59:28 +0800306#define macb_writel(port, reg, value) \
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100307 writel((value), (port)->regs + MACB_##reg)
Bo Shend256be22013-04-24 15:59:28 +0800308#define gem_readl(port, reg) \
309 readl((port)->regs + GEM_##reg)
310#define gem_writel(port, reg, value) \
311 writel((value), (port)->regs + GEM_##reg)
Haavard Skinnemoen5c1fe1f2006-01-20 10:03:34 +0100312
313#endif /* __DRIVERS_MACB_H__ */