Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 1 | /* |
Tom Warren | 8ca79b2 | 2013-03-06 16:16:22 -0700 | [diff] [blame] | 2 | * (C) Copyright 2010-2013 |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 3 | * NVIDIA Corporation <www.nvidia.com> |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Simon Glass | b0e6ef4 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 9 | #include <dm.h> |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 10 | #include <asm/arch/pinmux.h> |
Tom Warren | 8ca79b2 | 2013-03-06 16:16:22 -0700 | [diff] [blame] | 11 | #include <asm/arch/gp_padctrl.h> |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 12 | #include <asm/arch/gpio.h> |
| 13 | #include <asm/gpio.h> |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 14 | #include "pinmux-config-cardhu.h" |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 15 | #include <i2c.h> |
| 16 | |
| 17 | #define PMU_I2C_ADDRESS 0x2D |
| 18 | #define MAX_I2C_RETRY 3 |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 19 | |
| 20 | /* |
| 21 | * Routine: pinmux_init |
| 22 | * Description: Do individual peripheral pinmux configs |
| 23 | */ |
| 24 | void pinmux_init(void) |
| 25 | { |
Stephen Warren | dfb42fc | 2014-03-21 12:28:56 -0600 | [diff] [blame] | 26 | pinmux_config_pingrp_table(tegra3_pinmux_common, |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 27 | ARRAY_SIZE(tegra3_pinmux_common)); |
| 28 | |
Stephen Warren | dfb42fc | 2014-03-21 12:28:56 -0600 | [diff] [blame] | 29 | pinmux_config_pingrp_table(unused_pins_lowpower, |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 30 | ARRAY_SIZE(unused_pins_lowpower)); |
Tom Warren | 8ca79b2 | 2013-03-06 16:16:22 -0700 | [diff] [blame] | 31 | |
| 32 | /* Initialize any non-default pad configs (APB_MISC_GP regs) */ |
Stephen Warren | dfb42fc | 2014-03-21 12:28:56 -0600 | [diff] [blame] | 33 | pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl)); |
Tom Warren | f01b631 | 2012-12-11 13:34:18 +0000 | [diff] [blame] | 34 | } |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 35 | |
Masahiro Yamada | 1d2c050 | 2017-01-10 13:32:07 +0900 | [diff] [blame] | 36 | #if defined(CONFIG_MMC_SDHCI_TEGRA) |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 37 | /* |
| 38 | * Do I2C/PMU writes to bring up SD card bus power |
| 39 | * |
| 40 | */ |
| 41 | void board_sdmmc_voltage_init(void) |
| 42 | { |
Simon Glass | b0e6ef4 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 43 | struct udevice *dev; |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 44 | uchar reg, data_buffer[1]; |
Simon Glass | b0e6ef4 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 45 | int ret; |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 46 | int i; |
| 47 | |
Simon Glass | 25ab4b0 | 2015-01-25 08:26:55 -0700 | [diff] [blame] | 48 | ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); |
Simon Glass | b0e6ef4 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 49 | if (ret) { |
| 50 | debug("%s: Cannot find PMIC I2C chip\n", __func__); |
| 51 | return; |
| 52 | } |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 53 | |
| 54 | /* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */ |
| 55 | data_buffer[0] = 0x65; |
| 56 | reg = 0x32; |
| 57 | |
| 58 | for (i = 0; i < MAX_I2C_RETRY; ++i) { |
Simon Glass | f9a4c2d | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 59 | if (dm_i2c_write(dev, reg, data_buffer, 1)) |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 60 | udelay(100); |
| 61 | } |
| 62 | |
| 63 | /* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */ |
| 64 | data_buffer[0] = 0x09; |
| 65 | reg = 0x67; |
| 66 | |
| 67 | for (i = 0; i < MAX_I2C_RETRY; ++i) { |
Simon Glass | f9a4c2d | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 68 | if (dm_i2c_write(dev, reg, data_buffer, 1)) |
Tom Warren | 190be1f | 2013-02-26 12:26:55 -0700 | [diff] [blame] | 69 | udelay(100); |
| 70 | } |
| 71 | } |
| 72 | |
| 73 | /* |
| 74 | * Routine: pin_mux_mmc |
| 75 | * Description: setup the MMC muxes, power rails, etc. |
| 76 | */ |
| 77 | void pin_mux_mmc(void) |
| 78 | { |
| 79 | /* |
| 80 | * NOTE: We don't do mmc-specific pin muxes here. |
| 81 | * They were done globally in pinmux_init(). |
| 82 | */ |
| 83 | |
| 84 | /* Bring up the SDIO1 power rail */ |
| 85 | board_sdmmc_voltage_init(); |
| 86 | } |
| 87 | #endif /* MMC */ |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 88 | |
| 89 | #ifdef CONFIG_PCI_TEGRA |
| 90 | int tegra_pcie_board_init(void) |
| 91 | { |
| 92 | struct udevice *dev; |
| 93 | u8 addr, data[1]; |
| 94 | int err; |
| 95 | |
Simon Glass | 25ab4b0 | 2015-01-25 08:26:55 -0700 | [diff] [blame] | 96 | err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 97 | if (err) { |
| 98 | debug("failed to find PMU bus\n"); |
| 99 | return err; |
| 100 | } |
| 101 | |
| 102 | /* TPS659110: LDO1_REG = 1.05V, ACTIVE */ |
| 103 | data[0] = 0x15; |
| 104 | addr = 0x30; |
| 105 | |
Simon Glass | f9a4c2d | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 106 | err = dm_i2c_write(dev, addr, data, 1); |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 107 | if (err) { |
| 108 | debug("failed to set VDD supply\n"); |
| 109 | return err; |
| 110 | } |
| 111 | |
| 112 | /* GPIO: PEX = 3.3V */ |
Stephen Warren | 01a97a1 | 2016-05-12 12:07:39 -0600 | [diff] [blame] | 113 | err = gpio_request(TEGRA_GPIO(L, 7), "PEX"); |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 114 | if (err < 0) |
| 115 | return err; |
| 116 | |
Stephen Warren | 01a97a1 | 2016-05-12 12:07:39 -0600 | [diff] [blame] | 117 | gpio_direction_output(TEGRA_GPIO(L, 7), 1); |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 118 | |
| 119 | /* TPS659110: LDO2_REG = 1.05V, ACTIVE */ |
| 120 | data[0] = 0x15; |
| 121 | addr = 0x31; |
| 122 | |
Simon Glass | f9a4c2d | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 123 | err = dm_i2c_write(dev, addr, data, 1); |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 124 | if (err) { |
| 125 | debug("failed to set AVDD supply\n"); |
| 126 | return err; |
| 127 | } |
| 128 | |
| 129 | return 0; |
| 130 | } |
Thierry Reding | 5a2c96a | 2014-12-09 22:25:17 -0700 | [diff] [blame] | 131 | #endif /* PCI */ |