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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
Tom Warren8ca79b22013-03-06 16:16:22 -07002 * (C) Copyright 2010-2013
Tom Warrenf01b6312012-12-11 13:34:18 +00003 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
8#include <common.h>
Simon Glassb0e6ef42014-12-10 08:55:57 -07009#include <dm.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000010#include <asm/arch/pinmux.h>
Tom Warren8ca79b22013-03-06 16:16:22 -070011#include <asm/arch/gp_padctrl.h>
Thierry Reding5a2c96a2014-12-09 22:25:17 -070012#include <asm/arch/gpio.h>
13#include <asm/gpio.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000014#include "pinmux-config-cardhu.h"
Tom Warren190be1f2013-02-26 12:26:55 -070015#include <i2c.h>
16
17#define PMU_I2C_ADDRESS 0x2D
18#define MAX_I2C_RETRY 3
Tom Warrenf01b6312012-12-11 13:34:18 +000019
20/*
21 * Routine: pinmux_init
22 * Description: Do individual peripheral pinmux configs
23 */
24void pinmux_init(void)
25{
Stephen Warrendfb42fc2014-03-21 12:28:56 -060026 pinmux_config_pingrp_table(tegra3_pinmux_common,
Tom Warrenf01b6312012-12-11 13:34:18 +000027 ARRAY_SIZE(tegra3_pinmux_common));
28
Stephen Warrendfb42fc2014-03-21 12:28:56 -060029 pinmux_config_pingrp_table(unused_pins_lowpower,
Tom Warrenf01b6312012-12-11 13:34:18 +000030 ARRAY_SIZE(unused_pins_lowpower));
Tom Warren8ca79b22013-03-06 16:16:22 -070031
32 /* Initialize any non-default pad configs (APB_MISC_GP regs) */
Stephen Warrendfb42fc2014-03-21 12:28:56 -060033 pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
Tom Warrenf01b6312012-12-11 13:34:18 +000034}
Tom Warren190be1f2013-02-26 12:26:55 -070035
Masahiro Yamada1d2c0502017-01-10 13:32:07 +090036#if defined(CONFIG_MMC_SDHCI_TEGRA)
Tom Warren190be1f2013-02-26 12:26:55 -070037/*
38 * Do I2C/PMU writes to bring up SD card bus power
39 *
40 */
41void board_sdmmc_voltage_init(void)
42{
Simon Glassb0e6ef42014-12-10 08:55:57 -070043 struct udevice *dev;
Tom Warren190be1f2013-02-26 12:26:55 -070044 uchar reg, data_buffer[1];
Simon Glassb0e6ef42014-12-10 08:55:57 -070045 int ret;
Tom Warren190be1f2013-02-26 12:26:55 -070046 int i;
47
Simon Glass25ab4b02015-01-25 08:26:55 -070048 ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
Simon Glassb0e6ef42014-12-10 08:55:57 -070049 if (ret) {
50 debug("%s: Cannot find PMIC I2C chip\n", __func__);
51 return;
52 }
Tom Warren190be1f2013-02-26 12:26:55 -070053
54 /* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */
55 data_buffer[0] = 0x65;
56 reg = 0x32;
57
58 for (i = 0; i < MAX_I2C_RETRY; ++i) {
Simon Glassf9a4c2d2015-01-12 18:02:07 -070059 if (dm_i2c_write(dev, reg, data_buffer, 1))
Tom Warren190be1f2013-02-26 12:26:55 -070060 udelay(100);
61 }
62
63 /* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */
64 data_buffer[0] = 0x09;
65 reg = 0x67;
66
67 for (i = 0; i < MAX_I2C_RETRY; ++i) {
Simon Glassf9a4c2d2015-01-12 18:02:07 -070068 if (dm_i2c_write(dev, reg, data_buffer, 1))
Tom Warren190be1f2013-02-26 12:26:55 -070069 udelay(100);
70 }
71}
72
73/*
74 * Routine: pin_mux_mmc
75 * Description: setup the MMC muxes, power rails, etc.
76 */
77void pin_mux_mmc(void)
78{
79 /*
80 * NOTE: We don't do mmc-specific pin muxes here.
81 * They were done globally in pinmux_init().
82 */
83
84 /* Bring up the SDIO1 power rail */
85 board_sdmmc_voltage_init();
86}
87#endif /* MMC */
Thierry Reding5a2c96a2014-12-09 22:25:17 -070088
89#ifdef CONFIG_PCI_TEGRA
90int tegra_pcie_board_init(void)
91{
92 struct udevice *dev;
93 u8 addr, data[1];
94 int err;
95
Simon Glass25ab4b02015-01-25 08:26:55 -070096 err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
Thierry Reding5a2c96a2014-12-09 22:25:17 -070097 if (err) {
98 debug("failed to find PMU bus\n");
99 return err;
100 }
101
102 /* TPS659110: LDO1_REG = 1.05V, ACTIVE */
103 data[0] = 0x15;
104 addr = 0x30;
105
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700106 err = dm_i2c_write(dev, addr, data, 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700107 if (err) {
108 debug("failed to set VDD supply\n");
109 return err;
110 }
111
112 /* GPIO: PEX = 3.3V */
Stephen Warren01a97a12016-05-12 12:07:39 -0600113 err = gpio_request(TEGRA_GPIO(L, 7), "PEX");
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700114 if (err < 0)
115 return err;
116
Stephen Warren01a97a12016-05-12 12:07:39 -0600117 gpio_direction_output(TEGRA_GPIO(L, 7), 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700118
119 /* TPS659110: LDO2_REG = 1.05V, ACTIVE */
120 data[0] = 0x15;
121 addr = 0x31;
122
Simon Glassf9a4c2d2015-01-12 18:02:07 -0700123 err = dm_i2c_write(dev, addr, data, 1);
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700124 if (err) {
125 debug("failed to set AVDD supply\n");
126 return err;
127 }
128
129 return 0;
130}
Thierry Reding5a2c96a2014-12-09 22:25:17 -0700131#endif /* PCI */