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Mike Rapoport36b4e2d2010-12-18 17:43:19 -05001/*
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +00002 * (C) Copyright 2011 CompuLab, Ltd.
Mike Rapoport36b4e2d2010-12-18 17:43:19 -05003 * Mike Rapoport <mike@compulab.co.il>
Igor Grinbergdccd9a02011-04-18 17:48:31 -04004 * Igor Grinberg <grinberg@compulab.co.il>
Mike Rapoport36b4e2d2010-12-18 17:43:19 -05005 *
6 * Based on omap3_beagle.h
7 * (C) Copyright 2006-2008
8 * Texas Instruments.
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <x0khasim@ti.com>
11 *
Igor Grinbergb65a77a2011-04-18 17:55:21 -040012 * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050013 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020014 * SPDX-License-Identifier: GPL-2.0+
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050015 */
16
17#ifndef __CONFIG_H
18#define __CONFIG_H
19
20/*
21 * High Level Configuration Options
22 */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000023#define CONFIG_OMAP /* in a TI OMAP core */
Marek Vasut308252a2012-07-21 05:02:23 +000024#define CONFIG_OMAP_GPIO
Nikita Kiryanov5b28f202013-10-07 17:28:50 +030025#define CONFIG_CMD_GPIO
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000026#define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */
Lokesh Vutla806d2792013-07-30 11:36:30 +053027#define CONFIG_OMAP_COMMON
Nikita Kiryanov623185d2014-12-31 15:00:56 +020028#define CONFIG_SYS_GENERIC_BOARD
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050029
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050030#define CONFIG_SDRC /* The chip has SDRC controller */
31
32#include <asm/arch/cpu.h> /* get chip and board defs */
33#include <asm/arch/omap3.h>
34
35/*
36 * Display CPU and Board information
37 */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000038#define CONFIG_DISPLAY_CPUINFO
39#define CONFIG_DISPLAY_BOARDINFO
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050040
41/* Clock Defines */
42#define V_OSCK 26000000 /* Clock output from T2 */
43#define V_SCLK (V_OSCK >> 1)
44
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050045#define CONFIG_MISC_INIT_R
46
47#define CONFIG_OF_LIBFDT 1
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050048
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000049#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
50#define CONFIG_SETUP_MEMORY_TAGS
51#define CONFIG_INITRD_TAG
52#define CONFIG_REVISION_TAG
Nikita Kiryanov82309252012-01-12 03:26:30 +000053#define CONFIG_SERIAL_TAG
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050054
55/*
56 * Size of malloc() pool
57 */
Igor Grinberg390cdcd2012-05-24 04:01:21 +000058#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000059 /* Sector */
60#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050061
62/*
63 * Hardware drivers
64 */
65
66/*
67 * NS16550 Configuration
68 */
69#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
70
71#define CONFIG_SYS_NS16550
72#define CONFIG_SYS_NS16550_SERIAL
73#define CONFIG_SYS_NS16550_REG_SIZE (-4)
74#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
75
76/*
77 * select serial console configuration
78 */
79#define CONFIG_CONS_INDEX 3
80#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
81#define CONFIG_SERIAL3 3 /* UART3 */
82
83/* allow to overwrite serial and ethaddr */
84#define CONFIG_ENV_OVERWRITE
85#define CONFIG_BAUDRATE 115200
86#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
87 115200}
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000088
89#define CONFIG_GENERIC_MMC
90#define CONFIG_MMC
91#define CONFIG_OMAP_HSMMC
92#define CONFIG_DOS_PARTITION
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050093
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050094/* USB */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000095#define CONFIG_USB_OMAP3
Nikita Kiryanov854a7832012-12-02 13:59:19 +020096#define CONFIG_USB_EHCI
97#define CONFIG_USB_EHCI_OMAP
Nikita Kiryanov854a7832012-12-02 13:59:19 +020098#define CONFIG_USB_STORAGE
99#define CONFIG_MUSB_UDC
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000100#define CONFIG_TWL4030_USB
Nikita Kiryanov854a7832012-12-02 13:59:19 +0200101#define CONFIG_CMD_USB
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500102
103/* USB device configuration */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000104#define CONFIG_USB_DEVICE
105#define CONFIG_USB_TTY
106#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500107
108/* commands to include */
109#include <config_cmd_default.h>
110
111#define CONFIG_CMD_CACHE
112#define CONFIG_CMD_EXT2 /* EXT2 Support */
113#define CONFIG_CMD_FAT /* FAT support */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500114#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
115#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Igor Grinberg0b800a62013-04-22 01:06:55 +0000116#define CONFIG_MTD_PARTITIONS
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000117#define MTDIDS_DEFAULT "nand0=nand"
118#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
Igor Grinberg0b800a62013-04-22 01:06:55 +0000119 "1920k(u-boot),256k(u-boot-env),"\
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000120 "4m(kernel),-(fs)"
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500121
122#define CONFIG_CMD_I2C /* I2C serial bus support */
123#define CONFIG_CMD_MMC /* MMC support */
124#define CONFIG_CMD_NAND /* NAND support */
125#define CONFIG_CMD_DHCP
126#define CONFIG_CMD_PING
127
128#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
129#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
130#undef CONFIG_CMD_IMLS /* List all found images */
131
132#define CONFIG_SYS_NO_FLASH
Heiko Schocher6789e842013-10-22 11:03:18 +0200133#define CONFIG_SYS_I2C
134#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
135#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
136#define CONFIG_SYS_I2C_OMAP34XX
Nikita Kiryanov82309252012-01-12 03:26:30 +0000137#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
138#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
Nikita Kiryanov52658fd2014-08-20 15:08:52 +0300139#define CONFIG_SYS_I2C_EEPROM_BUS 0
Nikita Kiryanov79874ae2012-04-02 02:29:31 +0000140#define CONFIG_I2C_MULTI_BUS
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500141
142/*
143 * TWL4030
144 */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000145#define CONFIG_TWL4030_POWER
146#define CONFIG_TWL4030_LED
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500147
148/*
149 * Board NAND Info.
150 */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000151#define CONFIG_SYS_NAND_QUIET_TEST
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500152#define CONFIG_NAND_OMAP_GPMC
153#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
154 /* to access nand */
155#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
156 /* to access nand at */
157 /* CS0 */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500158#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
159 /* devices */
Stefan Roese7bb6e292014-03-11 17:04:45 +0100160
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500161/* Environment information */
Nikita Kiryanova431be42013-10-07 17:28:49 +0300162#define CONFIG_BOOTDELAY 3
Nikita Kiryanov9bd5c1a2012-12-04 23:28:26 +0000163#define CONFIG_ZERO_BOOTDELAY_CHECK
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500164
165#define CONFIG_EXTRA_ENV_SETTINGS \
166 "loadaddr=0x82000000\0" \
167 "usbtty=cdc_acm\0" \
Nikita Kiryanovf3ef3602013-12-11 18:04:40 +0200168 "console=ttyO2,115200n8\0" \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500169 "mpurate=500\0" \
170 "vram=12M\0" \
171 "dvimode=1024x768MR-16@60\0" \
172 "defaultdisplay=dvi\0" \
173 "mmcdev=0\0" \
174 "mmcroot=/dev/mmcblk0p2 rw\0" \
Igor Grinberg0b800a62013-04-22 01:06:55 +0000175 "mmcrootfstype=ext4 rootwait\0" \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500176 "nandroot=/dev/mtdblock4 rw\0" \
Igor Grinberg0b800a62013-04-22 01:06:55 +0000177 "nandrootfstype=ubifs\0" \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500178 "mmcargs=setenv bootargs console=${console} " \
179 "mpurate=${mpurate} " \
180 "vram=${vram} " \
181 "omapfb.mode=dvi:${dvimode} " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500182 "omapdss.def_disp=${defaultdisplay} " \
183 "root=${mmcroot} " \
184 "rootfstype=${mmcrootfstype}\0" \
185 "nandargs=setenv bootargs console=${console} " \
186 "mpurate=${mpurate} " \
187 "vram=${vram} " \
188 "omapfb.mode=dvi:${dvimode} " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500189 "omapdss.def_disp=${defaultdisplay} " \
190 "root=${nandroot} " \
191 "rootfstype=${nandrootfstype}\0" \
192 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
193 "bootscript=echo Running bootscript from mmc ...; " \
194 "source ${loadaddr}\0" \
195 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
196 "mmcboot=echo Booting from mmc ...; " \
197 "run mmcargs; " \
198 "bootm ${loadaddr}\0" \
199 "nandboot=echo Booting from nand ...; " \
200 "run nandargs; " \
Igor Grinberg0b800a62013-04-22 01:06:55 +0000201 "nand read ${loadaddr} 2a0000 400000; " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500202 "bootm ${loadaddr}\0" \
203
Nikita Kiryanovf3ef3602013-12-11 18:04:40 +0200204#define CONFIG_CMD_BOOTZ
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500205#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +0000206 "mmc dev ${mmcdev}; if mmc rescan; then " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500207 "if run loadbootscript; then " \
208 "run bootscript; " \
209 "else " \
210 "if run loaduimage; then " \
211 "run mmcboot; " \
212 "else run nandboot; " \
213 "fi; " \
214 "fi; " \
215 "else run nandboot; fi"
216
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500217/*
218 * Miscellaneous configurable options
219 */
Igor Grinberg41d7e702011-04-18 17:48:28 -0400220#define CONFIG_AUTO_COMPLETE
221#define CONFIG_CMDLINE_EDITING
222#define CONFIG_TIMESTAMP
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000223#define CONFIG_SYS_AUTOLOAD "no"
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500224#define CONFIG_SYS_LONGHELP /* undef to save memory */
225#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Igor Grinbergb65a77a2011-04-18 17:55:21 -0400226#define CONFIG_SYS_PROMPT "CM-T3x # "
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500227#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
228/* Print Buffer Size */
229#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
230 sizeof(CONFIG_SYS_PROMPT) + 16)
231#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
232/* Boot Argument Buffer Size */
233#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
234
235#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
236 /* works on */
237#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
238 0x01F00000) /* 31MB */
239
240#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
241 /* load address */
242
243/*
244 * OMAP3 has 12 GP timers, they can be driven by the system clock
245 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
246 * This rate is divided by a local divisor.
247 */
248#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
249#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500250
251/*-----------------------------------------------------------------------
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500252 * Physical Memory Map
253 */
254#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */
255#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500256
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500257/*-----------------------------------------------------------------------
258 * FLASH and environment organization
259 */
260
261/* **** PISMO SUPPORT *** */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500262/* Monitor at start of flash */
263#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
Igor Grinberg3530a352012-10-07 01:17:34 +0000264#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500265
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000266#define CONFIG_ENV_IS_IN_NAND
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500267#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400268#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500269#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
270
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500271#if defined(CONFIG_CMD_NET)
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500272#define CONFIG_SMC911X
273#define CONFIG_SMC911X_32_BIT
Igor Grinbergb65a77a2011-04-18 17:55:21 -0400274#define CM_T3X_SMC911X_BASE 0x2C000000
275#define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20))
276#define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500277#endif /* (CONFIG_CMD_NET) */
278
279/* additions for new relocation code, must be added to all boards */
280#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
281#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
282#define CONFIG_SYS_INIT_RAM_SIZE 0x800
283#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
284 CONFIG_SYS_INIT_RAM_SIZE - \
285 GENERATED_GBL_DATA_SIZE)
286
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400287/* Status LED */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000288#define CONFIG_STATUS_LED /* Status LED enabled */
289#define CONFIG_BOARD_SPECIFIC_LED
Igor Grinbergebc18af2013-11-06 16:39:47 +0200290#define CONFIG_GPIO_LED
291#define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */
292#define GREEN_LED_DEV 0
293#define STATUS_LED_BIT GREEN_LED_GPIO
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400294#define STATUS_LED_STATE STATUS_LED_ON
295#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
Igor Grinbergebc18af2013-11-06 16:39:47 +0200296#define STATUS_LED_BOOT GREEN_LED_DEV
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400297
Nikita Kiryanov60e6bdc2013-02-24 06:19:23 +0000298#define CONFIG_SPLASHIMAGE_GUARD
299
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400300/* GPIO banks */
301#ifdef CONFIG_STATUS_LED
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000302#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400303#endif
304
Nikita Kiryanov7878ca52013-01-30 21:39:58 +0000305/* Display Configuration */
306#define CONFIG_OMAP3_GPIO_2
Nikita Kiryanov6f728922013-12-31 12:55:15 +0200307#define CONFIG_OMAP3_GPIO_5
Nikita Kiryanov7878ca52013-01-30 21:39:58 +0000308#define CONFIG_VIDEO_OMAP3
309#define LCD_BPP LCD_COLOR16
310
311#define CONFIG_LCD
Nikita Kiryanovf35034f2012-12-22 21:03:48 +0000312#define CONFIG_SPLASH_SCREEN
Nikita Kiryanovf82eb2f2015-01-14 10:42:54 +0200313#define CONFIG_SPLASH_SOURCE
Nikita Kiryanovf35034f2012-12-22 21:03:48 +0000314#define CONFIG_CMD_BMP
315#define CONFIG_BMP_16BPP
Nikita Kiryanov63c4f172013-10-16 17:23:29 +0300316#define CONFIG_SCF0403_LCD
317
318#define CONFIG_OMAP3_SPI
Nikita Kiryanov7878ca52013-01-30 21:39:58 +0000319
Stefan Roese3e51b7c2013-12-04 13:54:18 +0100320/* Defines for SPL */
Stefan Roese3e51b7c2013-12-04 13:54:18 +0100321#define CONFIG_SPL_FRAMEWORK
322#define CONFIG_SPL_NAND_SIMPLE
323
324#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
325#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
Paul Kocialkowskie2ccdf82014-11-08 23:14:55 +0100326#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET205b4f32014-10-15 17:53:11 +0200327#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Stefan Roese3e51b7c2013-12-04 13:54:18 +0100328
329#define CONFIG_SPL_BOARD_INIT
330#define CONFIG_SPL_LIBCOMMON_SUPPORT
331#define CONFIG_SPL_LIBDISK_SUPPORT
332#define CONFIG_SPL_I2C_SUPPORT
333#define CONFIG_SPL_LIBGENERIC_SUPPORT
334#define CONFIG_SPL_MMC_SUPPORT
335#define CONFIG_SPL_FAT_SUPPORT
336#define CONFIG_SPL_SERIAL_SUPPORT
337#define CONFIG_SPL_NAND_SUPPORT
338#define CONFIG_SPL_NAND_BASE
339#define CONFIG_SPL_NAND_DRIVERS
340#define CONFIG_SPL_NAND_ECC
341#define CONFIG_SPL_GPIO_SUPPORT
342#define CONFIG_SPL_POWER_SUPPORT
343#define CONFIG_SPL_OMAP3_ID_NAND
344#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
345
346/* NAND boot config */
347#define CONFIG_SYS_NAND_5_ADDR_CYCLE
348#define CONFIG_SYS_NAND_PAGE_COUNT 64
349#define CONFIG_SYS_NAND_PAGE_SIZE 2048
350#define CONFIG_SYS_NAND_OOBSIZE 64
351#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
352#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
353/*
354 * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
355 * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
356 */
357#define CONFIG_SYS_NAND_ECCPOS { 1, 2, 3, 4, 5, 6, 7, 8, 9, \
358 10, 11, 12 }
359#define CONFIG_SYS_NAND_ECCSIZE 512
360#define CONFIG_SYS_NAND_ECCBYTES 3
361#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
362
363#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
364#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
365
366#define CONFIG_SPL_TEXT_BASE 0x40200800
367#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
368#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
369
370/*
371 * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
372 * older x-loader implementations. And move the BSS area so that it
373 * doesn't overlap with TEXT_BASE.
374 */
375#define CONFIG_SYS_TEXT_BASE 0x80008000
376#define CONFIG_SPL_BSS_START_ADDR 0x80100000
377#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
378
379#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
380#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
381
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500382#endif /* __CONFIG_H */