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Sandeep Paulraj6ab176d2009-10-10 12:00:47 -04001/*
2 * Copyright (C) 2009 Texas Instruments Incorporated
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -04005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
10/* Spectrum Digital TMS320DM6467 EVM board */
11#define DAVINCI_DM6467EVM
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050012#define CONFIG_SYS_USE_NAND
13#define CONFIG_SYS_NAND_SMALLPAGE
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040014
15#define CONFIG_SKIP_LOWLEVEL_INIT
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040016
17/* SoC Configuration */
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050018
19/* Clock rates detection */
20#ifndef __ASSEMBLY__
21extern unsigned int davinci_arm_clk_get(void);
22#endif
23
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050024/* Arm Clock frequency */
25#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get()
26/* Timer Input clock freq */
27#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040028#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040029#define CONFIG_SOC_DM646X
30
31/* EEPROM definitions for EEPROM */
32#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
33#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
34#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
35#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
36
37/* Memory Info */
38#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040039#define CONFIG_SYS_MEMTEST_START 0x80000000
40#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
41#define CONFIG_NR_DRAM_BANKS 1
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040042#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
43#define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */
44
45/* Linux interfacing */
46#define CONFIG_CMDLINE_TAG
47#define CONFIG_SETUP_MEMORY_TAGS
48#define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */
49#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
Manjunath Hadlib79df8f2011-11-08 08:59:57 -050050#define CONFIG_REVISION_TAG
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040051
52/* Serial Driver info */
53#define CONFIG_SYS_NS16550
54#define CONFIG_SYS_NS16550_SERIAL
55#define CONFIG_SYS_NS16550_REG_SIZE 4
56#define CONFIG_SYS_NS16550_COM1 0x01c20000
57#define CONFIG_SYS_NS16550_CLK 24000000
58#define CONFIG_CONS_INDEX 1
59#define CONFIG_BAUDRATE 115200
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040060
61/* I2C Configuration */
Vitaly Andrianove8459dc2014-04-04 13:16:52 -040062#define CONFIG_SYS_I2C
63#define CONFIG_SYS_I2C_DAVINCI
64#define CONFIG_SYS_DAVINCI_I2C_SPEED 80000
65#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040066
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050067/* Network & Ethernet Configuration */
68#define CONFIG_DRIVER_TI_EMAC
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050069#define CONFIG_MII
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050070#define CONFIG_BOOTP_DNS
71#define CONFIG_BOOTP_DNS2
72#define CONFIG_BOOTP_SEND_HOSTNAME
73#define CONFIG_NET_RETRY_COUNT 10
Sandeep Paulrajb157dd52010-12-28 17:38:22 -050074#define CONFIG_CMD_NET
75
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040076/* Flash & Environment */
77#define CONFIG_SYS_NO_FLASH
78#ifdef CONFIG_SYS_USE_NAND
79#define CONFIG_NAND_DAVINCI
Khoronzhuk, Ivan3e01ed02014-06-07 04:22:52 +030080#define CONFIG_SYS_NAND_MASK_CLE 0x80000
81#define CONFIG_SYS_NAND_MASK_ALE 0x40000
Nick Thompson97f4eb82009-12-12 12:12:26 -050082#define CONFIG_SYS_NAND_CS 2
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040083#undef CONFIG_ENV_IS_IN_FLASH
84#define CONFIG_ENV_IS_IN_NAND
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040085#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
86#define CONFIG_SYS_NAND_BASE_LIST {0x42000000, }
87#define CONFIG_SYS_NAND_HW_ECC
88#define CONFIG_SYS_MAX_NAND_DEVICE 1
89#define CONFIG_ENV_OFFSET 0
90#else
91#define CONFIG_ENV_IS_NOWHERE
92#define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */
93#endif
94
95/* U-Boot general configuration */
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -040096#define CONFIG_BOOTDELAY 3
97#define CONFIG_BOOTFILE "uImage" /* Boot file name */
98#define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */
99#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
100#define CONFIG_SYS_PBSIZE \
101 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
102#define CONFIG_SYS_MAXARGS 16
103#define CONFIG_VERSION_VARIABLE
104#define CONFIG_AUTO_COMPLETE
105#define CONFIG_SYS_HUSH_PARSER
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400106#define CONFIG_CMDLINE_EDITING
107#define CONFIG_SYS_LONGHELP
108#define CONFIG_CRC32_VERIFY
109#define CONFIG_MX_CYCLIC
110#define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm"
111#define CONFIG_BOOTARGS \
112 "mem=120M console=ttyS0,115200n8 " \
113 "root=/dev/hda1 rw noinitrd ip=dhcp"
114
115/* U-Boot commands */
116#include <config_cmd_default.h>
117#define CONFIG_CMD_ASKENV
118#define CONFIG_CMD_DIAG
119#define CONFIG_CMD_I2C
120#define CONFIG_CMD_MII
121#define CONFIG_CMD_SAVES
122#define CONFIG_CMD_EEPROM
Sandeep Paulrajb157dd52010-12-28 17:38:22 -0500123#define CONFIG_CMD_PING
124#define CONFIG_CMD_DHCP
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400125#undef CONFIG_CMD_BDI
126#undef CONFIG_CMD_FPGA
127#undef CONFIG_CMD_SETGETDCR
128#ifdef CONFIG_SYS_USE_NAND
129#undef CONFIG_CMD_FLASH
130#undef CONFIG_CMD_IMLS
131#define CONFIG_CMD_NAND
132#endif
133
Hadli, Manjunath8f5d4682012-02-06 00:30:44 +0000134#ifdef CONFIG_CMD_BDI
135#define CONFIG_CLOCKS
136#endif
137
Sandeep Paulraj8a16f9c2010-12-11 20:38:57 -0500138#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
139
140#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
141#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
142#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
143 CONFIG_SYS_INIT_RAM_SIZE - \
144 GENERATED_GBL_DATA_SIZE)
145
Sandeep Paulraj6ab176d2009-10-10 12:00:47 -0400146#endif /* __CONFIG_H */