blob: ce3ba749243523f610b7c65efb0ddd3e8e8201fb [file] [log] [blame]
Adam Fordf36f8bc2020-05-03 08:11:33 -05001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2020 Compass Electronics Group, LLC
4 */
5
6#ifndef __IMX8MM_BEACON_H
7#define __IMX8MM_BEACON_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
Adam Fordf36f8bc2020-05-03 08:11:33 -050012#define CONFIG_SPL_MAX_SIZE (148 * 1024)
13#define CONFIG_SYS_MONITOR_LEN SZ_512K
14#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
15#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
16#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
17#define CONFIG_SYS_UBOOT_BASE \
18 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
19
20#ifdef CONFIG_SPL_BUILD
21#define CONFIG_SPL_STACK 0x920000
22#define CONFIG_SPL_BSS_START_ADDR 0x910000
23#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
24#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
25#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
26
27/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
28#define CONFIG_MALLOC_F_ADDR 0x930000
29/* For RAW image gives a error info not panic */
30#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
31
32#endif
33
34/* Initial environment variables */
35#define CONFIG_EXTRA_ENV_SETTINGS \
36 "script=boot.scr\0" \
37 "image=Image\0" \
38 "console=ttymxc1,115200\0" \
39 "fdt_addr=0x43000000\0" \
40 "fdt_high=0xffffffffffffffff\0" \
41 "boot_fit=try\0" \
42 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
43 "initrd_addr=0x43800000\0" \
44 "initrd_high=0xffffffffffffffff\0" \
45 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
46 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
47 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
48 "mmcautodetect=yes\0" \
49 "mmcargs=setenv bootargs console=${console},${baudrate}" \
50 " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
51 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
52 " ${script};\0" \
53 "bootscript=echo Running bootscript from mmc ...; " \
54 "source\0" \
55 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
56 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
57 "mmcboot=echo Booting from mmc ...; " \
58 "run finduuid; " \
59 "run mmcargs; " \
60 "if run loadfdt; then " \
61 "booti ${loadaddr} - ${fdt_addr}; " \
62 "else " \
63 "echo WARN: Cannot load the DT; " \
64 "fi; " \
65 "netargs=setenv bootargs console=${console} " \
66 "root=/dev/nfs " \
67 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
68 "netboot=echo Booting from net ...; " \
69 "run netargs; " \
70 "if test ${ip_dyn} = yes; then " \
71 "setenv get_cmd dhcp; " \
72 "else " \
73 "setenv get_cmd tftp; " \
74 "fi; " \
75 "${get_cmd} ${loadaddr} ${image}; " \
76 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
77 "bootm ${loadaddr}; " \
78 "else " \
79 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
80 "booti ${loadaddr} - ${fdt_addr}; " \
81 "else " \
82 "echo WARN: Cannot load the DT; " \
83 "fi; " \
84 "fi;\0"
85
86#define CONFIG_BOOTCOMMAND \
87 "mmc dev ${mmcdev}; if mmc rescan; then " \
88 "if run loadbootscript; then " \
89 "run bootscript; " \
90 "else " \
91 "if run loadimage; then " \
92 "run mmcboot; " \
93 "else run netboot; " \
94 "fi; " \
95 "fi; " \
96 "fi;"
97
98/* Link Definitions */
99#define CONFIG_LOADADDR 0x40480000
100
101#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
102
103#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
104#define CONFIG_SYS_INIT_RAM_SIZE 0x200000
105#define CONFIG_SYS_INIT_SP_OFFSET \
106 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
107#define CONFIG_SYS_INIT_SP_ADDR \
108 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
109
110#define CONFIG_ENV_OVERWRITE
111#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
112
113/* Size of malloc() pool */
114#define CONFIG_SYS_MALLOC_LEN SZ_32M
115
116#define CONFIG_SYS_SDRAM_BASE 0x40000000
117#define PHYS_SDRAM 0x40000000
118#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
119
120#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
121#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
122
123#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
124
125/* Monitor Command Prompt */
126#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
127#define CONFIG_SYS_CBSIZE 2048
128#define CONFIG_SYS_MAXARGS 64
129#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
130#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
131 sizeof(CONFIG_SYS_PROMPT) + 16)
132
133/* USDHC */
134#define CONFIG_SYS_FSL_USDHC_NUM 2
135#define CONFIG_SYS_FSL_ESDHC_ADDR 0
136#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
137
138/* I2C */
139#define CONFIG_SYS_I2C_SPEED 100000
140
141/* FEC*/
142#define CONFIG_ETHPRIME "FEC"
143#define CONFIG_FEC_XCV_TYPE RGMII
144#define CONFIG_FEC_MXC_PHYADDR 0
145#define FEC_QUIRK_ENET_MAC
146#define IMX_FEC_BASE 0x30BE0000
147
148#endif