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Yuantian Tang353f36d2019-04-10 16:43:34 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lu34f39ce2021-06-03 10:51:19 +08003 * Copyright 2019-2021 NXP
Yuantian Tang353f36d2019-04-10 16:43:34 +08004 */
5
6#ifndef __L1028A_COMMON_H
7#define __L1028A_COMMON_H
8
Yuantian Tang353f36d2019-04-10 16:43:34 +08009#include <asm/arch/stream_id_lsch3.h>
10#include <asm/arch/config.h>
11#include <asm/arch/soc.h>
12
13/* Link Definitions */
14#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
15
Yuantian Tang353f36d2019-04-10 16:43:34 +080016#define CONFIG_VERY_BIG_RAM
17#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
18#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
19#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
20#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
21#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
22
Yuantian Tang353f36d2019-04-10 16:43:34 +080023/*
24 * SMP Definitinos
25 */
Michael Walle3d3fe8b2020-06-01 21:53:26 +020026#define CPU_RELEASE_ADDR secondary_boot_addr
Yuantian Tang353f36d2019-04-10 16:43:34 +080027
28/* Generic Timer Definitions */
29#define COUNTER_FREQUENCY 25000000 /* 25MHz */
30
Biwen Li90281f42021-02-05 19:01:57 +080031/* GPIO */
Biwen Li90281f42021-02-05 19:01:57 +080032
Yuantian Tang353f36d2019-04-10 16:43:34 +080033/* I2C */
Yuantian Tang353f36d2019-04-10 16:43:34 +080034
35/* Serial Port */
Yuantian Tang353f36d2019-04-10 16:43:34 +080036#define CONFIG_SYS_NS16550_SERIAL
37#define CONFIG_SYS_NS16550_REG_SIZE 1
38#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
39
Yuantian Tang353f36d2019-04-10 16:43:34 +080040/* Miscellaneous configurable options */
Yuantian Tang353f36d2019-04-10 16:43:34 +080041
42/* Physical Memory Map */
Yuantian Tang353f36d2019-04-10 16:43:34 +080043
44#define CONFIG_HWCONFIG
45#define HWCONFIG_BUFFER_SIZE 128
46
Yuantian Tang353f36d2019-04-10 16:43:34 +080047#define BOOT_TARGET_DEVICES(func) \
48 func(MMC, mmc, 0) \
Yuantian Tang0de19ab2019-11-04 15:10:45 +080049 func(MMC, mmc, 1) \
Yuantian Tang81d9e552020-03-10 11:31:05 +080050 func(USB, usb, 0) \
51 func(DHCP, dhcp, na)
Yuantian Tang353f36d2019-04-10 16:43:34 +080052#include <config_distro_bootcmd.h>
53
Yuantian Tang0de19ab2019-11-04 15:10:45 +080054#define XSPI_NOR_BOOTCOMMAND \
55 "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \
56 "env exists secureboot && esbc_halt;;"
Yuantian Tang353f36d2019-04-10 16:43:34 +080057#define SD_BOOTCOMMAND \
Yuantian Tang0de19ab2019-11-04 15:10:45 +080058 "run sd_hdploadcmd; run distro_bootcmd;run sd_bootcmd; " \
59 "env exists secureboot && esbc_halt;"
60#define SD2_BOOTCOMMAND \
61 "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \
Yuantian Tang353f36d2019-04-10 16:43:34 +080062 "env exists secureboot && esbc_halt;"
63
64/* Monitor Command Prompt */
65#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
66#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
67 sizeof(CONFIG_SYS_PROMPT) + 16)
68#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
69
Yuantian Tang353f36d2019-04-10 16:43:34 +080070#define CONFIG_SYS_MAXARGS 64 /* max command args */
71
72#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
73
Yuantian Tang353f36d2019-04-10 16:43:34 +080074#define OCRAM_NONSECURE_SIZE 0x00010000
Yuantian Tang353f36d2019-04-10 16:43:34 +080075#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
Yuantian Tang353f36d2019-04-10 16:43:34 +080076
Yuantian Tang353f36d2019-04-10 16:43:34 +080077/* I2C bus multiplexer */
78#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
79#define I2C_MUX_CH_DEFAULT 0x8
80
81/* EEPROM */
Yuantian Tang353f36d2019-04-10 16:43:34 +080082#define CONFIG_SYS_I2C_EEPROM_NXID
83#define CONFIG_SYS_EEPROM_BUS_NUM 0
Yuantian Tang353f36d2019-04-10 16:43:34 +080084
Wen Hef76d88b2019-11-18 13:26:09 +080085/* DisplayPort */
86#define DP_PWD_EN_DEFAULT_MASK 0x8
87
Udit Agarwal5536c3c2019-11-07 16:11:32 +000088#ifdef CONFIG_NXP_ESBC
Yuantian Tanga1e126b2019-05-24 14:36:27 +080089#include <asm/fsl_secure_boot.h>
90#endif
91
Yuantian Tang353f36d2019-04-10 16:43:34 +080092#endif /* __L1028A_COMMON_H */