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Pankaj Bansal1eba7232019-02-08 10:29:58 +00001// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * NXP LX2160AQDS device tree source
4 *
5 * Copyright 2018-2019 NXP
6 *
7 */
8
9/dts-v1/;
10
11#include "fsl-lx2160a.dtsi"
12
13/ {
14 model = "NXP Layerscape LX2160AQDS Board";
15 compatible = "fsl,lx2160aqds", "fsl,lx2160a";
Kuldeep Singh4c1a5222020-03-02 16:39:19 +053016 aliases {
17 spi0 = &fspi;
18 };
Pankaj Bansal1eba7232019-02-08 10:29:58 +000019};
20
Yinbo Zhu85e5e212019-05-27 12:17:18 +080021&esdhc0 {
22 status = "okay";
23};
24
25&esdhc1 {
26 status = "okay";
27};
28
Chuanhua Han07cb35f2019-07-10 21:05:13 +080029&i2c0 {
30 status = "okay";
31 u-boot,dm-pre-reloc;
32
33 i2c-mux@77 {
34 compatible = "nxp,pca9547";
35 reg = <0x77>;
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 i2c@3 {
40 #address-cells = <1>;
41 #size-cells = <0>;
42 reg = <0x3>;
43
44 rtc@51 {
45 compatible = "pcf2127-rtc";
46 reg = <0x51>;
47 };
48 };
49 };
50};
51
Kuldeep Singh4c1a5222020-03-02 16:39:19 +053052&fspi {
53 status = "okay";
54
55 mt35xu512aba0: flash@0 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "jedec,spi-nor";
59 spi-max-frequency = <50000000>;
60 reg = <0>;
Kuldeep Singhbd294e42020-03-14 18:23:56 +053061 spi-rx-bus-width = <8>;
62 spi-tx-bus-width = <1>;
Kuldeep Singh4c1a5222020-03-02 16:39:19 +053063 };
64};
65
Peng Mad17eb572019-05-22 02:43:22 +000066&sata0 {
67 status = "okay";
68};
69
70&sata1 {
71 status = "okay";
72};
73
74&sata2 {
75 status = "okay";
76};
77
78&sata3 {
79 status = "okay";
80};