blob: b1623038d08f8393caee4e599c2eeed6a8d60697 [file] [log] [blame]
Joel Johnson9f205d62020-03-23 14:21:32 -06001menu "ClearFog configuration"
2 depends on TARGET_CLEARFOG
3
4config TARGET_CLEARFOG_BASE
5 bool "Use ClearFog Base static configuration"
6 help
7 Use the ClearFog Base as the static configuration instead of the
8 default which uses the ClearFog Pro.
9
10 Runtime board detection is always attempted and used if available. The
11 static configuration is used as a fallback in cases where runtime
12 detection is disabled, is not available in hardware, or otherwise fails.
13
14 Only newer revisions of the ClearFog product line support runtime
15 detection via additional EEPROM hardware. This option enables selecting
16 the Base variant for older hardware revisions.
17
Joel Johnson009d4cf2020-03-23 14:21:34 -060018config CLEARFOG_CON3_SATA
19 bool "Use CON3 slot in SATA mode"
20 help
21 Use the CON3 port with SATA protocol instead of the default PCIe.
22 The ClearFog port allows usage of either mSATA or miniPCIe
23 modules, but the desired protocol must be configured at build
24 time since it affects the SerDes topology layout.
25
26config CLEARFOG_CON2_SATA
27 bool "Use CON2 slot in SATA mode"
28 depends on !TARGET_CLEARFOG_BASE
29 help
30 Use the CON2 port with SATA protocol instead of the default PCIe.
31 The ClearFog port allows usage of either mSATA or miniPCIe
32 modules, but the desired protocol must be configured at build
33 time since it affects the SerDes topology layout.
34
Joel Johnson8a863082020-03-23 14:21:33 -060035config CLEARFOG_SFP_25GB
36 bool "Enable 2.5 Gbps mode for SFP"
37 help
38 Set the SFP module connection to support 2.5 Gbps transfer speed for the
39 SGMII connection (requires a supporting SFP). By default, transfer speed
40 of 1.25 Gbps is used, suitable for a more common 1 Gbps SFP module.
41
Josua Mayer26c7de32024-01-12 14:35:10 +010042choice CLEARFOG_GTR_SERDES0
43 prompt "Select Clearfog GTR SerDes 0 Function"
44 default CLEARFOG_GTR_SERDES0_PCIE
45 help
46 Select function for SerDes 0 which is shared between CON3 and CON18
47 for either pci-e or sata.
48
49config CLEARFOG_GTR_SERDES0_PCIE
50 bool "PCI-E on CON3"
51 help
52 Configure SerDes 0 for PCI-E to enable CON3 mini-PCI-E connector.
53
54config CLEARFOG_GTR_SERDES0_SATA
55 bool "SATA on CON18"
56 help
57 Configure SerDes 0 for SATA to enable CON18 SATA connector.
58
59endchoice
60
Joel Johnsonc5936cc2020-03-23 14:21:38 -060061config ENV_SIZE
62 hex "Environment Size"
63 default 0x10000
64
65config ENV_OFFSET
66 hex "Environment offset"
67 default 0xF0000
68
Joel Johnsonb16d7c32020-03-23 14:21:36 -060069config ENV_SECT_SIZE
70 hex "Environment Sector-Size"
71 # Use SPI flash erase block size of 4 KiB
Dennis Gilmore9c690312020-12-08 21:07:38 -060072 default 0x1000 if MVEBU_SPL_BOOT_DEVICE_SPI || MVEBU_SPL_BOOT_DEVICE_SATA
Joel Johnsonb16d7c32020-03-23 14:21:36 -060073 # Use optimistic 64 KiB erase block, will vary between actual media
Dennis Gilmore9c690312020-12-08 21:07:38 -060074 default 0x10000 if MVEBU_SPL_BOOT_DEVICE_MMC || MVEBU_SPL_BOOT_DEVICE_UART
Joel Johnsonb16d7c32020-03-23 14:21:36 -060075
Joel Johnson9f205d62020-03-23 14:21:32 -060076endmenu