blob: 2015ce9bbcd4561b763504cc8f7e7792d8ce95b0 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk1cb8e982003-03-06 21:55:29 +00002/*
3 * (C) Copyright 2001, 2002, 2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Keith Outwater, keith_outwater@mvis.com`
6 * Steven Scholz, steven.scholz@imc-berlin.de
wdenk1cb8e982003-03-06 21:55:29 +00007 */
8
9/*
10 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
Markus Niebel412921d2014-07-21 11:06:16 +020011 * DS1307 and DS1338/9 Real Time Clock (RTC).
wdenk1cb8e982003-03-06 21:55:29 +000012 *
13 * based on ds1337.c
14 */
15
16#include <common.h>
17#include <command.h>
Chris Packhamd425d602017-04-29 15:20:29 +120018#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060019#include <log.h>
wdenk1cb8e982003-03-06 21:55:29 +000020#include <rtc.h>
21#include <i2c.h>
22
Chris Packhamd425d602017-04-29 15:20:29 +120023enum ds_type {
24 ds_1307,
25 ds_1337,
Chris Packhamf65774e2021-03-03 14:09:44 +130026 ds_1339,
Chris Packhamd425d602017-04-29 15:20:29 +120027 ds_1340,
Heiko Schocher8dd68032019-05-27 08:13:41 +020028 m41t11,
Chris Packhamd425d602017-04-29 15:20:29 +120029 mcp794xx,
30};
wdenk1cb8e982003-03-06 21:55:29 +000031
32/*
33 * RTC register addresses
34 */
35#define RTC_SEC_REG_ADDR 0x00
36#define RTC_MIN_REG_ADDR 0x01
37#define RTC_HR_REG_ADDR 0x02
38#define RTC_DAY_REG_ADDR 0x03
39#define RTC_DATE_REG_ADDR 0x04
40#define RTC_MON_REG_ADDR 0x05
41#define RTC_YR_REG_ADDR 0x06
42#define RTC_CTL_REG_ADDR 0x07
43
44#define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
45
46#define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */
47#define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */
48#define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */
49#define RTC_CTL_BIT_OUT 0x80 /* Output Control */
50
Andy Flemingc79e1c12015-10-21 18:59:06 -050051/* MCP7941X-specific bits */
52#define MCP7941X_BIT_ST 0x80
53#define MCP7941X_BIT_VBATEN 0x08
54
Chris Packhamd425d602017-04-29 15:20:29 +120055#ifndef CONFIG_DM_RTC
56
Chris Packhamd425d602017-04-29 15:20:29 +120057/*---------------------------------------------------------------------*/
58#undef DEBUG_RTC
59
60#ifdef DEBUG_RTC
61#define DEBUGR(fmt, args...) printf(fmt, ##args)
62#else
63#define DEBUGR(fmt, args...)
64#endif
65/*---------------------------------------------------------------------*/
66
67#ifndef CONFIG_SYS_I2C_RTC_ADDR
68# define CONFIG_SYS_I2C_RTC_ADDR 0x68
69#endif
70
71#if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000)
72# error The DS1307 is specified only up to 100kHz!
73#endif
74
wdenk1cb8e982003-03-06 21:55:29 +000075static uchar rtc_read (uchar reg);
76static void rtc_write (uchar reg, uchar val);
wdenk1cb8e982003-03-06 21:55:29 +000077
78/*
79 * Get the current time from the RTC
80 */
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +030081int rtc_get (struct rtc_time *tmp)
wdenk1cb8e982003-03-06 21:55:29 +000082{
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +030083 int rel = 0;
wdenk1cb8e982003-03-06 21:55:29 +000084 uchar sec, min, hour, mday, wday, mon, year;
85
Andy Flemingc79e1c12015-10-21 18:59:06 -050086#ifdef CONFIG_RTC_MCP79411
87read_rtc:
88#endif
wdenk1cb8e982003-03-06 21:55:29 +000089 sec = rtc_read (RTC_SEC_REG_ADDR);
90 min = rtc_read (RTC_MIN_REG_ADDR);
91 hour = rtc_read (RTC_HR_REG_ADDR);
92 wday = rtc_read (RTC_DAY_REG_ADDR);
93 mday = rtc_read (RTC_DATE_REG_ADDR);
94 mon = rtc_read (RTC_MON_REG_ADDR);
95 year = rtc_read (RTC_YR_REG_ADDR);
96
97 DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
98 "hr: %02x min: %02x sec: %02x\n",
99 year, mon, mday, wday, hour, min, sec);
100
Andy Flemingc79e1c12015-10-21 18:59:06 -0500101#ifdef CONFIG_RTC_DS1307
wdenk1cb8e982003-03-06 21:55:29 +0000102 if (sec & RTC_SEC_BIT_CH) {
103 printf ("### Warning: RTC oscillator has stopped\n");
104 /* clear the CH flag */
105 rtc_write (RTC_SEC_REG_ADDR,
106 rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300107 rel = -1;
wdenk1cb8e982003-03-06 21:55:29 +0000108 }
Andy Flemingc79e1c12015-10-21 18:59:06 -0500109#endif
110
111#ifdef CONFIG_RTC_MCP79411
112 /* make sure that the backup battery is enabled */
113 if (!(wday & MCP7941X_BIT_VBATEN)) {
114 rtc_write(RTC_DAY_REG_ADDR,
115 wday | MCP7941X_BIT_VBATEN);
116 }
117
118 /* clock halted? turn it on, so clock can tick. */
119 if (!(sec & MCP7941X_BIT_ST)) {
120 rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST);
121 printf("Started RTC\n");
122 goto read_rtc;
123 }
124#endif
125
wdenk8bde7f72003-06-27 21:31:46 +0000126
wdenk1cb8e982003-03-06 21:55:29 +0000127 tmp->tm_sec = bcd2bin (sec & 0x7F);
128 tmp->tm_min = bcd2bin (min & 0x7F);
129 tmp->tm_hour = bcd2bin (hour & 0x3F);
130 tmp->tm_mday = bcd2bin (mday & 0x3F);
131 tmp->tm_mon = bcd2bin (mon & 0x1F);
132 tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
133 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
134 tmp->tm_yday = 0;
135 tmp->tm_isdst= 0;
136
137 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
138 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
139 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300140
141 return rel;
wdenk1cb8e982003-03-06 21:55:29 +0000142}
143
144
145/*
146 * Set the RTC
147 */
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200148int rtc_set (struct rtc_time *tmp)
wdenk1cb8e982003-03-06 21:55:29 +0000149{
150 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
151 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
152 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
153
154 if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
155 printf("WARNING: year should be between 1970 and 2069!\n");
wdenk8bde7f72003-06-27 21:31:46 +0000156
wdenk1cb8e982003-03-06 21:55:29 +0000157 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
158 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
Andy Flemingc79e1c12015-10-21 18:59:06 -0500159#ifdef CONFIG_RTC_MCP79411
160 rtc_write (RTC_DAY_REG_ADDR,
161 bin2bcd (tmp->tm_wday + 1) | MCP7941X_BIT_VBATEN);
162#else
wdenk1cb8e982003-03-06 21:55:29 +0000163 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
Andy Flemingc79e1c12015-10-21 18:59:06 -0500164#endif
wdenk1cb8e982003-03-06 21:55:29 +0000165 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
166 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
167 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
Andy Flemingc79e1c12015-10-21 18:59:06 -0500168#ifdef CONFIG_RTC_MCP79411
169 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST);
170#else
wdenk1cb8e982003-03-06 21:55:29 +0000171 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
Andy Flemingc79e1c12015-10-21 18:59:06 -0500172#endif
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200173
174 return 0;
wdenk1cb8e982003-03-06 21:55:29 +0000175}
176
177
178/*
wdenk8bde7f72003-06-27 21:31:46 +0000179 * Reset the RTC. We setting the date back to 1970-01-01.
180 * We also enable the oscillator output on the SQW/OUT pin and program
wdenk1cb8e982003-03-06 21:55:29 +0000181 * it for 32,768 Hz output. Note that according to the datasheet, turning
182 * on the square wave output increases the current drain on the backup
183 * battery to something between 480nA and 800nA.
184 */
185void rtc_reset (void)
186{
wdenk1cb8e982003-03-06 21:55:29 +0000187 rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
188 rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0);
wdenk1cb8e982003-03-06 21:55:29 +0000189}
190
191
192/*
193 * Helper functions
194 */
195
196static
197uchar rtc_read (uchar reg)
198{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
wdenk1cb8e982003-03-06 21:55:29 +0000200}
201
202
203static void rtc_write (uchar reg, uchar val)
204{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
wdenk1cb8e982003-03-06 21:55:29 +0000206}
Chris Packhamd425d602017-04-29 15:20:29 +1200207
Chris Packhamd425d602017-04-29 15:20:29 +1200208#endif /* !CONFIG_DM_RTC */
209
210#ifdef CONFIG_DM_RTC
211static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm)
212{
213 int ret;
214 uchar buf[7];
215 enum ds_type type = dev_get_driver_data(dev);
216
217 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
218 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
219 tm->tm_hour, tm->tm_min, tm->tm_sec);
220
221 if (tm->tm_year < 1970 || tm->tm_year > 2069)
222 printf("WARNING: year should be between 1970 and 2069!\n");
223
224 buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100);
225 buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon);
226 buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1);
227 buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday);
228 buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour);
229 buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min);
230 buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec);
231
232 if (type == mcp794xx) {
233 buf[RTC_DAY_REG_ADDR] |= MCP7941X_BIT_VBATEN;
234 buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST;
235 }
236
237 ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
238 if (ret < 0)
239 return ret;
240
241 return 0;
242}
243
244static int ds1307_rtc_get(struct udevice *dev, struct rtc_time *tm)
245{
246 int ret;
247 uchar buf[7];
248 enum ds_type type = dev_get_driver_data(dev);
249
250read_rtc:
251 ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
252 if (ret < 0)
253 return ret;
254
255 if (type == ds_1307) {
256 if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) {
257 printf("### Warning: RTC oscillator has stopped\n");
258 /* clear the CH flag */
259 buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH;
260 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
261 buf[RTC_SEC_REG_ADDR]);
262 return -1;
263 }
264 }
265
Heiko Schocher8dd68032019-05-27 08:13:41 +0200266 if (type == m41t11) {
267 /* clock halted? turn it on, so clock can tick. */
268 if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) {
269 buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH;
270 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
271 MCP7941X_BIT_ST);
272 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
273 buf[RTC_SEC_REG_ADDR]);
274 goto read_rtc;
275 }
276 }
277
Chris Packhamd425d602017-04-29 15:20:29 +1200278 if (type == mcp794xx) {
279 /* make sure that the backup battery is enabled */
280 if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) {
281 dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR,
282 buf[RTC_DAY_REG_ADDR] |
283 MCP7941X_BIT_VBATEN);
284 }
285
286 /* clock halted? turn it on, so clock can tick. */
287 if (!(buf[RTC_SEC_REG_ADDR] & MCP7941X_BIT_ST)) {
288 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
289 MCP7941X_BIT_ST);
290 printf("Started RTC\n");
291 goto read_rtc;
292 }
293 }
294
295 tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
296 tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
297 tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
298 tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
299 tm->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
300 tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) +
301 (bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ?
302 1900 : 2000);
303 tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07);
304 tm->tm_yday = 0;
305 tm->tm_isdst = 0;
306
307 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
308 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
309 tm->tm_hour, tm->tm_min, tm->tm_sec);
310
311 return 0;
312}
313
314static int ds1307_rtc_reset(struct udevice *dev)
315{
316 int ret;
Chris Packhamd425d602017-04-29 15:20:29 +1200317
318 /* clear Clock Halt */
319 ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00);
320 if (ret < 0)
321 return ret;
322 ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
323 RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 |
324 RTC_CTL_BIT_RS0);
325 if (ret < 0)
326 return ret;
327
Chris Packhamd425d602017-04-29 15:20:29 +1200328 return 0;
329}
330
331static int ds1307_probe(struct udevice *dev)
332{
333 i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
334 DM_I2C_CHIP_WR_ADDRESS);
335
336 return 0;
337}
338
339static const struct rtc_ops ds1307_rtc_ops = {
340 .get = ds1307_rtc_get,
341 .set = ds1307_rtc_set,
342 .reset = ds1307_rtc_reset,
343};
344
345static const struct udevice_id ds1307_rtc_ids[] = {
346 { .compatible = "dallas,ds1307", .data = ds_1307 },
347 { .compatible = "dallas,ds1337", .data = ds_1337 },
Chris Packhamf65774e2021-03-03 14:09:44 +1300348 { .compatible = "dallas,ds1339", .data = ds_1339 },
Chris Packhamd425d602017-04-29 15:20:29 +1200349 { .compatible = "dallas,ds1340", .data = ds_1340 },
350 { .compatible = "microchip,mcp7941x", .data = mcp794xx },
Heiko Schocher8dd68032019-05-27 08:13:41 +0200351 { .compatible = "st,m41t11", .data = m41t11 },
Chris Packhamd425d602017-04-29 15:20:29 +1200352 { }
353};
354
355U_BOOT_DRIVER(rtc_ds1307) = {
356 .name = "rtc-ds1307",
357 .id = UCLASS_RTC,
358 .probe = ds1307_probe,
359 .of_match = ds1307_rtc_ids,
360 .ops = &ds1307_rtc_ops,
361};
362#endif /* CONFIG_DM_RTC */