Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | * |
| 5 | * Author: Robert Nelson <robertcnelson@gmail.com> |
| 6 | */ |
| 7 | /dts-v1/; |
| 8 | |
| 9 | #include "am33xx.dtsi" |
| 10 | #include "am335x-osd335x-common.dtsi" |
| 11 | #include <dt-bindings/leds/common.h> |
| 12 | |
| 13 | / { |
| 14 | model = "TI AM335x PocketBeagle"; |
| 15 | compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx"; |
| 16 | |
| 17 | chosen { |
| 18 | stdout-path = &uart0; |
| 19 | }; |
| 20 | |
| 21 | leds { |
| 22 | pinctrl-names = "default"; |
| 23 | pinctrl-0 = <&usr_leds_pins>; |
| 24 | |
| 25 | compatible = "gpio-leds"; |
| 26 | |
| 27 | led-usr0 { |
| 28 | label = "beaglebone:green:usr0"; |
| 29 | color = <LED_COLOR_ID_BLUE>; |
| 30 | function = LED_FUNCTION_HEARTBEAT; |
| 31 | gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; |
| 32 | linux,default-trigger = "heartbeat"; |
| 33 | default-state = "off"; |
| 34 | }; |
| 35 | |
| 36 | led-usr1 { |
| 37 | label = "beaglebone:green:usr1"; |
| 38 | color = <LED_COLOR_ID_BLUE>; |
| 39 | function = LED_FUNCTION_DISK_ACTIVITY; |
| 40 | gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; |
| 41 | linux,default-trigger = "mmc0"; |
| 42 | default-state = "off"; |
| 43 | }; |
| 44 | |
| 45 | led-usr2 { |
| 46 | label = "beaglebone:green:usr2"; |
| 47 | color = <LED_COLOR_ID_BLUE>; |
| 48 | function = LED_FUNCTION_CPU; |
| 49 | gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; |
| 50 | linux,default-trigger = "cpu0"; |
| 51 | default-state = "off"; |
| 52 | }; |
| 53 | |
| 54 | led-usr3 { |
| 55 | label = "beaglebone:green:usr3"; |
| 56 | color = <LED_COLOR_ID_BLUE>; |
| 57 | function = LED_FUNCTION_INDICATOR; |
| 58 | gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; |
| 59 | default-state = "off"; |
| 60 | }; |
| 61 | }; |
| 62 | |
| 63 | vmmcsd_fixed: fixedregulator0 { |
| 64 | compatible = "regulator-fixed"; |
| 65 | regulator-name = "vmmcsd_fixed"; |
| 66 | regulator-min-microvolt = <3300000>; |
| 67 | regulator-max-microvolt = <3300000>; |
| 68 | }; |
| 69 | }; |
| 70 | |
| 71 | &gpio0 { |
| 72 | gpio-line-names = |
| 73 | "NC", |
| 74 | "NC", |
| 75 | "P1.08 [SPI0_CLK]", |
| 76 | "P1.10 [SPI0_MISO]", |
| 77 | "P1.12 [SPI0_MOSI]", |
| 78 | "P1.06 [SPI0_CS]", |
| 79 | "[MMC0_CD]", |
| 80 | "P2.29 [SPI1_CLK]", |
| 81 | "[SYSBOOT 12]", |
| 82 | "[SYSBOOT 13]", |
| 83 | "[SYSBOOT 14]", |
| 84 | "[SYSBOOT 15]", |
| 85 | "P1.26 [I2C2_SDA]", |
| 86 | "P1.28 [I2C2_SCL]", |
| 87 | "P2.11 [I2C1_SDA]", |
| 88 | "P2.09 [I2C1_SCL]", |
| 89 | "NC", |
| 90 | "NC", |
| 91 | "NC", |
| 92 | "P2.31 [SPI1_CS]", |
| 93 | "P1.20 [PRU0.16]", |
| 94 | "NC", |
| 95 | "NC", |
| 96 | "P2.03", |
| 97 | "NC", |
| 98 | "NC", |
| 99 | "P1.34", |
| 100 | "P2.19", |
| 101 | "NC", |
| 102 | "NC", |
| 103 | "P2.05 [UART4_RX]", |
| 104 | "P2.07 [UART4_TX]"; |
| 105 | }; |
| 106 | |
| 107 | &gpio1 { |
| 108 | gpio-line-names = |
| 109 | "NC", |
| 110 | "NC", |
| 111 | "NC", |
| 112 | "NC", |
| 113 | "NC", |
| 114 | "NC", |
| 115 | "NC", |
| 116 | "NC", |
| 117 | "NC", |
| 118 | "P2.25 [SPI1_MOSI]", |
| 119 | "P1.32 [UART0_RX]", |
| 120 | "P1.30 [UART0_TX]", |
| 121 | "P2.24", |
| 122 | "P2.33", |
| 123 | "P2.22", |
| 124 | "P2.18 [PRU0.15i]", |
| 125 | "NC", |
| 126 | "NC", |
| 127 | "P2.01 [PWM1A]", |
| 128 | "NC", |
| 129 | "P2.10", |
| 130 | "[USR LED 0]", |
| 131 | "[USR LED 1]", |
| 132 | "[USR LED 2]", |
| 133 | "[USR LED 3]", |
| 134 | "P2.06", |
| 135 | "P2.04", |
| 136 | "P2.02", |
| 137 | "P2.08", |
| 138 | "NC", |
| 139 | "NC", |
| 140 | "NC"; |
| 141 | }; |
| 142 | |
| 143 | &gpio2 { |
| 144 | gpio-line-names = |
| 145 | "P2.20", |
| 146 | "P2.17", |
| 147 | "NC", |
| 148 | "NC", |
| 149 | "NC", |
| 150 | "[EEPROM_WP]", |
| 151 | "[SYSBOOT 0]", |
| 152 | "[SYSBOOT 1]", |
| 153 | "[SYSBOOT 2]", |
| 154 | "[SYSBOOT 3]", |
| 155 | "[SYSBOOT 4]", |
| 156 | "[SYSBOOT 5]", |
| 157 | "[SYSBOOT 6]", |
| 158 | "[SYSBOOT 7]", |
| 159 | "[SYSBOOT 8]", |
| 160 | "[SYSBOOT 9]", |
| 161 | "[SYSBOOT 10]", |
| 162 | "[SYSBOOT 11]", |
| 163 | "NC", |
| 164 | "NC", |
| 165 | "NC", |
| 166 | "NC", |
| 167 | "P2.35 [AIN5]", |
| 168 | "P1.02 [AIN6]", |
| 169 | "P1.35 [PRU1.10]", |
| 170 | "P1.04 [PRU1.11]", |
| 171 | "[MMC0_DAT3]", |
| 172 | "[MMC0_DAT2]", |
| 173 | "[MMC0_DAT1]", |
| 174 | "[MMC0_DAT0]", |
| 175 | "[MMC0_CLK]", |
| 176 | "[MMC0_CMD]"; |
| 177 | }; |
| 178 | |
| 179 | &gpio3 { |
| 180 | gpio-line-names = |
| 181 | "NC", |
| 182 | "NC", |
| 183 | "NC", |
| 184 | "NC", |
| 185 | "NC", |
| 186 | "[I2C0_SDA]", |
| 187 | "[I2C0_SCL]", |
| 188 | "[JTAG EMU0]", |
| 189 | "[JTAG EMU1]", |
| 190 | "NC", |
| 191 | "NC", |
| 192 | "NC", |
| 193 | "NC", |
| 194 | "P1.03 [USB1]", |
| 195 | "P1.36 [PWM0A]", |
| 196 | "P1.33 [PRU0.1]", |
| 197 | "P2.32 [PRU0.2]", |
| 198 | "P2.30 [PRU0.3]", |
| 199 | "P1.31 [PRU0.4]", |
| 200 | "P2.34 [PRU0.5]", |
| 201 | "P2.28 [PRU0.6]", |
| 202 | "P1.29 [PRU0.7]", |
| 203 | "NC", |
| 204 | "NC", |
| 205 | "NC", |
| 206 | "NC", |
| 207 | "NC", |
| 208 | "NC", |
| 209 | "NC", |
| 210 | "NC", |
| 211 | "NC", |
| 212 | "NC"; |
| 213 | }; |
| 214 | |
| 215 | &am33xx_pinmux { |
| 216 | |
| 217 | compatible = "pinconf-single"; |
| 218 | pinctrl-names = "default"; |
| 219 | |
| 220 | /* P2_03 (ZCZ ball T10) gpio0_23 0x824 PIN 9 */ |
| 221 | P2_03_gpio: P2-03-gpio-pins { |
| 222 | pinctrl-single,pins = < |
| 223 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7) |
| 224 | >; |
| 225 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 226 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 227 | }; |
| 228 | |
| 229 | /* P1_34 (ZCZ ball T11) gpio0_26 0x828 PIN 10 */ |
| 230 | P1_34_gpio: P1-34-gpio-pins { |
| 231 | pinctrl-single,pins = < |
| 232 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE7) |
| 233 | >; |
| 234 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 235 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 236 | }; |
| 237 | |
| 238 | /* P2_19 (ZCZ ball U12) gpio0_27 0x82c PIN 11 */ |
| 239 | P2_19_gpio: P2-19-gpio-pins { |
| 240 | pinctrl-single,pins = < |
| 241 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE7) |
| 242 | >; |
| 243 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 244 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 245 | }; |
| 246 | |
| 247 | /* P2_24 (ZCZ ball T12) gpio1_12 0x830 PIN 12 */ |
| 248 | P2_24_gpio: P2-24-gpio-pins { |
| 249 | pinctrl-single,pins = < |
| 250 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7) |
| 251 | >; |
| 252 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 253 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 254 | }; |
| 255 | |
| 256 | /* P2_33 (ZCZ ball R12) gpio1_13 0x834 PIN 13 */ |
| 257 | P2_33_gpio: P2-33-gpio-pins { |
| 258 | pinctrl-single,pins = < |
| 259 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7) |
| 260 | >; |
| 261 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 262 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 263 | }; |
| 264 | |
| 265 | /* P2_22 (ZCZ ball V13) gpio1_14 0x838 PIN 14 */ |
| 266 | P2_22_gpio: P2-22-gpio-pins { |
| 267 | pinctrl-single,pins = < |
| 268 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7) |
| 269 | >; |
| 270 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 271 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 272 | }; |
| 273 | |
| 274 | /* P2_20 (ZCZ ball T13) gpio2_00 0x888 */ |
| 275 | P2_20_gpio: P2-20-gpio-pins { |
| 276 | pinctrl-single,pins = < |
| 277 | AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE7) |
| 278 | >; |
| 279 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 280 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 281 | }; |
| 282 | |
| 283 | /* P2_10 (ZCZ ball R14) gpio1_20 0x850 PIN 20 */ |
| 284 | P2_10_gpio: P2-10-gpio-pins { |
| 285 | pinctrl-single,pins = < |
| 286 | AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLUP, MUX_MODE7) |
| 287 | >; |
| 288 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 289 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 290 | }; |
| 291 | |
| 292 | /* P2_06 (ZCZ ball U16) gpio1_25 0x864 PIN 25 */ |
| 293 | P2_06_gpio: P2-06-gpio-pins { |
| 294 | pinctrl-single,pins = < |
| 295 | AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7) |
| 296 | >; |
| 297 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 298 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 299 | }; |
| 300 | |
| 301 | /* P2_04 (ZCZ ball T16) gpio1_26 0x868 PIN 26 */ |
| 302 | P2_04_gpio: P2-04-gpio-pins { |
| 303 | pinctrl-single,pins = < |
| 304 | AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLUP, MUX_MODE7) |
| 305 | >; |
| 306 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 307 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 308 | }; |
| 309 | |
| 310 | /* P2_02 (ZCZ ball V17) gpio1_27 0x86c PIN 27 */ |
| 311 | P2_02_gpio: P2-02-gpio-pins { |
| 312 | pinctrl-single,pins = < |
| 313 | AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLUP, MUX_MODE7) |
| 314 | >; |
| 315 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 316 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 317 | }; |
| 318 | |
| 319 | /* P2_08 (ZCZ ball U18) gpio1_28 0x878 PIN 30 */ |
| 320 | P2_08_gpio: P2-08-gpio-pins { |
| 321 | pinctrl-single,pins = < |
| 322 | AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| 323 | >; |
| 324 | pinctrl-single,bias-pullup = < 0x00 0x10 0x00 0x18>; |
| 325 | pinctrl-single,bias-pulldown = < 0x00 0x00 0x10 0x18>; |
| 326 | }; |
| 327 | |
| 328 | /* P2_17 (ZCZ ball V12) gpio2_1 0x88c PIN 35 */ |
| 329 | P2_17_gpio: P2-17-gpio-pins { |
| 330 | pinctrl-single,pins = < |
| 331 | AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE7) |
| 332 | >; |
| 333 | pinctrl-single,bias-pullup = < 0x10 0x10 0x00 0x18>; |
| 334 | pinctrl-single,bias-pulldown = < 0x10 0x00 0x10 0x18>; |
| 335 | }; |
| 336 | |
| 337 | i2c2_pins: pinmux-i2c2-pins { |
| 338 | pinctrl-single,pins = < |
| 339 | AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */ |
| 340 | AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */ |
| 341 | >; |
| 342 | }; |
| 343 | |
| 344 | ehrpwm0_pins: pinmux-ehrpwm0-pins { |
| 345 | pinctrl-single,pins = < |
| 346 | AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */ |
| 347 | >; |
| 348 | }; |
| 349 | |
| 350 | ehrpwm1_pins: pinmux-ehrpwm1-pins { |
| 351 | pinctrl-single,pins = < |
| 352 | AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */ |
| 353 | >; |
| 354 | }; |
| 355 | |
| 356 | mmc0_pins: pinmux-mmc0-pins { |
| 357 | pinctrl-single,pins = < |
| 358 | AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */ |
| 359 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) |
| 360 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) |
| 361 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) |
| 362 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) |
| 363 | AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) |
| 364 | AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| 365 | >; |
| 366 | }; |
| 367 | |
| 368 | spi0_pins: pinmux-spi0-pins { |
| 369 | pinctrl-single,pins = < |
| 370 | AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| 371 | AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) |
| 372 | AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) |
| 373 | AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) |
| 374 | >; |
| 375 | }; |
| 376 | |
| 377 | spi1_pins: pinmux-spi1-pins { |
| 378 | pinctrl-single,pins = < |
| 379 | AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */ |
| 380 | AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */ |
| 381 | AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */ |
| 382 | AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */ |
| 383 | >; |
| 384 | }; |
| 385 | |
| 386 | usr_leds_pins: pinmux-usr-leds-pins { |
| 387 | pinctrl-single,pins = < |
| 388 | AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */ |
| 389 | AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */ |
| 390 | AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */ |
| 391 | AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */ |
| 392 | >; |
| 393 | }; |
| 394 | |
| 395 | uart0_pins: pinmux-uart0-pins { |
| 396 | pinctrl-single,pins = < |
| 397 | AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
| 398 | AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| 399 | >; |
| 400 | }; |
| 401 | |
| 402 | uart4_pins: pinmux-uart4-pins { |
| 403 | pinctrl-single,pins = < |
| 404 | AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */ |
| 405 | AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */ |
| 406 | >; |
| 407 | }; |
| 408 | |
| 409 | pru0_pins: pinmux-pru0-pins { |
| 410 | pinctrl-single,pins = < |
| 411 | AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE5)/* (D14) xdma_event_intr1.pr1_pru0_pru_r31_16 */ |
| 412 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE5)/* (A14) mcasp0_ahclkx.pr1_pru0_pru_r30_7 */ |
| 413 | AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (B12) mcasp0_acklr.pr1_pru0_pru_r30_4 */ |
| 414 | AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (B13) mcasp0_fsx.pr1_pru0_pru_r30_1 */ |
| 415 | AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE6) /* (U13) gpmc_ad15.pr1_pru0_pru_r31_15 */ |
| 416 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (D13) mcasp0_axr1.pr1_pru0_pru_r30_6 */ |
| 417 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE5)/* (C12) mcasp0_ahclkr.pr1_pru0_pru_r30_3 */ |
| 418 | AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (D12) mcasp0_axr0.pr1_pru0_pru_r30_2 */ |
| 419 | AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (C13) mcasp0_fsr.pr1_pru0_pru_r30_5 */ |
| 420 | >; |
| 421 | }; |
| 422 | |
| 423 | pru1_pins: pinmux-pru1-pins { |
| 424 | pinctrl-single,pins = < |
| 425 | AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE5)/*(R6) lcd_ac_bias_en.pr1_pru1_pru_r30_11 */ |
| 426 | AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE5) /* (V5) lcd_pclk.pr1_pru1_pru_r30_10 */ |
| 427 | >; |
| 428 | }; |
| 429 | }; |
| 430 | |
| 431 | &epwmss0 { |
| 432 | status = "okay"; |
| 433 | }; |
| 434 | |
| 435 | &ehrpwm0 { |
| 436 | status = "okay"; |
| 437 | pinctrl-names = "default"; |
| 438 | pinctrl-0 = <&ehrpwm0_pins>; |
| 439 | }; |
| 440 | |
| 441 | &epwmss1 { |
| 442 | status = "okay"; |
| 443 | }; |
| 444 | |
| 445 | &ehrpwm1 { |
| 446 | status = "okay"; |
| 447 | pinctrl-names = "default"; |
| 448 | pinctrl-0 = <&ehrpwm1_pins>; |
| 449 | }; |
| 450 | |
| 451 | &i2c0 { |
| 452 | eeprom: eeprom@50 { |
| 453 | compatible = "atmel,24c256"; |
| 454 | reg = <0x50>; |
| 455 | }; |
| 456 | }; |
| 457 | |
| 458 | &i2c2 { |
| 459 | pinctrl-names = "default"; |
| 460 | pinctrl-0 = <&i2c2_pins>; |
| 461 | |
| 462 | status = "okay"; |
| 463 | clock-frequency = <400000>; |
| 464 | }; |
| 465 | |
| 466 | &mmc1 { |
| 467 | status = "okay"; |
| 468 | vmmc-supply = <&vmmcsd_fixed>; |
| 469 | bus-width = <4>; |
| 470 | pinctrl-names = "default"; |
| 471 | pinctrl-0 = <&mmc0_pins>; |
| 472 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
| 473 | }; |
| 474 | |
| 475 | &rtc { |
| 476 | system-power-controller; |
| 477 | }; |
| 478 | |
| 479 | &tscadc { |
| 480 | status = "okay"; |
| 481 | adc { |
| 482 | ti,adc-channels = <0 1 2 3 4 5 6 7>; |
| 483 | ti,chan-step-avg = <16 16 16 16 16 16 16 16>; |
| 484 | ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>; |
| 485 | ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; |
| 486 | }; |
| 487 | }; |
| 488 | |
| 489 | &uart0 { |
| 490 | pinctrl-names = "default"; |
| 491 | pinctrl-0 = <&uart0_pins>; |
| 492 | |
| 493 | status = "okay"; |
| 494 | }; |
| 495 | |
| 496 | &uart4 { |
| 497 | pinctrl-names = "default"; |
| 498 | pinctrl-0 = <&uart4_pins>; |
| 499 | |
| 500 | status = "okay"; |
| 501 | }; |
| 502 | |
| 503 | &usb0 { |
| 504 | dr_mode = "otg"; |
| 505 | }; |
| 506 | |
| 507 | &usb1 { |
| 508 | dr_mode = "host"; |
| 509 | }; |
| 510 | |
| 511 | &pruss_tm { |
| 512 | status = "okay"; |
| 513 | }; |
| 514 | |
| 515 | &pru0 { |
| 516 | pinctrl-names = "default"; |
| 517 | pinctrl-0 = <&pru0_pins>; |
| 518 | }; |
| 519 | |
| 520 | &pru1 { |
| 521 | pinctrl-names = "default"; |
| 522 | pinctrl-0 = <&pru1_pins>; |
| 523 | }; |