Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | |
| 3 | #include "dt-bindings/clock/bcm63268-clock.h" |
| 4 | #include "dt-bindings/reset/bcm63268-reset.h" |
| 5 | #include "dt-bindings/soc/bcm63268-pm.h" |
| 6 | |
| 7 | / { |
| 8 | #address-cells = <1>; |
| 9 | #size-cells = <1>; |
| 10 | compatible = "brcm,bcm63268"; |
| 11 | |
| 12 | cpus { |
| 13 | #address-cells = <1>; |
| 14 | #size-cells = <0>; |
| 15 | |
| 16 | mips-hpt-frequency = <200000000>; |
| 17 | |
| 18 | cpu@0 { |
| 19 | compatible = "brcm,bmips4350"; |
| 20 | device_type = "cpu"; |
| 21 | reg = <0>; |
| 22 | }; |
| 23 | |
| 24 | cpu@1 { |
| 25 | compatible = "brcm,bmips4350"; |
| 26 | device_type = "cpu"; |
| 27 | reg = <1>; |
| 28 | }; |
| 29 | }; |
| 30 | |
| 31 | clocks { |
| 32 | periph_osc: periph-osc { |
| 33 | compatible = "fixed-clock"; |
| 34 | #clock-cells = <0>; |
| 35 | clock-frequency = <50000000>; |
| 36 | clock-output-names = "periph"; |
| 37 | }; |
| 38 | |
| 39 | hsspi_osc: hsspi-osc { |
| 40 | compatible = "fixed-clock"; |
| 41 | |
| 42 | #clock-cells = <0>; |
| 43 | |
| 44 | clock-frequency = <400000000>; |
| 45 | clock-output-names = "hsspi_osc"; |
| 46 | }; |
| 47 | }; |
| 48 | |
| 49 | aliases { |
| 50 | nflash = &nflash; |
| 51 | serial0 = &uart0; |
| 52 | serial1 = &uart1; |
| 53 | spi0 = &lsspi; |
| 54 | spi1 = &hsspi; |
| 55 | }; |
| 56 | |
| 57 | cpu_intc: interrupt-controller { |
| 58 | #address-cells = <0>; |
| 59 | compatible = "mti,cpu-interrupt-controller"; |
| 60 | |
| 61 | interrupt-controller; |
| 62 | #interrupt-cells = <1>; |
| 63 | }; |
| 64 | |
| 65 | ubus { |
| 66 | #address-cells = <1>; |
| 67 | #size-cells = <1>; |
| 68 | |
| 69 | compatible = "simple-bus"; |
| 70 | ranges; |
| 71 | |
| 72 | periph_clk: clock-controller@10000004 { |
| 73 | compatible = "brcm,bcm63268-clocks"; |
| 74 | reg = <0x10000004 0x4>; |
| 75 | #clock-cells = <1>; |
| 76 | }; |
| 77 | |
| 78 | pll_cntl: syscon@10000008 { |
| 79 | compatible = "syscon"; |
| 80 | reg = <0x10000008 0x4>; |
| 81 | native-endian; |
| 82 | |
| 83 | reboot { |
| 84 | compatible = "syscon-reboot"; |
| 85 | offset = <0x0>; |
| 86 | mask = <0x1>; |
| 87 | }; |
| 88 | }; |
| 89 | |
| 90 | periph_rst: reset-controller@10000010 { |
| 91 | compatible = "brcm,bcm6345-reset"; |
| 92 | reg = <0x10000010 0x4>; |
| 93 | #reset-cells = <1>; |
| 94 | }; |
| 95 | |
| 96 | periph_intc: interrupt-controller@10000020 { |
| 97 | compatible = "brcm,bcm6345-l1-intc"; |
| 98 | reg = <0x10000020 0x20>, |
| 99 | <0x10000040 0x20>; |
| 100 | |
| 101 | interrupt-controller; |
| 102 | #interrupt-cells = <1>; |
| 103 | |
| 104 | interrupt-parent = <&cpu_intc>; |
| 105 | interrupts = <2>, <3>; |
| 106 | }; |
| 107 | |
| 108 | timer-mfd@10000080 { |
| 109 | compatible = "brcm,bcm7038-twd", "simple-mfd", "syscon"; |
| 110 | reg = <0x10000080 0x30>; |
| 111 | ranges = <0x0 0x10000080 0x30>; |
| 112 | #address-cells = <1>; |
| 113 | #size-cells = <1>; |
| 114 | |
| 115 | timer@0 { |
| 116 | compatible = "brcm,bcm6345-timer"; |
| 117 | reg = <0x0 0x1c>; |
| 118 | }; |
| 119 | |
| 120 | wdt: watchdog@1c { |
| 121 | compatible = "brcm,bcm7038-wdt"; |
| 122 | reg = <0x1c 0xc>; |
| 123 | |
| 124 | clocks = <&periph_osc>; |
| 125 | clock-names = "refclk"; |
| 126 | |
| 127 | timeout-sec = <30>; |
| 128 | }; |
| 129 | }; |
| 130 | |
| 131 | uart0: serial@10000180 { |
| 132 | compatible = "brcm,bcm6345-uart"; |
| 133 | reg = <0x10000180 0x18>; |
| 134 | |
| 135 | interrupt-parent = <&periph_intc>; |
| 136 | interrupts = <5>; |
| 137 | |
| 138 | clocks = <&periph_osc>; |
| 139 | clock-names = "refclk"; |
| 140 | |
| 141 | status = "disabled"; |
| 142 | }; |
| 143 | |
| 144 | nflash: nand@10000200 { |
| 145 | #address-cells = <1>; |
| 146 | #size-cells = <0>; |
| 147 | compatible = "brcm,nand-bcm6368", |
| 148 | "brcm,brcmnand-v4.0", |
| 149 | "brcm,brcmnand"; |
| 150 | reg = <0x10000200 0x180>, |
| 151 | <0x10000600 0x200>, |
| 152 | <0x100000b0 0x10>; |
| 153 | reg-names = "nand", |
| 154 | "nand-cache", |
| 155 | "nand-int-base"; |
| 156 | |
| 157 | interrupt-parent = <&periph_intc>; |
| 158 | interrupts = <50>; |
| 159 | |
| 160 | clocks = <&periph_clk BCM63268_CLK_NAND>; |
| 161 | clock-names = "nand"; |
| 162 | |
| 163 | status = "disabled"; |
| 164 | }; |
| 165 | |
| 166 | uart1: serial@100001a0 { |
| 167 | compatible = "brcm,bcm6345-uart"; |
| 168 | reg = <0x100001a0 0x18>; |
| 169 | |
| 170 | interrupt-parent = <&periph_intc>; |
| 171 | interrupts = <34>; |
| 172 | |
| 173 | clocks = <&periph_osc>; |
| 174 | clock-names = "refclk"; |
| 175 | |
| 176 | status = "disabled"; |
| 177 | }; |
| 178 | |
| 179 | lsspi: spi@10000800 { |
| 180 | #address-cells = <1>; |
| 181 | #size-cells = <0>; |
| 182 | compatible = "brcm,bcm6358-spi"; |
| 183 | reg = <0x10000800 0x70c>; |
| 184 | |
| 185 | interrupt-parent = <&periph_intc>; |
| 186 | interrupts = <80>; |
| 187 | |
| 188 | clocks = <&periph_clk BCM63268_CLK_SPI>; |
| 189 | clock-names = "spi"; |
| 190 | |
| 191 | resets = <&periph_rst BCM63268_RST_SPI>; |
| 192 | |
| 193 | status = "disabled"; |
| 194 | }; |
| 195 | |
| 196 | hsspi: spi@10001000 { |
| 197 | #address-cells = <1>; |
| 198 | #size-cells = <0>; |
| 199 | compatible = "brcm,bcm6328-hsspi"; |
| 200 | reg = <0x10001000 0x600>; |
| 201 | |
| 202 | interrupt-parent = <&periph_intc>; |
| 203 | interrupts = <6>; |
| 204 | |
| 205 | clocks = <&periph_clk BCM63268_CLK_HSSPI>, |
| 206 | <&hsspi_osc>; |
| 207 | clock-names = "hsspi", |
| 208 | "pll"; |
| 209 | |
| 210 | resets = <&periph_rst BCM63268_RST_SPI>; |
| 211 | |
| 212 | status = "disabled"; |
| 213 | }; |
| 214 | |
| 215 | periph_pwr: power-controller@1000184c { |
| 216 | compatible = "brcm,bcm6328-power-controller"; |
| 217 | reg = <0x1000184c 0x4>; |
| 218 | #power-domain-cells = <1>; |
| 219 | }; |
| 220 | |
| 221 | leds0: led-controller@10001900 { |
| 222 | #address-cells = <1>; |
| 223 | #size-cells = <0>; |
| 224 | compatible = "brcm,bcm6328-leds"; |
| 225 | reg = <0x10001900 0x24>; |
| 226 | |
| 227 | status = "disabled"; |
| 228 | }; |
| 229 | |
| 230 | ehci: usb@10002500 { |
| 231 | compatible = "brcm,bcm63268-ehci", "generic-ehci"; |
| 232 | reg = <0x10002500 0x100>; |
| 233 | big-endian; |
| 234 | |
| 235 | interrupt-parent = <&periph_intc>; |
| 236 | interrupts = <10>; |
| 237 | |
| 238 | phys = <&usbh 0>; |
| 239 | phy-names = "usb"; |
| 240 | |
| 241 | status = "disabled"; |
| 242 | }; |
| 243 | |
| 244 | ohci: usb@10002600 { |
| 245 | compatible = "brcm,bcm63268-ohci", "generic-ohci"; |
| 246 | reg = <0x10002600 0x100>; |
| 247 | big-endian; |
| 248 | no-big-frame-no; |
| 249 | |
| 250 | interrupt-parent = <&periph_intc>; |
| 251 | interrupts = <9>; |
| 252 | |
| 253 | phys = <&usbh 0>; |
| 254 | phy-names = "usb"; |
| 255 | |
| 256 | status = "disabled"; |
| 257 | }; |
| 258 | |
| 259 | usbh: usb-phy@10002700 { |
| 260 | compatible = "brcm,bcm63268-usbh-phy"; |
| 261 | reg = <0x10002700 0x38>; |
| 262 | #phy-cells = <1>; |
| 263 | |
| 264 | clocks = <&periph_clk BCM63268_CLK_USBH>; |
| 265 | clock-names = "usbh"; |
| 266 | |
| 267 | power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>; |
| 268 | |
| 269 | resets = <&periph_rst BCM63268_RST_USBH>; |
| 270 | reset-names = "usbh"; |
| 271 | |
| 272 | status = "disabled"; |
| 273 | }; |
| 274 | }; |
| 275 | }; |