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wdenk2d1a5372004-02-23 19:30:57 +00001/*
2 * Copyright (C) 2004 IMMS gGmbH <www.imms.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 *
19 * author(s): Thomas Elste, <info@elste.org>
20 * (some parts derived from uCLinux Netarm Ethernet Driver)
21 */
22
23
24#include <common.h>
25#include <command.h>
26#include <net.h>
27#include "netarm_eth.h"
28#include <asm/arch/netarm_registers.h>
29
wdenk2d1a5372004-02-23 19:30:57 +000030static int na_mii_poll_busy (void);
31
32static void na_get_mac_addr (void)
33{
34 unsigned short p[3];
35 char *m_addr;
36 char ethaddr[20];
37
38 m_addr = (char *) p;
39
40 p[0] = (unsigned short) GET_EADDR (NETARM_ETH_SAL_STATION_ADDR_1);
41 p[1] = (unsigned short) GET_EADDR (NETARM_ETH_SAL_STATION_ADDR_2);
42 p[2] = (unsigned short) GET_EADDR (NETARM_ETH_SAL_STATION_ADDR_3);
43
44 sprintf (ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
45 m_addr[0], m_addr[1],
46 m_addr[2], m_addr[3], m_addr[4], m_addr[5]);
47
48 printf ("HW-MAC Address: %s\n", ethaddr);
49
50 /* set env, todo: check if already an adress is set */
51 setenv ("ethaddr", ethaddr);
52}
53
wdenk2d1a5372004-02-23 19:30:57 +000054static void na_mii_write (int reg, int value)
55{
56 int mii_addr;
57
58 /* Select register */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059 mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
wdenk2d1a5372004-02-23 19:30:57 +000060 SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
61 /* Write value */
62 SET_EADDR (NETARM_ETH_MII_WRITE, value);
63 na_mii_poll_busy ();
64}
65
66static unsigned int na_mii_read (int reg)
67{
68 int mii_addr, val;
69
70 /* Select register */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071 mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
wdenk2d1a5372004-02-23 19:30:57 +000072 SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
73 /* do one management cycle */
74 SET_EADDR (NETARM_ETH_MII_CMD,
75 GET_EADDR (NETARM_ETH_MII_CMD) | NETARM_ETH_MIIC_RSTAT);
76 na_mii_poll_busy ();
77 /* Return read value */
78 val = GET_EADDR (NETARM_ETH_MII_READ);
79 return val;
80}
81
82static int na_mii_poll_busy (void)
83{
Graeme Russa60d1e52011-07-15 23:31:37 +000084 ulong start;
wdenk2d1a5372004-02-23 19:30:57 +000085 /* arm simple, non interrupt dependent timer */
Graeme Russa60d1e52011-07-15 23:31:37 +000086 start = get_timer(0));
87 while (get_timer(start) < NA_MII_POLL_BUSY_DELAY) {
wdenk2d1a5372004-02-23 19:30:57 +000088 if (!(GET_EADDR (NETARM_ETH_MII_IND) & NETARM_ETH_MIII_BUSY)) {
89 return 1;
90 }
91 }
92 printf ("na_mii_busy timeout\n");
93 return (0);
94}
95
96static int na_mii_identify_phy (void)
97{
98 int id_reg_a = 0;
99
100 /* get phy id register */
101 id_reg_a = na_mii_read (MII_PHY_ID);
102
103 if (id_reg_a == 0x0043) {
104 /* This must be an Enable or a Lucent LU3X31 PHY chip */
105 return 1;
106 } else if (id_reg_a == 0x0013) {
107 /* it is an Intel LXT971A */
108 return 1;
109 }
110 return (0);
111}
112
113static int na_mii_negotiate (void)
114{
115 int i = 0;
116
117 /* Enable auto-negotiation */
118 na_mii_write (MII_PHY_AUTONEGADV, 0x01e1);
119 /* FIXME: 0x01E1 is 100Mb half and full duplex, 0x0061 is 10Mb only */
120 /* Restart auto-negotiation */
121 na_mii_write (MII_PHY_CONTROL, 0x1200);
122
123 /* status register is 0xffff after setting the autoneg restart bit */
124 while (na_mii_read (MII_PHY_STATUS) == 0xffff) {
125 i++;
126 }
127
128 /* na_mii_read uses the timer already, so we can't use it again for
129 timeout checking.
130 Instead we just try some times.
131 */
132 for (i = 0; i < 40000; i++) {
133 if ((na_mii_read (MII_PHY_STATUS) & 0x0024) == 0x0024) {
134 return 0;
135 }
136 }
137 /*
138 printf("*Warning* autonegotiation timeout, status: 0x%x\n",na_mii_read(MII_PHY_STATUS));
139 */
140 return (1);
141}
142
143static unsigned int na_mii_check_speed (void)
144{
145 unsigned int status;
146
147 /* Read Status register */
148 status = na_mii_read (MII_PHY_STATUS);
149 /* Check link status. If 0, default to 100 Mbps. */
150 if ((status & 0x0004) == 0) {
151 printf ("*Warning* no link detected, set default speed to 100Mbs\n");
152 return 1;
153 } else {
154 if ((na_mii_read (17) & 0x4000) != 0) {
155 printf ("100Mbs link detected\n");
156 return 1;
157 } else {
158 printf ("10Mbs link detected\n");
159 return 0;
160 }
161 }
162 return 0;
163}
164
165static int reset_eth (void)
166{
167 int pt;
Graeme Russa60d1e52011-07-15 23:31:37 +0000168 ulong start;
wdenk2d1a5372004-02-23 19:30:57 +0000169
170 na_get_mac_addr ();
171 pt = na_mii_identify_phy ();
172
173 /* reset the phy */
174 na_mii_write (MII_PHY_CONTROL, 0x8000);
Graeme Russa60d1e52011-07-15 23:31:37 +0000175 start = get_timer(0);
176 while (get_timer(start) < NA_MII_NEGOTIATE_DELAY) {
wdenk2d1a5372004-02-23 19:30:57 +0000177 if ((na_mii_read (MII_PHY_STATUS) & 0x8000) == 0) {
178 break;
179 }
180 }
Graeme Russa60d1e52011-07-15 23:31:37 +0000181 if (get_timer(start) >= NA_MII_NEGOTIATE_DELAY)
wdenk2d1a5372004-02-23 19:30:57 +0000182 printf ("phy reset timeout\n");
183
184 /* set the PCS reg */
185 SET_EADDR (NETARM_ETH_PCS_CFG, NETARM_ETH_PCSC_CLKS_25M |
186 NETARM_ETH_PCSC_ENJAB | NETARM_ETH_PCSC_NOCFR);
187
188 na_mii_negotiate ();
189 na_mii_check_speed ();
190
191 /* Delay 10 millisecond. (Maybe this should be 1 second.) */
192 udelay (10000);
193
194 /* Turn receive on.
195 Enable statistics register autozero on read.
196 Do not insert MAC address on transmit.
197 Do not enable special test modes. */
198 SET_EADDR (NETARM_ETH_STL_CFG,
199 (NETARM_ETH_STLC_AUTOZ | NETARM_ETH_STLC_RXEN));
200
201 /* Set the inter-packet gap delay to 0.96us for MII.
202 The NET+ARM H/W Reference Guide indicates that the Back-to-back IPG
203 Gap Timer Register should be set to 0x15 and the Non Back-to-back IPG
204 Gap Timer Register should be set to 0x00000C12 for the MII PHY. */
205 SET_EADDR (NETARM_ETH_B2B_IPG_GAP_TMR, 0x15);
206 SET_EADDR (NETARM_ETH_NB2B_IPG_GAP_TMR, 0x00000C12);
207
208 /* Add CRC to end of packets.
209 Pad packets to minimum length of 64 bytes.
210 Allow unlimited length transmit packets.
211 Receive all broadcast packets.
212 NOTE: Multicast addressing is NOT enabled here currently. */
213 SET_EADDR (NETARM_ETH_MAC_CFG,
214 (NETARM_ETH_MACC_CRCEN |
215 NETARM_ETH_MACC_PADEN | NETARM_ETH_MACC_HUGEN));
216 SET_EADDR (NETARM_ETH_SAL_FILTER, NETARM_ETH_SALF_BROAD);
217
218 /* enable fifos */
219 SET_EADDR (NETARM_ETH_GEN_CTRL,
220 (NETARM_ETH_GCR_ERX | NETARM_ETH_GCR_ETX));
221
222 return (0);
223}
224
225
226extern int eth_init (bd_t * bd)
227{
228 reset_eth ();
229 return 0;
230}
231
232extern void eth_halt (void)
233{
234 SET_EADDR (NETARM_ETH_GEN_CTRL, 0);
235}
236
237/* Get a data block via Ethernet */
238extern int eth_rx (void)
239{
240 int i;
241 unsigned short rxlen;
242 unsigned int *addr;
243 unsigned int rxstatus, lastrxlen;
244 char *pa;
245
246 /* RXBR is 1, data block was received */
247 if ((GET_EADDR (NETARM_ETH_GEN_STAT) & NETARM_ETH_GST_RXBR) == 0)
248 return 0;
249
250 /* get status register and the length of received block */
251 rxstatus = GET_EADDR (NETARM_ETH_RX_STAT);
252 rxlen = (rxstatus & NETARM_ETH_RXSTAT_SIZE) >> 16;
253
254 if (rxlen == 0)
255 return 0;
256
257 /* clear RXBR to make fifo available */
258 SET_EADDR (NETARM_ETH_GEN_STAT,
259 GET_EADDR (NETARM_ETH_GEN_STAT) & ~NETARM_ETH_GST_RXBR);
260
261 /* clear TXBC to make fifo available */
262 /* According to NETARM50 data manual you just have to clear
263 RXBR but that has no effect. Only after clearing TXBC the
264 Fifo becomes readable. */
265 SET_EADDR (NETARM_ETH_GEN_STAT,
266 GET_EADDR (NETARM_ETH_GEN_STAT) & ~NETARM_ETH_GST_TXBC);
267
268 addr = (unsigned int *) NetRxPackets[0];
269 pa = (char *) NetRxPackets[0];
270
271 /* read the fifo */
272 for (i = 0; i < rxlen / 4; i++) {
273 *addr = GET_EADDR (NETARM_ETH_FIFO_DAT1);
274 addr++;
275 }
276
277 if (GET_EADDR (NETARM_ETH_GEN_STAT) & NETARM_ETH_GST_RXREGR) {
278 /* RXFDB indicates wether the last word is 1,2,3 or 4 bytes long */
279 lastrxlen =
280 (GET_EADDR (NETARM_ETH_GEN_STAT) &
281 NETARM_ETH_GST_RXFDB) >> 28;
282 *addr = GET_EADDR (NETARM_ETH_FIFO_DAT1);
283 switch (lastrxlen) {
284 case 1:
285 *addr &= 0xff000000;
286 break;
287 case 2:
288 *addr &= 0xffff0000;
289 break;
290 case 3:
291 *addr &= 0xffffff00;
292 break;
293 }
294 }
295
296 /* Pass the packet up to the protocol layers. */
297 NetReceive (NetRxPackets[0], rxlen);
298
299 return rxlen;
300}
301
302/* Send a data block via Ethernet. */
303extern int eth_send (volatile void *packet, int length)
304{
305 int i, length32;
306 char *pa;
307 unsigned int *pa32, lastp = 0, rest;
308
309 pa = (char *) packet;
310 pa32 = (unsigned int *) packet;
311 length32 = length / 4;
312 rest = length % 4;
313
314 /* make sure there's no garbage in the last word */
315 switch (rest) {
316 case 0:
317 lastp = pa32[length32];
318 length32--;
319 break;
320 case 1:
321 lastp = pa32[length32] & 0x000000ff;
322 break;
323 case 2:
324 lastp = pa32[length32] & 0x0000ffff;
325 break;
326 case 3:
327 lastp = pa32[length32] & 0x00ffffff;
328 break;
329 }
330
331 /* write to the fifo */
332 for (i = 0; i < length32; i++)
333 SET_EADDR (NETARM_ETH_FIFO_DAT1, pa32[i]);
334
335 /* the last word is written to an extra register, this
336 starts the transmission */
337 SET_EADDR (NETARM_ETH_FIFO_DAT2, lastp);
338
339 /* NETARM_ETH_TXSTAT_TXOK should be checked, to know if the transmission
340 went fine. But we can't use the timer for a timeout loop because
341 of it is used already in upper layers. So we just try some times. */
342 i = 0;
343 while (i < 50000) {
344 if ((GET_EADDR (NETARM_ETH_TX_STAT) & NETARM_ETH_TXSTAT_TXOK)
345 == NETARM_ETH_TXSTAT_TXOK)
346 return 0;
347 i++;
348 }
349
350 printf ("eth_send timeout\n");
351 return 1;
352}