blob: 78128c64139b685626f0b39d175d66142a00d4ea [file] [log] [blame]
Macpaul Linf8ea15f2011-01-05 17:12:23 +08001/*
2 * (C) Copyright 2009 Faraday Technology
3 * Po-Yu Chuang <ratbert@faraday-tech.com>
4 *
5 * Copyright (C) 2010 Andes Technology Corporation
6 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
7 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Macpaul Linf8ea15f2011-01-05 17:12:23 +080010 */
11
12#include <common.h>
13#include <asm/io.h>
Po-Yu Chuangd6150db2011-02-17 19:34:07 +000014#include <faraday/ftpmu010.h>
Macpaul Linf8ea15f2011-01-05 17:12:23 +080015
Macpaul Lincaddb8e2011-03-20 23:44:06 +000016/* OSCC: OSC Control Register */
Macpaul Linf8ea15f2011-01-05 17:12:23 +080017void ftpmu010_32768osc_enable(void)
18{
Macpaul Lincaddb8e2011-03-20 23:44:06 +000019 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
Macpaul Linf8ea15f2011-01-05 17:12:23 +080020 unsigned int oscc;
21
22 /* enable the 32768Hz oscillator */
23 oscc = readl(&pmu->OSCC);
24 oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI);
25 writel(oscc, &pmu->OSCC);
26
27 /* wait until ready */
28 while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE))
29 ;
30
31 /* select 32768Hz oscillator */
32 oscc = readl(&pmu->OSCC);
33 oscc |= FTPMU010_OSCC_OSCL_RTCLSEL;
34 writel(oscc, &pmu->OSCC);
35}
36
Macpaul Lincaddb8e2011-03-20 23:44:06 +000037/* MFPSR: Multi-Function Port Setting Register */
38void ftpmu010_mfpsr_select_dev(unsigned int dev)
39{
40 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
41 unsigned int mfpsr;
42
43 mfpsr = readl(&pmu->MFPSR);
44 mfpsr |= dev;
45 writel(mfpsr, &pmu->MFPSR);
46}
47
48void ftpmu010_mfpsr_diselect_dev(unsigned int dev)
49{
50 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
51 unsigned int mfpsr;
52
53 mfpsr = readl(&pmu->MFPSR);
54 mfpsr &= ~dev;
55 writel(mfpsr, &pmu->MFPSR);
56}
57
58/* PDLLCR0: PLL/DLL Control Register 0 */
Macpaul Linf8ea15f2011-01-05 17:12:23 +080059void ftpmu010_dlldis_disable(void)
60{
Macpaul Lincaddb8e2011-03-20 23:44:06 +000061 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
Macpaul Linf8ea15f2011-01-05 17:12:23 +080062 unsigned int pdllcr0;
63
64 pdllcr0 = readl(&pmu->PDLLCR0);
65 pdllcr0 |= FTPMU010_PDLLCR0_DLLDIS;
66 writel(pdllcr0, &pmu->PDLLCR0);
67}
68
69void ftpmu010_sdram_clk_disable(unsigned int cr0)
70{
Macpaul Lincaddb8e2011-03-20 23:44:06 +000071 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
Macpaul Linf8ea15f2011-01-05 17:12:23 +080072 unsigned int pdllcr0;
73
74 pdllcr0 = readl(&pmu->PDLLCR0);
75 pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0);
76 writel(pdllcr0, &pmu->PDLLCR0);
77}
Macpaul Lincaddb8e2011-03-20 23:44:06 +000078
79/* SDRAMHTC: SDRAM Signal Hold Time Control */
80void ftpmu010_sdramhtc_set(unsigned int val)
81{
82 static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE;
83 unsigned int sdramhtc;
84
85 sdramhtc = readl(&pmu->SDRAMHTC);
86 sdramhtc |= val;
87 writel(sdramhtc, &pmu->SDRAMHTC);
88}