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Bin Meng86f60a42019-07-18 00:34:31 -07001.. SPDX-License-Identifier: GPL-2.0+
2
3M68K / ColdFire
4===============
5
6History
7-------
Angelo Dureghello0e685052023-04-05 01:19:03 +02008* November 02, 2017 Angelo Dureghello <angelo@kernel-space.org>
Bin Meng86f60a42019-07-18 00:34:31 -07009* August 08, 2005 Jens Scharsig <esw@bus-elektronik.de>
10 MCF5282 implementation without preloader
11* January 12, 2004 <josef.baumgartner@telex.de>
12
13This file contains status information for the port of U-Boot to the
14Motorola ColdFire series of CPUs.
15
16Overview
17--------
18
19The ColdFire instruction set is "assembly source" compatible but an evolution
20of the original 68000 instruction set. Some not much used instructions has
21been removed. The instructions are only 16, 32, or 48 bits long, a
22simplification compared to the 68000 series.
23
24Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola ColdFire architecture.
25The patches of Bernhard support the MCF5272 and MCF5282. A great disadvantage
26of these patches was that they needed a pre-bootloader to start U-Boot.
27Because of this, a new port was created which no longer needs a first stage
28booter.
29
30Thanks mainly to Freescale but also to several other contributors, U-Boot now
31supports nearly the entire range of ColdFire processors and their related
32development boards.
33
34
35Supported CPU families
36----------------------
37
Tom Riniee67ec92020-05-26 14:36:53 -040038Please "make menuconfig" and select "m68k" or check arch/m68k/cpu to see the
Bin Meng86f60a42019-07-18 00:34:31 -070039currently supported processor and families.
40
41
42Supported boards
43----------------
44
45U-Boot supports actually more than 40 ColdFire based boards.
46Board configuration can be done trough include/configs/<boardname>.h but the
47current recommended method is to use the new and more friendly approach as
48the "make menuconfig" way, very similar to the Linux way.
49
50To know details as memory map, build targets, default setup, etc, of a
51specific board please check:
52
53* include/configs/<boardname>.h
54
55and/or
56
57* configs/<boardname>_defconfig
58
59It is possible to build all ColdFire boards in a single command-line command,
60from u-boot root directory, as::
61
62 ./tools/buildman/buildman m68k
63
64Build U-Boot for a specific board
65^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
66
67A bash script similar to the one below may be used:
68
69.. code-block:: shell
70
71 #!/bin/bash
72
73 export CROSS_COMPILE=/opt/toolchains/m68k/gcc-4.9.0-nolibc/bin/m68k-linux-
74
Tom Rini9b7993b2021-05-14 21:34:10 -040075 board=M5249EVB
Bin Meng86f60a42019-07-18 00:34:31 -070076
77 make distclean
Tom Riniee67ec92020-05-26 14:36:53 -040078 make ${board}_defconfig
79 make KBUILD_VERBOSE=1
Bin Meng86f60a42019-07-18 00:34:31 -070080
81
82Adopted toolchains
83------------------
84
85Please check:
86https://www.denx.de/wiki/U-Boot/ColdFireNotes
87
88
89ColdFire specific configuration options/settings
90------------------------------------------------
91
92Configuration to use a pre-loader
93^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
94
95If U-Boot should be loaded to RAM and started by a pre-loader
Tom Rinie52fca22022-12-02 16:42:36 -050096CONFIG_MONITOR_IS_IN_RAM must be enabled. If it is enabled the
Bin Meng86f60a42019-07-18 00:34:31 -070097initial vector table and basic processor initialization will not
98be compiled in. The start address of U-Boot must be adjusted in
Tom Rinie52fca22022-12-02 16:42:36 -050099the boards defconfig file (CONFIG_SYS_MONITOR_BASE) and Makefile
Simon Glass98463902022-10-20 18:22:39 -0600100(CONFIG_TEXT_BASE) to the load address.
Bin Meng86f60a42019-07-18 00:34:31 -0700101
102ColdFire CPU specific options/settings
103^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
104
105To specify a CPU model, some defines shoudl be used, i.e.:
106
107CONFIG_MCF52x2:
108 defined for all MCF52x2 CPUs
109CONFIG_M5272:
110 defined for all Motorola MCF5272 CPUs
111
112Other options, generally set inside include/configs/<boardname>.h, they may
113apply to one or more cpu for the ColdFire family:
114
Tom Rini65cc0e22022-11-16 13:10:41 -0500115CFG_SYS_MBAR:
Bin Meng86f60a42019-07-18 00:34:31 -0700116 defines the base address of the MCF5272 configuration registers
Tom Rini65cc0e22022-11-16 13:10:41 -0500117CFG_SYS_SCR:
Bin Meng86f60a42019-07-18 00:34:31 -0700118 defines the contents of the System Configuration Register
Tom Rini65cc0e22022-11-16 13:10:41 -0500119CFG_SYS_SPR:
Bin Meng86f60a42019-07-18 00:34:31 -0700120 defines the contents of the System Protection Register
Tom Rini65cc0e22022-11-16 13:10:41 -0500121CFG_SYS_MFD:
Bin Meng86f60a42019-07-18 00:34:31 -0700122 defines the PLL Multiplication Factor Divider
123 (see table 9-4 of MCF user manual)
Tom Rini65cc0e22022-11-16 13:10:41 -0500124CFG_SYS_RFD:
Bin Meng86f60a42019-07-18 00:34:31 -0700125 defines the PLL Reduce Frequency Devider
126 (see table 9-4 of MCF user manual)
127CONFIG_SYS_CSx_BASE:
128 defines the base address of chip select x
129CONFIG_SYS_CSx_SIZE:
130 defines the memory size (address range) of chip select x
131CONFIG_SYS_CSx_WIDTH:
132 defines the bus with of chip select x
133CONFIG_SYS_CSx_MASK:
134 defines the mask for the related chip select x
135CONFIG_SYS_CSx_RO:
136 if set to 0 chip select x is read/write else chip select is read only
137CONFIG_SYS_CSx_WS:
138 defines the number of wait states of chip select x
Tom Rini65cc0e22022-11-16 13:10:41 -0500139CFG_SYS_CACHE_ICACR:
Bin Meng86f60a42019-07-18 00:34:31 -0700140 cache-related registers config
Tom Rini65cc0e22022-11-16 13:10:41 -0500141CFG_SYS_CACHE_DCACR:
Bin Meng86f60a42019-07-18 00:34:31 -0700142 cache-related registers config
143CONFIG_SYS_CACHE_ACRX:
144 cache-related registers config
Tom Riniaa6e94d2022-11-16 13:10:37 -0500145CFG_SYS_SDRAM_BASE:
Bin Meng86f60a42019-07-18 00:34:31 -0700146 SDRAM config for SDRAM controller-specific registers
Tom Riniaa6e94d2022-11-16 13:10:37 -0500147CFG_SYS_SDRAM_SIZE:
Bin Meng86f60a42019-07-18 00:34:31 -0700148 SDRAM config for SDRAM controller-specific registers
Tom Riniaa6e94d2022-11-16 13:10:37 -0500149CFG_SYS_SDRAM_BASEX:
Bin Meng86f60a42019-07-18 00:34:31 -0700150 SDRAM config for SDRAM controller-specific registers
Tom Riniaa6e94d2022-11-16 13:10:37 -0500151CFG_SYS_SDRAM_CFG1:
Bin Meng86f60a42019-07-18 00:34:31 -0700152 SDRAM config for SDRAM controller-specific registers
Tom Riniaa6e94d2022-11-16 13:10:37 -0500153CFG_SYS_SDRAM_CFG2:
Bin Meng86f60a42019-07-18 00:34:31 -0700154 SDRAM config for SDRAM controller-specific registers
Tom Riniaa6e94d2022-11-16 13:10:37 -0500155CFG_SYS_SDRAM_CTRL:
Bin Meng86f60a42019-07-18 00:34:31 -0700156 SDRAM config for SDRAM controller-specific registers
Tom Riniaa6e94d2022-11-16 13:10:37 -0500157CFG_SYS_SDRAM_MODE:
Bin Meng86f60a42019-07-18 00:34:31 -0700158 SDRAM config for SDRAM controller-specific registers
Tom Riniaa6e94d2022-11-16 13:10:37 -0500159CFG_SYS_SDRAM_EMOD:
Bin Meng86f60a42019-07-18 00:34:31 -0700160 SDRAM config for SDRAM controller-specific registers, please
161 see arch/m68k/cpu/<specific_cpu>/start.S files to see how
162 these options are used.
163CONFIG_MCFUART:
164 defines enabling of ColdFire UART driver
Tom Rini65cc0e22022-11-16 13:10:41 -0500165CFG_SYS_UART_PORT:
Bin Meng86f60a42019-07-18 00:34:31 -0700166 defines the UART port to be used (only a single UART can be actually enabled)
Tom Rini65cc0e22022-11-16 13:10:41 -0500167CFG_SYS_SBFHDR_SIZE:
Bin Meng86f60a42019-07-18 00:34:31 -0700168 size of the prepended SBF header, if any