blob: ae2d9386fc8544b7ddf07297e8c3df56dbbe8eab [file] [log] [blame]
Andrew Davis54efeef2023-04-11 13:24:57 -05001// SPDX-License-Identifier: GPL-2.0-only
Tom Rini708ca4d2017-05-16 14:46:38 -04002
3#include <dt-bindings/gpio/gpio.h>
4#include <dt-bindings/pinctrl/omap.h>
5
6/ {
7 compatible = "ti,dm816";
8 interrupt-parent = <&intc>;
9 #address-cells = <1>;
10 #size-cells = <1>;
11 chosen { };
12
13 aliases {
14 i2c0 = &i2c1;
15 i2c1 = &i2c2;
16 serial0 = &uart1;
17 serial1 = &uart2;
18 serial2 = &uart3;
19 ethernet0 = &eth0;
20 ethernet1 = &eth1;
21 };
22
23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
26 cpu@0 {
27 compatible = "arm,cortex-a8";
28 device_type = "cpu";
29 reg = <0>;
30 };
31 };
32
33 pmu {
34 compatible = "arm,cortex-a8-pmu";
35 interrupts = <3>;
36 };
37
38 /*
39 * The soc node represents the soc top level view. It is used for IPs
40 * that are not memory mapped in the MPU view or for the MPU itself.
41 */
42 soc {
43 compatible = "ti,omap-infra";
44 mpu {
45 compatible = "ti,omap3-mpu";
46 ti,hwmods = "mpu";
47 };
48 };
49
50 /*
51 * XXX: Use a flat representation of the dm816x interconnect.
52 * The real dm816x interconnect network is quite complex. Since
53 * it will not bring real advantage to represent that in DT
54 * for the moment, just use a fake OCP bus entry to represent
55 * the whole bus hierarchy.
56 */
57 ocp {
58 compatible = "simple-bus";
59 reg = <0x44000000 0x10000>;
60 interrupts = <9 10>;
61 #address-cells = <1>;
62 #size-cells = <1>;
63 ranges;
64
65 prcm: prcm@48180000 {
66 compatible = "ti,dm816-prcm";
67 reg = <0x48180000 0x4000>;
68
69 prcm_clocks: clocks {
70 #address-cells = <1>;
71 #size-cells = <0>;
72 };
73
74 prcm_clockdomains: clockdomains {
75 };
76 };
77
78 scrm: scrm@48140000 {
79 compatible = "ti,dm816-scrm", "simple-bus";
80 reg = <0x48140000 0x21000>;
81 #address-cells = <1>;
82 #size-cells = <1>;
83 #pinctrl-cells = <1>;
84 ranges = <0 0x48140000 0x21000>;
85
86 dm816x_pinmux: pinmux@800 {
87 compatible = "pinctrl-single";
88 reg = <0x800 0x50a>;
Tom Rini708ca4d2017-05-16 14:46:38 -040089 #pinctrl-cells = <1>;
90 pinctrl-single,register-width = <16>;
91 pinctrl-single,function-mask = <0xf>;
92 };
93
94 /* Device Configuration Registers */
95 scm_conf: syscon@600 {
96 compatible = "syscon", "simple-bus";
97 reg = <0x600 0x110>;
98 #address-cells = <1>;
99 #size-cells = <1>;
100 ranges = <0 0x600 0x110>;
101
102 usb_phy0: usb-phy@20 {
103 compatible = "ti,dm8168-usb-phy";
104 reg = <0x20 0x8>;
105 reg-names = "phy";
106 clocks = <&main_fapll 6>;
107 clock-names = "refclk";
108 #phy-cells = <0>;
109 syscon = <&scm_conf>;
110 };
111
112 usb_phy1: usb-phy@28 {
113 compatible = "ti,dm8168-usb-phy";
114 reg = <0x28 0x8>;
115 reg-names = "phy";
116 clocks = <&main_fapll 6>;
117 clock-names = "refclk";
118 #phy-cells = <0>;
119 syscon = <&scm_conf>;
120 };
121 };
122
123 scrm_clocks: clocks {
Tom Rini708ca4d2017-05-16 14:46:38 -0400124 };
125
126 scrm_clockdomains: clockdomains {
127 };
128 };
129
130 edma: edma@49000000 {
131 compatible = "ti,edma3";
132 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
133 reg = <0x49000000 0x10000>,
134 <0x44e10f90 0x40>;
135 interrupts = <12 13 14>;
136 #dma-cells = <1>;
137 };
138
139 elm: elm@48080000 {
140 compatible = "ti,816-elm";
141 ti,hwmods = "elm";
142 reg = <0x48080000 0x2000>;
143 interrupts = <4>;
144 };
145
146 gpio1: gpio@48032000 {
147 compatible = "ti,omap4-gpio";
148 ti,hwmods = "gpio1";
149 ti,gpio-always-on;
150 reg = <0x48032000 0x1000>;
151 interrupts = <96>;
152 gpio-controller;
153 #gpio-cells = <2>;
154 interrupt-controller;
155 #interrupt-cells = <2>;
156 };
157
158 gpio2: gpio@4804c000 {
159 compatible = "ti,omap4-gpio";
160 ti,hwmods = "gpio2";
161 ti,gpio-always-on;
162 reg = <0x4804c000 0x1000>;
163 interrupts = <98>;
164 gpio-controller;
165 #gpio-cells = <2>;
166 interrupt-controller;
167 #interrupt-cells = <2>;
168 };
169
170 gpmc: gpmc@50000000 {
171 compatible = "ti,am3352-gpmc";
172 ti,hwmods = "gpmc";
173 reg = <0x50000000 0x2000>;
174 #address-cells = <2>;
175 #size-cells = <1>;
176 interrupts = <100>;
177 dmas = <&edma 52>;
178 dma-names = "rxtx";
179 gpmc,num-cs = <6>;
180 gpmc,num-waitpins = <2>;
181 interrupt-controller;
182 #interrupt-cells = <2>;
183 gpio-controller;
184 #gpio-cells = <2>;
185 };
186
187 i2c1: i2c@48028000 {
188 compatible = "ti,omap4-i2c";
189 ti,hwmods = "i2c1";
190 reg = <0x48028000 0x1000>;
191 #address-cells = <1>;
192 #size-cells = <0>;
193 interrupts = <70>;
194 dmas = <&edma 58 &edma 59>;
195 dma-names = "tx", "rx";
196 };
197
198 i2c2: i2c@4802a000 {
199 compatible = "ti,omap4-i2c";
200 ti,hwmods = "i2c2";
201 reg = <0x4802a000 0x1000>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 interrupts = <71>;
205 dmas = <&edma 60 &edma 61>;
206 dma-names = "tx", "rx";
207 };
208
209 intc: interrupt-controller@48200000 {
210 compatible = "ti,dm816-intc";
211 interrupt-controller;
212 #interrupt-cells = <1>;
213 reg = <0x48200000 0x1000>;
214 };
215
216 rtc: rtc@480c0000 {
217 compatible = "ti,am3352-rtc", "ti,da830-rtc";
218 reg = <0x480c0000 0x1000>;
219 interrupts = <75 76>;
220 ti,hwmods = "rtc";
221 };
222
223 mailbox: mailbox@480c8000 {
224 compatible = "ti,omap4-mailbox";
225 reg = <0x480c8000 0x2000>;
226 interrupts = <77>;
227 ti,hwmods = "mailbox";
228 #mbox-cells = <1>;
229 ti,mbox-num-users = <4>;
230 ti,mbox-num-fifos = <12>;
231 mbox_dsp: mbox_dsp {
232 ti,mbox-tx = <3 0 0>;
233 ti,mbox-rx = <0 0 0>;
234 };
235 };
236
237 spinbox: spinbox@480ca000 {
238 compatible = "ti,omap4-hwspinlock";
239 reg = <0x480ca000 0x2000>;
240 ti,hwmods = "spinbox";
241 #hwlock-cells = <1>;
242 };
243
244 mdio: mdio@4a100800 {
245 compatible = "ti,davinci_mdio";
246 #address-cells = <1>;
247 #size-cells = <0>;
248 reg = <0x4a100800 0x100>;
249 ti,hwmods = "davinci_mdio";
250 bus_freq = <1000000>;
251 phy0: ethernet-phy@0 {
252 reg = <1>;
253 };
254 phy1: ethernet-phy@1 {
255 reg = <2>;
256 };
257 };
258
259 eth0: ethernet@4a100000 {
260 compatible = "ti,dm816-emac";
261 ti,hwmods = "emac0";
262 reg = <0x4a100000 0x800
263 0x4a100900 0x3700>;
264 clocks = <&sysclk24_ck>;
265 syscon = <&scm_conf>;
266 ti,davinci-ctrl-reg-offset = <0>;
267 ti,davinci-ctrl-mod-reg-offset = <0x900>;
268 ti,davinci-ctrl-ram-offset = <0x2000>;
269 ti,davinci-ctrl-ram-size = <0x2000>;
270 interrupts = <40 41 42 43>;
271 phy-handle = <&phy0>;
272 };
273
274 eth1: ethernet@4a120000 {
275 compatible = "ti,dm816-emac";
276 ti,hwmods = "emac1";
277 reg = <0x4a120000 0x4000>;
278 clocks = <&sysclk24_ck>;
279 syscon = <&scm_conf>;
280 ti,davinci-ctrl-reg-offset = <0>;
281 ti,davinci-ctrl-mod-reg-offset = <0x900>;
282 ti,davinci-ctrl-ram-offset = <0x2000>;
283 ti,davinci-ctrl-ram-size = <0x2000>;
284 interrupts = <44 45 46 47>;
285 phy-handle = <&phy1>;
286 };
287
288 mcspi1: spi@48030000 {
289 compatible = "ti,omap4-mcspi";
290 reg = <0x48030000 0x1000>;
291 #address-cells = <1>;
292 #size-cells = <0>;
293 interrupts = <65>;
294 ti,spi-num-cs = <4>;
295 ti,hwmods = "mcspi1";
296 dmas = <&edma 16 &edma 17
297 &edma 18 &edma 19
298 &edma 20 &edma 21
299 &edma 22 &edma 23>;
300 dma-names = "tx0", "rx0", "tx1", "rx1",
301 "tx2", "rx2", "tx3", "rx3";
302 };
303
304 mmc1: mmc@48060000 {
305 compatible = "ti,omap4-hsmmc";
306 reg = <0x48060000 0x11000>;
307 ti,hwmods = "mmc1";
308 interrupts = <64>;
309 dmas = <&edma 24 &edma 25>;
310 dma-names = "tx", "rx";
311 };
312
313 timer1: timer@4802e000 {
314 compatible = "ti,dm816-timer";
315 reg = <0x4802e000 0x2000>;
316 interrupts = <67>;
317 ti,hwmods = "timer1";
318 ti,timer-alwon;
319 };
320
321 timer2: timer@48040000 {
322 compatible = "ti,dm816-timer";
323 reg = <0x48040000 0x2000>;
324 interrupts = <68>;
325 ti,hwmods = "timer2";
326 };
327
328 timer3: timer@48042000 {
329 compatible = "ti,dm816-timer";
330 reg = <0x48042000 0x2000>;
331 interrupts = <69>;
332 ti,hwmods = "timer3";
333 };
334
335 timer4: timer@48044000 {
336 compatible = "ti,dm816-timer";
337 reg = <0x48044000 0x2000>;
338 interrupts = <92>;
339 ti,hwmods = "timer4";
340 ti,timer-pwm;
341 };
342
343 timer5: timer@48046000 {
344 compatible = "ti,dm816-timer";
345 reg = <0x48046000 0x2000>;
346 interrupts = <93>;
347 ti,hwmods = "timer5";
348 ti,timer-pwm;
349 };
350
351 timer6: timer@48048000 {
352 compatible = "ti,dm816-timer";
353 reg = <0x48048000 0x2000>;
354 interrupts = <94>;
355 ti,hwmods = "timer6";
356 ti,timer-pwm;
357 };
358
359 timer7: timer@4804a000 {
360 compatible = "ti,dm816-timer";
361 reg = <0x4804a000 0x2000>;
362 interrupts = <95>;
363 ti,hwmods = "timer7";
364 ti,timer-pwm;
365 };
366
367 uart1: uart@48020000 {
368 compatible = "ti,am3352-uart", "ti,omap3-uart";
369 ti,hwmods = "uart1";
370 reg = <0x48020000 0x2000>;
371 clock-frequency = <48000000>;
372 interrupts = <72>;
373 dmas = <&edma 26 &edma 27>;
374 dma-names = "tx", "rx";
375 };
376
377 uart2: uart@48022000 {
378 compatible = "ti,am3352-uart", "ti,omap3-uart";
379 ti,hwmods = "uart2";
380 reg = <0x48022000 0x2000>;
381 clock-frequency = <48000000>;
382 interrupts = <73>;
383 dmas = <&edma 28 &edma 29>;
384 dma-names = "tx", "rx";
385 };
386
387 uart3: uart@48024000 {
388 compatible = "ti,am3352-uart", "ti,omap3-uart";
389 ti,hwmods = "uart3";
390 reg = <0x48024000 0x2000>;
391 clock-frequency = <48000000>;
392 interrupts = <74>;
393 dmas = <&edma 30 &edma 31>;
394 dma-names = "tx", "rx";
395 };
396
397 /* NOTE: USB needs a transceiver driver for phys to work */
398 usb: usb_otg_hs@47401000 {
399 compatible = "ti,am33xx-usb";
400 reg = <0x47401000 0x400000>;
401 ranges;
402 #address-cells = <1>;
403 #size-cells = <1>;
404 ti,hwmods = "usb_otg_hs";
405
406 usb0: usb@47401000 {
407 compatible = "ti,musb-dm816";
408 reg = <0x47401400 0x400
409 0x47401000 0x200>;
410 reg-names = "mc", "control";
411 interrupts = <18>;
412 interrupt-names = "mc";
413 dr_mode = "host";
414 interface-type = <0>;
415 phys = <&usb_phy0>;
416 phy-names = "usb2-phy";
417 mentor,multipoint = <1>;
418 mentor,num-eps = <16>;
419 mentor,ram-bits = <12>;
420 mentor,power = <500>;
421
422 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
423 &cppi41dma 2 0 &cppi41dma 3 0
424 &cppi41dma 4 0 &cppi41dma 5 0
425 &cppi41dma 6 0 &cppi41dma 7 0
426 &cppi41dma 8 0 &cppi41dma 9 0
427 &cppi41dma 10 0 &cppi41dma 11 0
428 &cppi41dma 12 0 &cppi41dma 13 0
429 &cppi41dma 14 0 &cppi41dma 0 1
430 &cppi41dma 1 1 &cppi41dma 2 1
431 &cppi41dma 3 1 &cppi41dma 4 1
432 &cppi41dma 5 1 &cppi41dma 6 1
433 &cppi41dma 7 1 &cppi41dma 8 1
434 &cppi41dma 9 1 &cppi41dma 10 1
435 &cppi41dma 11 1 &cppi41dma 12 1
436 &cppi41dma 13 1 &cppi41dma 14 1>;
437 dma-names =
438 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
439 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
440 "rx14", "rx15",
441 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
442 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
443 "tx14", "tx15";
444 };
445
446 usb1: usb@47401800 {
447 compatible = "ti,musb-dm816";
448 reg = <0x47401c00 0x400
449 0x47401800 0x200>;
450 reg-names = "mc", "control";
451 interrupts = <19>;
452 interrupt-names = "mc";
453 dr_mode = "host";
454 interface-type = <0>;
455 phys = <&usb_phy1>;
456 phy-names = "usb2-phy";
457 mentor,multipoint = <1>;
458 mentor,num-eps = <16>;
459 mentor,ram-bits = <12>;
460 mentor,power = <500>;
461
462 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
463 &cppi41dma 17 0 &cppi41dma 18 0
464 &cppi41dma 19 0 &cppi41dma 20 0
465 &cppi41dma 21 0 &cppi41dma 22 0
466 &cppi41dma 23 0 &cppi41dma 24 0
467 &cppi41dma 25 0 &cppi41dma 26 0
468 &cppi41dma 27 0 &cppi41dma 28 0
469 &cppi41dma 29 0 &cppi41dma 15 1
470 &cppi41dma 16 1 &cppi41dma 17 1
471 &cppi41dma 18 1 &cppi41dma 19 1
472 &cppi41dma 20 1 &cppi41dma 21 1
473 &cppi41dma 22 1 &cppi41dma 23 1
474 &cppi41dma 24 1 &cppi41dma 25 1
475 &cppi41dma 26 1 &cppi41dma 27 1
476 &cppi41dma 28 1 &cppi41dma 29 1>;
477 dma-names =
478 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
479 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
480 "rx14", "rx15",
481 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
482 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
483 "tx14", "tx15";
484 };
485
486 cppi41dma: dma-controller@47402000 {
487 compatible = "ti,am3359-cppi41";
488 reg = <0x47400000 0x1000
489 0x47402000 0x1000
490 0x47403000 0x1000
491 0x47404000 0x4000>;
492 reg-names = "glue", "controller", "scheduler", "queuemgr";
493 interrupts = <17>;
494 interrupt-names = "glue";
495 #dma-cells = <2>;
496 #dma-channels = <30>;
497 #dma-requests = <256>;
498 };
499 };
500
501 wd_timer2: wd_timer@480c2000 {
502 compatible = "ti,omap3-wdt";
503 ti,hwmods = "wd_timer";
504 reg = <0x480c2000 0x1000>;
505 interrupts = <0>;
506 };
507 };
508};
509
510#include "dm816x-clocks.dtsi"