wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Custom IDEAS, Inc. <www.cideas.com> |
| 4 | * Jon Diekema <diekema@cideas.com> |
| 5 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 9 | #define SLRCLK_EN_MASK 0x00040000 /* PA13 - SLRCLK_EN* */ |
| 10 | |
| 11 | #define MIN_SAMPLE_RATE 4000 /* Minimum sample rate */ |
| 12 | #define MAX_128x_SAMPLE_RATE 43402 /* Maximum 128x sample rate */ |
| 13 | #define MAX_64x_SAMPLE_RATE 86805 /* Maximum 64x sample rate */ |
| 14 | |
| 15 | #define KHZ ((uint)1000) |
| 16 | #define MHZ ((uint)(1000 * KHZ)) |
| 17 | |
| 18 | #define MCLK_BRG 3 /* MCLK, Master CLocK for the A/D & D/A */ |
| 19 | #define SCLK_BRG 7 /* SCLK, Sample CLocK for the A/D & D/A */ |
| 20 | #define LRCLK_BRG 5 /* LRCLK, L/R CLocK for the A/D & D/A */ |
| 21 | /* 0 == BRG1 (used for SMC1) */ |
| 22 | /* 1 == BRG2 (used for SMC2) */ |
| 23 | /* 2 == BRG3 (used for SCC1) */ |
| 24 | /* 3 == BRG4 (MCLK) */ |
| 25 | /* 4 == BRG5 */ |
| 26 | /* 5 == BRG6 (LRCLK) */ |
| 27 | /* 6 == BRG7 */ |
| 28 | /* 7 == BRG8 (SCLK) */ |
| 29 | |
| 30 | #define MCLK_DIVISOR 4 /* SCLK = MCLK / MCLK_DIVISOR */ |
| 31 | #define SCLK_DIVISOR (Daq64xSampling ? 64 : 128) |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 32 | /* LRCLK = SCLK / SCLK_DIVISOR */ |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 33 | |
| 34 | #define TIGHTEN_UP_BRG_EN_TIMING /* Tighten up the BRG enable timing */ |
| 35 | #define RUN_SCLK_ON_BRG_INT /* Run SCLK on BRG_INT instead of MCLK */ |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 36 | /* The 8260 (Mask B.3) seems to have */ |
| 37 | /* problems generating SCLK from MCLK */ |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 38 | /* via CLK9. */ |
| 39 | #define RUN_LRCLK_ON_BRG_INT /* Run LRCLK on BRG_INT instead of SCLK */ |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 40 | /* The 8260 (Mask B.3) seems to have */ |
| 41 | /* problems generating LRCLK from SCLK */ |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 42 | |
wdenk | eb9401e | 2002-11-11 02:11:37 +0000 | [diff] [blame] | 43 | #define NUM_LRCLKS_TO_STABILIZE 1 /* Number of LRCLK period (sample) */ |
| 44 | /* to wait for the clock to stabilize */ |
| 45 | |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 46 | #define CPM_CLK (gd->bd->bi_cpmfreq) |
| 47 | #define DFBRG 4 |
| 48 | #define BRG_INT_CLK (CPM_CLK * 2 / DFBRG) |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 49 | /* BRG = CPM * 2 / DFBRG (Sect 9.8) */ |
| 50 | /* BRG = CPM * 2 / 4 */ |
| 51 | /* BRG = CPM / 2 */ |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 52 | |
| 53 | #define CPM_BRG_EXTC_MASK ((uint)0x0000C000) |
| 54 | #define CPM_BRG_EXTC_SHIFT 14 |
| 55 | |
| 56 | #define CPM_BRG_DIV16_MASK ((uint)0x00000001) |
| 57 | #define CPM_BRG_DIV16_SHIFT 1 |
| 58 | |
| 59 | #define CPM_BRG_EXTC_BRGCLK 0 |
| 60 | #define CPM_BRG_EXTC_CLK3 1 |
| 61 | #define CPM_BRG_EXTC_CLK9 CPM_BRG_EXTC_CLK3 |
| 62 | #define CPM_BRG_EXTC_CLK5 2 |
| 63 | #define CPM_BRG_EXTC_CLK15 CPM_BRG_EXTC_CLK5 |
| 64 | |
wdenk | eb9401e | 2002-11-11 02:11:37 +0000 | [diff] [blame] | 65 | #define IM_BRGC1 ((uint *)0xf00119f0) |
| 66 | #define IM_BRGC2 ((uint *)0xf00119f4) |
| 67 | #define IM_BRGC3 ((uint *)0xf00119f8) |
| 68 | #define IM_BRGC4 ((uint *)0xf00119fc) |
| 69 | #define IM_BRGC5 ((uint *)0xf00115f0) |
| 70 | #define IM_BRGC6 ((uint *)0xf00115f4) |
| 71 | #define IM_BRGC7 ((uint *)0xf00115f8) |
| 72 | #define IM_BRGC8 ((uint *)0xf00115fc) |
| 73 | |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 74 | /* |
| 75 | * External declarations |
| 76 | */ |
| 77 | |
| 78 | extern int Daq64xSampling; |
| 79 | |
| 80 | extern void Daq_BRG_Reset(uint brg); |
| 81 | extern void Daq_BRG_Run(uint brg); |
| 82 | |
| 83 | extern void Daq_BRG_Disable(uint brg); |
| 84 | extern void Daq_BRG_Enable(uint brg); |
| 85 | |
| 86 | extern uint Daq_BRG_Get_Div16(uint brg); |
| 87 | extern void Daq_BRG_Set_Div16(uint brg, uint div16); |
| 88 | |
| 89 | extern uint Daq_BRG_Get_Count(uint brg); |
| 90 | extern void Daq_BRG_Set_Count(uint brg, uint brg_cnt); |
| 91 | |
| 92 | extern uint Daq_BRG_Get_ExtClk(uint brg); |
| 93 | extern char* Daq_BRG_Get_ExtClk_Description(uint brg); |
| 94 | extern void Daq_BRG_Set_ExtClk(uint brg, uint extc); |
| 95 | |
| 96 | extern uint Daq_BRG_Rate(uint brg); |
| 97 | |
| 98 | extern uint Daq_Get_SampleRate(void); |
wdenk | 17bd4a8 | 2002-09-27 01:44:52 +0000 | [diff] [blame] | 99 | |
| 100 | extern void Daq_Init_Clocks(int sample_rate, int sample_64x); |
| 101 | extern void Daq_Stop_Clocks(void); |
| 102 | extern void Daq_Start_Clocks(int sample_rate); |
| 103 | extern void Daq_Display_Clocks(void); |