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Giuseppe Pagano164d9842013-11-28 12:32:48 +01001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Stefano Babic552a8482017-06-29 10:16:06 +02007#include <asm/mach-imx/iomux-v3.h>
Giuseppe Pagano164d9842013-11-28 12:32:48 +01008#include <asm/arch/iomux.h>
9#include <asm/io.h>
Stefano Babicf5514e42013-12-19 11:04:33 +010010#include <asm/arch/clock.h>
Tim Harvey22452fd2014-05-07 22:24:47 -070011#include <asm/arch/sys_proto.h>
Giuseppe Pagano164d9842013-11-28 12:32:48 +010012
13int setup_sata(void)
14{
Fabio Estevam0a11d6f2014-07-09 17:59:54 -030015 struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
Tim Harvey22452fd2014-05-07 22:24:47 -070016 int ret;
Giuseppe Pagano164d9842013-11-28 12:32:48 +010017
Peng Fanaff37562016-05-23 18:36:00 +080018 if (!is_mx6dq() && !is_mx6dqp())
Tim Harvey22452fd2014-05-07 22:24:47 -070019 return 1;
20
21 ret = enable_sata_clock();
Giuseppe Pagano164d9842013-11-28 12:32:48 +010022 if (ret)
23 return ret;
24
25 clrsetbits_le32(&iomuxc_regs->gpr[13],
26 IOMUXC_GPR13_SATA_MASK,
27 IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
28 |IOMUXC_GPR13_SATA_PHY_7_SATA2M
29 |IOMUXC_GPR13_SATA_SPEED_3G
30 |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
31 |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
32 |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
33 |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
34 |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
35 |IOMUXC_GPR13_SATA_PHY_1_SLOW);
36
37 return 0;
38}