blob: 5296165aedd988e7a44c0433186b1e1a45933e60 [file] [log] [blame]
wdenkba56f622004-02-06 23:19:44 +00001/*
2 * (C) Copyright 2002-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
wdenkba56f622004-02-06 23:19:44 +000025/* Do we need any of these for elf?
26 __DYNAMIC = 0; */
27SECTIONS
28{
29 /* Read-only sections, merged into text segment: */
30 . = + SIZEOF_HEADERS;
31 .interp : { *(.interp) }
32 .hash : { *(.hash) }
33 .dynsym : { *(.dynsym) }
34 .dynstr : { *(.dynstr) }
35 .rel.text : { *(.rel.text) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020036 .rela.text : { *(.rela.text) }
wdenkba56f622004-02-06 23:19:44 +000037 .rel.data : { *(.rel.data) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020038 .rela.data : { *(.rela.data) }
39 .rel.rodata : { *(.rel.rodata) }
40 .rela.rodata : { *(.rela.rodata) }
wdenkba56f622004-02-06 23:19:44 +000041 .rel.got : { *(.rel.got) }
42 .rela.got : { *(.rela.got) }
43 .rel.ctors : { *(.rel.ctors) }
44 .rela.ctors : { *(.rela.ctors) }
45 .rel.dtors : { *(.rel.dtors) }
46 .rela.dtors : { *(.rela.dtors) }
47 .rel.bss : { *(.rel.bss) }
48 .rela.bss : { *(.rela.bss) }
49 .rel.plt : { *(.rel.plt) }
50 .rela.plt : { *(.rela.plt) }
51 .init : { *(.init) }
52 .plt : { *(.plt) }
53 .text :
54 {
55 /* WARNING - the following is hand-optimized to fit within */
56 /* the sector layout of our flash chips! XXX FIXME XXX */
57
Stefan Roesea47a12b2010-04-15 16:07:28 +020058 arch/powerpc/cpu/ppc4xx/start.o (.text)
Peter Tyser10c1b212009-07-17 19:01:16 -050059 board/xes/xpedite1000/init.o (.text)
Stefan Roesea47a12b2010-04-15 16:07:28 +020060 arch/powerpc/cpu/ppc4xx/kgdb.o (.text)
61 arch/powerpc/cpu/ppc4xx/traps.o (.text)
62 arch/powerpc/cpu/ppc4xx/interrupts.o (.text)
63 arch/powerpc/cpu/ppc4xx/4xx_uart.o (.text)
64 arch/powerpc/cpu/ppc4xx/cpu_init.o (.text)
65 arch/powerpc/cpu/ppc4xx/speed.o (.text)
wdenkba56f622004-02-06 23:19:44 +000066 common/dlmalloc.o (.text)
Peter Tyser78acc472010-04-12 22:28:05 -050067 lib/crc32.o (.text)
Stefan Roesea47a12b2010-04-15 16:07:28 +020068 arch/powerpc/lib/extable.o (.text)
Peter Tyser78acc472010-04-12 22:28:05 -050069 lib/zlib.o (.text)
wdenkba56f622004-02-06 23:19:44 +000070
Jean-Christophe PLAGNIOL-VILLARD0cf4fd32008-09-10 22:48:01 +020071/* common/env_embedded.o(.text) */
wdenkba56f622004-02-06 23:19:44 +000072
73 *(.text)
wdenkba56f622004-02-06 23:19:44 +000074 *(.got1)
75 }
76 _etext = .;
77 PROVIDE (etext = .);
78 .rodata :
79 {
Wolfgang Denk74812662005-12-12 16:06:05 +010080 *(.eh_frame)
Trent Piephof62fb992009-02-18 15:22:05 -080081 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenkba56f622004-02-06 23:19:44 +000082 }
83 .fini : { *(.fini) } =0
84 .ctors : { *(.ctors) }
85 .dtors : { *(.dtors) }
86
87 /* Read-write section, merged into data segment: */
88 . = (. + 0x0FFF) & 0xFFFFF000;
89 _erotext = .;
90 PROVIDE (erotext = .);
91 .reloc :
92 {
93 *(.got)
94 _GOT2_TABLE_ = .;
95 *(.got2)
96 _FIXUP_TABLE_ = .;
97 *(.fixup)
98 }
99 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
100 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
101
102 .data :
103 {
104 *(.data)
105 *(.data1)
106 *(.sdata)
107 *(.sdata2)
108 *(.dynamic)
109 CONSTRUCTORS
110 }
111 _edata = .;
112 PROVIDE (edata = .);
113
114 __u_boot_cmd_start = .;
115 .u_boot_cmd : { *(.u_boot_cmd) }
116 __u_boot_cmd_end = .;
117
Marek Vasut55675142012-10-12 10:27:03 +0000118 . = ALIGN(4);
119 .u_boot_list : {
120 #include <u-boot.lst>
121 }
122
wdenkba56f622004-02-06 23:19:44 +0000123
124 __start___ex_table = .;
125 __ex_table : { *(__ex_table) }
126 __stop___ex_table = .;
127
128 . = ALIGN(256);
129 __init_begin = .;
130 .text.init : { *(.text.init) }
131 .data.init : { *(.data.init) }
132 . = ALIGN(256);
133 __init_end = .;
134
135 __bss_start = .;
136 .bss :
137 {
138 *(.sbss) *(.scommon)
139 *(.dynbss)
140 *(.bss)
141 *(COMMON)
142 }
Po-Yu Chuang44c6e652011-03-01 22:59:59 +0000143 __bss_end__ = . ;
wdenkba56f622004-02-06 23:19:44 +0000144 PROVIDE (end = .);
145}