blob: 2e4ee66cf6167e803970a508ea83ec7bb234c6f4 [file] [log] [blame]
wdenkc0218802003-03-27 12:09:35 +00001/*
wdenk414eec32005-04-02 22:37:54 +00002 * (C) Copyright 2003-2005
wdenkc0218802003-03-27 12:09:35 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * This file contains the configuration parameters for the INCA-IP board.
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
32#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
33
wdenke0ac62d2003-08-17 18:55:18 +000034#ifndef CPU_CLOCK_RATE
wdenkd791b1d2003-04-20 14:04:18 +000035/* allowed values: 100000000, 133000000, and 150000000 */
wdenkb299e412004-01-06 11:32:21 +000036#define CPU_CLOCK_RATE 150000000 /* default: 150 MHz clock for the MIPS core */
wdenke0ac62d2003-08-17 18:55:18 +000037#endif
wdenkc0218802003-03-27 12:09:35 +000038
wdenk7cb22f92003-12-27 19:24:54 +000039#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 */
wdenk3e386912003-04-05 00:53:31 +000040
41#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
42
wdenkc0218802003-03-27 12:09:35 +000043#define CONFIG_BAUDRATE 115200
44
wdenkc0218802003-03-27 12:09:35 +000045/* valid baudrates */
46#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
47
wdenk3e386912003-04-05 00:53:31 +000048#define CONFIG_TIMESTAMP /* Print image info with timestamp */
49
50#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +010051 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk3e386912003-04-05 00:53:31 +000052 "echo"
53
54#undef CONFIG_BOOTARGS
55
56#define CONFIG_EXTRA_ENV_SETTINGS \
57 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010058 "nfsroot=${serverip}:${rootpath}\0" \
wdenk3e386912003-04-05 00:53:31 +000059 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010060 "addip=setenv bootargs ${bootargs} " \
61 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
62 ":${hostname}:${netdev}:off\0" \
63 "addmisc=setenv bootargs ${bootargs} " \
64 "console=ttyS0,${baudrate} " \
65 "ethaddr=${ethaddr} " \
wdenk3e386912003-04-05 00:53:31 +000066 "panic=1\0" \
67 "flash_nfs=run nfsargs addip addmisc;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010068 "bootm ${kernel_addr}\0" \
wdenk3e386912003-04-05 00:53:31 +000069 "flash_self=run ramargs addip addmisc;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010070 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
71 "net_nfs=tftp 80500000 ${bootfile};" \
wdenk3e386912003-04-05 00:53:31 +000072 "run nfsargs addip addmisc;bootm\0" \
73 "rootpath=/opt/eldk/mips_4KC\0" \
74 "bootfile=/tftpboot/INCA/uImage\0" \
75 "kernel_addr=B0040000\0" \
76 "ramdisk_addr=B0100000\0" \
77 "u-boot=/tftpboot/INCA/u-boot.bin\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010078 "load=tftp 80500000 ${u-boot}\0" \
wdenk3e386912003-04-05 00:53:31 +000079 "update=protect off 1:0-2;era 1:0-2;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010080 "cp.b 80500000 B0000000 ${filesize}\0" \
wdenk3e386912003-04-05 00:53:31 +000081 ""
82#define CONFIG_BOOTCOMMAND "run flash_self"
83
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050084
85/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -050086 * BOOTP options
87 */
88#define CONFIG_BOOTP_BOOTFILESIZE
89#define CONFIG_BOOTP_BOOTPATH
90#define CONFIG_BOOTP_GATEWAY
91#define CONFIG_BOOTP_HOSTNAME
92
93
94/*
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050095 * Command line configuration.
96 */
97#include <config_cmd_default.h>
98
99#define CONFIG_CMD_ASKENV
100#define CONFIG_CMD_DHCP
101#define CONFIG_CMD_ELF
102#define CONFIG_CMD_JFFS2
103#define CONFIG_CMD_NFS
104#define CONFIG_CMD_PING
105#define CONFIG_CMD_SNTP
106
wdenkc0218802003-03-27 12:09:35 +0000107
108/*
109 * Miscellaneous configurable options
110 */
111#define CFG_LONGHELP /* undef to save memory */
112#define CFG_PROMPT "INCA-IP # " /* Monitor Command Prompt */
113#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
114#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
wdenkc0218802003-03-27 12:09:35 +0000115#define CFG_MAXARGS 16 /* max number of command args*/
116
wdenk3e386912003-04-05 00:53:31 +0000117#define CFG_MALLOC_LEN 128*1024
118
119#define CFG_BOOTPARAMS_LEN 128*1024
120
Shinya Kuribayashia55d4812008-06-05 22:29:00 +0900121#define CFG_MIPS_TIMER_FREQ (incaip_get_cpuclk() / 2)
122
123#define CFG_HZ 1000
wdenk3e386912003-04-05 00:53:31 +0000124
125#define CFG_SDRAM_BASE 0x80000000
126
wdenkc0218802003-03-27 12:09:35 +0000127#define CFG_LOAD_ADDR 0x80100000 /* default load address */
128
wdenk3e386912003-04-05 00:53:31 +0000129#define CFG_MEMTEST_START 0x80100000
wdenkc0218802003-03-27 12:09:35 +0000130#define CFG_MEMTEST_END 0x80800000
131
132/*-----------------------------------------------------------------------
133 * FLASH and environment organization
134 */
135#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
136#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
137
138#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */
139#define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */
140
141/* The following #defines are needed to get flash environment right */
142#define CFG_MONITOR_BASE TEXT_BASE
143#define CFG_MONITOR_LEN (192 << 10)
144
145#define CFG_INIT_SP_OFFSET 0x400000
146
147#define CFG_FLASH_BASE PHYS_FLASH_1
148
149/* timeout values are in ticks */
150#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
151#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
152
153#define CFG_ENV_IS_IN_FLASH 1
154
155/* Address and size of Primary Environment Sector */
156#define CFG_ENV_ADDR 0xB0030000
157#define CFG_ENV_SIZE 0x10000
158
159#define CONFIG_FLASH_16BIT
160
161#define CONFIG_NR_DRAM_BANKS 1
162
163#define CONFIG_INCA_IP_SWITCH
164#define CONFIG_NET_MULTI
wdenk0c852a22004-02-26 23:01:04 +0000165#define CONFIG_INCA_IP_SWITCH_AMDIX
wdenkc0218802003-03-27 12:09:35 +0000166
Wolfgang Denk700a0c62005-08-08 01:03:24 +0200167/*
168 * JFFS2 partitions
169 */
170/* No command line, one static partition, use all space on the device */
171#undef CONFIG_JFFS2_CMDLINE
172#define CONFIG_JFFS2_DEV "nor1"
173#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
174#define CONFIG_JFFS2_PART_OFFSET 0x00000000
175
176/* mtdparts command line support */
177/*
178#define CONFIG_JFFS2_CMDLINE
179#define MTDIDS_DEFAULT "nor0=INCA-IP Bank 0"
180#define MTDPARTS_DEFAULT "mtdparts=INCA-IP Bank 0:192k(uboot)," \
181 "64k(env)," \
182 "768k(linux)," \
183 "1m@3m(rootfs)," \
184 "768k(linux2)," \
185 "3m@5m(rootfs2)"
186*/
wdenk5c745d22003-12-12 00:02:26 +0000187
wdenkc0218802003-03-27 12:09:35 +0000188/*-----------------------------------------------------------------------
189 * Cache Configuration
190 */
191#define CFG_DCACHE_SIZE 4096
192#define CFG_ICACHE_SIZE 4096
193#define CFG_CACHELINE_SIZE 16
194
195#endif /* __CONFIG_H */