Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Rockchip Electronics Co., Ltd |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 4 | */ |
| 5 | #ifndef __CONFIG_RK3036_COMMON_H |
| 6 | #define __CONFIG_RK3036_COMMON_H |
| 7 | |
Kever Yang | 15f09a1 | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 8 | #include <asm/arch-rockchip/hardware.h> |
Jacob Chen | 7f35bbb | 2016-10-08 13:47:41 +0800 | [diff] [blame] | 9 | #include "rockchip-common.h" |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 10 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 11 | #define CONFIG_SYS_CBSIZE 1024 |
| 12 | #define CONFIG_SKIP_LOWLEVEL_INIT |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 13 | |
Kever Yang | 002d897 | 2019-07-09 22:00:25 +0800 | [diff] [blame] | 14 | #define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 |
| 15 | #define COUNTER_FREQUENCY 24000000 |
| 16 | #define CONFIG_SYS_ARCH_TIMER |
| 17 | #define CONFIG_SYS_HZ_CLOCK 24000000 |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 18 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 19 | #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 |
| 20 | #define CONFIG_SYS_LOAD_ADDR 0x60800800 |
| 21 | #define CONFIG_SPL_STACK 0x10081fff |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 22 | |
| 23 | #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) |
| 24 | #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" |
| 25 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 26 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 27 | #define SDRAM_BANK_SIZE (512UL << 20UL) |
Kever Yang | 6d1970f | 2017-06-23 16:11:05 +0800 | [diff] [blame] | 28 | #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 29 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 30 | #ifndef CONFIG_SPL_BUILD |
Xu Ziyuan | d2d763f | 2016-07-28 11:42:34 +0800 | [diff] [blame] | 31 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 32 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 33 | "scriptaddr=0x60000000\0" \ |
| 34 | "pxefile_addr_r=0x60100000\0" \ |
| 35 | "fdt_addr_r=0x61f00000\0" \ |
| 36 | "kernel_addr_r=0x62000000\0" \ |
| 37 | "ramdisk_addr_r=0x64000000\0" |
| 38 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 39 | #include <config_distro_bootcmd.h> |
| 40 | |
| 41 | /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, |
| 42 | * so limit the fdt reallocation to that */ |
| 43 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Klaus Goger | a2a5053 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 44 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 45 | "fdt_high=0x7fffffff\0" \ |
Jacob Chen | 73a8598 | 2016-09-19 18:46:25 +0800 | [diff] [blame] | 46 | "partitions=" PARTS_DEFAULT \ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 47 | ENV_MEM_LAYOUT_SETTINGS \ |
| 48 | BOOTENV |
| 49 | #endif |
| 50 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 51 | #endif |