blob: 7417f8582a4cf629882888d194960cd376dbc826 [file] [log] [blame]
Angus Ainslie466a9ea2022-08-25 06:46:02 -07001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2017 NXP
4 * Copyright 2018 Emcraft Systems
5 * Copyright 2022 Purism
6 *
7 */
8
9#ifndef __LIBREM5_H
10#define __LIBREM5_H
11
12/* #define DEBUG */
13
14#include <version.h>
15#include <linux/sizes.h>
16#include <asm/arch/imx-regs.h>
17
Angus Ainslie466a9ea2022-08-25 06:46:02 -070018#ifdef CONFIG_SPL_BUILD
19
20#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
21
22#define CONFIG_POWER_BD71837
23#define CONFIG_POWER_BD71837_I2C_BUS 0
24#define CONFIG_POWER_BD71837_I2C_ADDR 0x4B
25
26#endif /* CONFIG_SPL_BUILD*/
27
Tom Rini6cc04542022-10-28 20:27:13 -040028#define CFG_SYS_FSL_USDHC_NUM 2
Angus Ainslie466a9ea2022-08-25 06:46:02 -070029
Angus Ainslie466a9ea2022-08-25 06:46:02 -070030#define CONSOLE_ON_UART1
31
32#ifdef CONSOLE_ON_UART1
33#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
34#define CONSOLE_UART_CLK 0
35#define CONSOLE "ttymxc0"
36#elif defined(CONSOLE_ON_UART2)
37#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
38#define CONSOLE_UART_CLK 1
39#define CONSOLE "ttymxc1"
40#elif defined(CONSOLE_ON_UART3)
41#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
42#define CONSOLE_UART_CLK 2
43#define CONSOLE "ttymxc2"
44#elif defined(CONSOLE_ON_UART4)
45#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
46#define CONSOLE_UART_CLK 3
47#define CONSOLE "ttymxc3"
48#else
49#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
50#define CONSOLE_UART_CLK 0
51#define CONSOLE "ttymxc0"
52#endif
53
54#ifndef CONFIG_SPL_BUILD
55#define BOOT_TARGET_DEVICES(func) \
56 func(MMC, mmc, 0) \
57 func(USB, usb, 0) \
58 func(DHCP, dhcp, na)
59#include <config_distro_bootcmd.h>
60#else
61#define BOOTENV
62#endif
63
64/* Initial environment variables */
Tom Rini0613c362022-12-04 10:03:50 -050065#define CFG_EXTRA_ENV_SETTINGS \
Angus Ainslie466a9ea2022-08-25 06:46:02 -070066 "scriptaddr=0x80000000\0" \
67 "pxefile_addr_r=0x80100000\0" \
68 "kernel_addr_r=0x80800000\0" \
69 "fdt_addr_r=0x84800000\0" \
70 "ramdisk_addr_r=0x85000000\0" \
71 "console=" CONSOLE ",115200\0" \
72 "bootargs=u_boot_version=" PLAIN_VERSION "\0" \
73 "stdin=usbacm,serial\0" \
74 "stdout=usbacm,serial\0" \
75 "stderr=usbacm,serial\0" \
76 BOOTENV
77
78/* Link Definitions */
79
Tom Rini65cc0e22022-11-16 13:10:41 -050080#define CFG_SYS_INIT_RAM_ADDR 0x40000000
81#define CFG_SYS_INIT_RAM_SIZE 0x80000
Angus Ainslie466a9ea2022-08-25 06:46:02 -070082
Tom Riniaa6e94d2022-11-16 13:10:37 -050083#define CFG_SYS_SDRAM_BASE 0x40000000
Angus Ainslie466a9ea2022-08-25 06:46:02 -070084#define PHYS_SDRAM 0x40000000
85#define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB LPDDR4 one Rank */
86
87/* Monitor Command Prompt */
88
Tom Rini6cc04542022-10-28 20:27:13 -040089#define CFG_SYS_FSL_ESDHC_ADDR 0
Angus Ainslie466a9ea2022-08-25 06:46:02 -070090
91#endif