blob: b29bc30fc253dd415aba3d3858a94f336e379bab [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -07002/**
3 * (C) Copyright 2014, Cavium Inc.
Michal Simek3c854172017-05-29 09:11:32 +02004 * (C) Copyright 2017, Xilinx Inc.
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -07005 *
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -07006**/
7
8#include <asm-offsets.h>
9#include <config.h>
10#include <version.h>
Simon Glass90526e92020-05-10 11:39:56 -060011#include <asm/cache.h>
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -070012#include <asm/macro.h>
Beniamino Galvani5a07abb2016-05-08 08:30:14 +020013#include <asm/psci.h>
Simon Glassc3dc39a2020-05-10 11:39:55 -060014#include <asm/ptrace.h>
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -070015#include <asm/system.h>
16
17/*
18 * Issue the hypervisor call
19 *
20 * x0~x7: input arguments
21 * x0~x3: output arguments
22 */
Heinrich Schuchardt81ea0082018-10-18 12:29:40 +020023static void hvc_call(struct pt_regs *args)
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -070024{
25 asm volatile(
26 "ldr x0, %0\n"
27 "ldr x1, %1\n"
28 "ldr x2, %2\n"
29 "ldr x3, %3\n"
30 "ldr x4, %4\n"
31 "ldr x5, %5\n"
32 "ldr x6, %6\n"
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -070033 "hvc #0\n"
34 "str x0, %0\n"
35 "str x1, %1\n"
36 "str x2, %2\n"
37 "str x3, %3\n"
38 : "+m" (args->regs[0]), "+m" (args->regs[1]),
39 "+m" (args->regs[2]), "+m" (args->regs[3])
40 : "m" (args->regs[4]), "m" (args->regs[5]),
Ibai Erkiaga1721b822019-02-25 10:11:45 +000041 "m" (args->regs[6])
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -070042 : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
43 "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
44 "x16", "x17");
45}
46
47/*
48 * void smc_call(arg0, arg1...arg7)
49 *
50 * issue the secure monitor call
51 *
52 * x0~x7: input arguments
53 * x0~x3: output arguments
54 */
55
Heinrich Schuchardt81ea0082018-10-18 12:29:40 +020056void smc_call(struct pt_regs *args)
Sergey Temerkhanova5b9fa32015-10-14 09:55:46 -070057{
58 asm volatile(
59 "ldr x0, %0\n"
60 "ldr x1, %1\n"
61 "ldr x2, %2\n"
62 "ldr x3, %3\n"
63 "ldr x4, %4\n"
64 "ldr x5, %5\n"
65 "ldr x6, %6\n"
66 "smc #0\n"
67 "str x0, %0\n"
68 "str x1, %1\n"
69 "str x2, %2\n"
70 "str x3, %3\n"
71 : "+m" (args->regs[0]), "+m" (args->regs[1]),
72 "+m" (args->regs[2]), "+m" (args->regs[3])
73 : "m" (args->regs[4]), "m" (args->regs[5]),
74 "m" (args->regs[6])
75 : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
76 "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
77 "x16", "x17");
78}
Beniamino Galvani5a07abb2016-05-08 08:30:14 +020079
Alexander Graf51bfb5b2016-08-16 21:08:46 +020080/*
81 * For now, all systems we support run at least in EL2 and thus
82 * trigger PSCI calls to EL3 using SMC. If anyone ever wants to
83 * use PSCI on U-Boot running below a hypervisor, please detect
84 * this and set the flag accordingly.
85 */
Heinrich Schuchardt81ea0082018-10-18 12:29:40 +020086static const bool use_smc_for_psci = true;
Alexander Graf51bfb5b2016-08-16 21:08:46 +020087
Heinrich Schuchardt81ea0082018-10-18 12:29:40 +020088void __noreturn psci_system_reset(void)
Beniamino Galvani5a07abb2016-05-08 08:30:14 +020089{
90 struct pt_regs regs;
91
92 regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
93
Alexander Graf51bfb5b2016-08-16 21:08:46 +020094 if (use_smc_for_psci)
Beniamino Galvani5a07abb2016-05-08 08:30:14 +020095 smc_call(&regs);
96 else
97 hvc_call(&regs);
98
99 while (1)
100 ;
101}
Alexander Graf3ee655e2016-08-16 21:08:47 +0200102
Rajesh Ravi41acbc52019-11-22 14:50:01 -0800103void __noreturn psci_system_reset2(u32 reset_level, u32 cookie)
104{
105 struct pt_regs regs;
106
107 regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2;
108 regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level;
109 regs.regs[2] = cookie;
110 if (use_smc_for_psci)
111 smc_call(&regs);
112 else
113 hvc_call(&regs);
114
115 while (1)
116 ;
117}
118
Heinrich Schuchardt81ea0082018-10-18 12:29:40 +0200119void __noreturn psci_system_off(void)
Alexander Graf3ee655e2016-08-16 21:08:47 +0200120{
121 struct pt_regs regs;
122
123 regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_OFF;
124
125 if (use_smc_for_psci)
126 smc_call(&regs);
127 else
128 hvc_call(&regs);
129
130 while (1)
131 ;
132}