Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2015 Rockchip Electronics Co., Ltd |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 4 | */ |
| 5 | #ifndef __CONFIG_RK3036_COMMON_H |
| 6 | #define __CONFIG_RK3036_COMMON_H |
| 7 | |
| 8 | #include <asm/arch/hardware.h> |
Jacob Chen | 7f35bbb | 2016-10-08 13:47:41 +0800 | [diff] [blame] | 9 | #include "rockchip-common.h" |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 10 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 11 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
| 12 | #define CONFIG_SYS_CBSIZE 1024 |
| 13 | #define CONFIG_SKIP_LOWLEVEL_INIT |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 14 | |
| 15 | #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) |
| 16 | #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ |
| 17 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) |
| 18 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 19 | #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 |
| 20 | #define CONFIG_SYS_LOAD_ADDR 0x60800800 |
| 21 | #define CONFIG_SPL_STACK 0x10081fff |
Philipp Tomsich | b3a6cdc | 2017-10-10 16:21:06 +0200 | [diff] [blame] | 22 | #define CONFIG_SPL_TEXT_BASE 0x10081000 |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 23 | |
| 24 | #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) |
| 25 | #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" |
| 26 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 27 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 28 | #define SDRAM_BANK_SIZE (512UL << 20UL) |
Kever Yang | 6d1970f | 2017-06-23 16:11:05 +0800 | [diff] [blame] | 29 | #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 30 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 31 | #define CONFIG_SPI_FLASH_GIGADEVICE |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 32 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 33 | #ifndef CONFIG_SPL_BUILD |
Xu Ziyuan | d2d763f | 2016-07-28 11:42:34 +0800 | [diff] [blame] | 34 | /* usb otg */ |
Xu Ziyuan | d2d763f | 2016-07-28 11:42:34 +0800 | [diff] [blame] | 35 | |
jacob2.chen | e73e5fc | 2016-08-30 01:26:14 +0800 | [diff] [blame] | 36 | /* usb mass storage */ |
jacob2.chen | e73e5fc | 2016-08-30 01:26:14 +0800 | [diff] [blame] | 37 | #define CONFIG_CMD_USB_MASS_STORAGE |
| 38 | |
Kever Yang | 1e35212 | 2016-11-08 18:13:39 +0800 | [diff] [blame] | 39 | /* usb host */ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 40 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 41 | "scriptaddr=0x60000000\0" \ |
| 42 | "pxefile_addr_r=0x60100000\0" \ |
| 43 | "fdt_addr_r=0x61f00000\0" \ |
| 44 | "kernel_addr_r=0x62000000\0" \ |
| 45 | "ramdisk_addr_r=0x64000000\0" |
| 46 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 47 | #include <config_distro_bootcmd.h> |
| 48 | |
| 49 | /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, |
| 50 | * so limit the fdt reallocation to that */ |
| 51 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Klaus Goger | a2a5053 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 52 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 53 | "fdt_high=0x7fffffff\0" \ |
Jacob Chen | 73a8598 | 2016-09-19 18:46:25 +0800 | [diff] [blame] | 54 | "partitions=" PARTS_DEFAULT \ |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 55 | ENV_MEM_LAYOUT_SETTINGS \ |
| 56 | BOOTENV |
| 57 | #endif |
| 58 | |
Jacob Chen | 67171e1 | 2016-09-19 18:46:28 +0800 | [diff] [blame] | 59 | #define CONFIG_PREBOOT |
| 60 | |
huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 61 | #endif |